[ARM]: Extend -mfpu options for half-precision and vfpv3xd
[oota-llvm.git] / test / MC / ARM / neont2-shift-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
2
3 .code 16
4
5 @ CHECK: vshl.u8        d16, d17, d16           @ encoding: [0x40,0xff,0xa1,0x04]
6         vshl.u8 d16, d17, d16
7 @ CHECK: vshl.u16       d16, d17, d16   @ encoding: [0x50,0xff,0xa1,0x04]
8         vshl.u16        d16, d17, d16
9 @ CHECK: vshl.u32       d16, d17, d16   @ encoding: [0x60,0xff,0xa1,0x04]
10         vshl.u32        d16, d17, d16
11 @ CHECK: vshl.u64       d16, d17, d16   @ encoding: [0x70,0xff,0xa1,0x04]
12         vshl.u64        d16, d17, d16
13 @ CHECK: vshl.i8        d16, d16, #7            @ encoding: [0xcf,0xef,0x30,0x05]
14         vshl.i8 d16, d16, #7
15 @ CHECK: vshl.i16       d16, d16, #15   @ encoding: [0xdf,0xef,0x30,0x05]
16         vshl.i16        d16, d16, #15
17 @ CHECK: vshl.i32       d16, d16, #31   @ encoding: [0xff,0xef,0x30,0x05]
18         vshl.i32        d16, d16, #31
19 @ CHECK: vshl.i64       d16, d16, #63   @ encoding: [0xff,0xef,0xb0,0x05]
20         vshl.i64        d16, d16, #63
21 @ CHECK: vshl.u8        q8, q9, q8              @ encoding: [0x40,0xff,0xe2,0x04]
22         vshl.u8 q8, q9, q8
23 @ CHECK: vshl.u16       q8, q9, q8      @ encoding: [0x50,0xff,0xe2,0x04]
24         vshl.u16        q8, q9, q8
25 @ CHECK: vshl.u32       q8, q9, q8      @ encoding: [0x60,0xff,0xe2,0x04]
26         vshl.u32        q8, q9, q8
27 @ CHECK: vshl.u64       q8, q9, q8      @ encoding: [0x70,0xff,0xe2,0x04]
28         vshl.u64        q8, q9, q8
29 @ CHECK: vshl.i8        q8, q8, #7              @ encoding: [0xcf,0xef,0x70,0x05]
30         vshl.i8 q8, q8, #7
31 @ CHECK: vshl.i16       q8, q8, #15     @ encoding: [0xdf,0xef,0x70,0x05]
32         vshl.i16        q8, q8, #15
33 @ CHECK: vshl.i32       q8, q8, #31     @ encoding: [0xff,0xef,0x70,0x05]
34         vshl.i32        q8, q8, #31
35 @ CHECK: vshl.i64       q8, q8, #63     @ encoding: [0xff,0xef,0xf0,0x05]
36         vshl.i64        q8, q8, #63
37 @ CHECK: vshr.u8        d16, d16, #8            @ encoding: [0xc8,0xff,0x30,0x00]
38         vshr.u8 d16, d16, #8
39 @ CHECK: vshr.u16       d16, d16, #16   @ encoding: [0xd0,0xff,0x30,0x00]
40         vshr.u16        d16, d16, #16
41 @ CHECK: vshr.u32       d16, d16, #32   @ encoding: [0xe0,0xff,0x30,0x00]
42         vshr.u32        d16, d16, #32
43 @ CHECK: vshr.u64       d16, d16, #64   @ encoding: [0xc0,0xff,0xb0,0x00]
44         vshr.u64        d16, d16, #64
45 @ CHECK: vshr.u8        q8, q8, #8              @ encoding: [0xc8,0xff,0x70,0x00]
46         vshr.u8 q8, q8, #8
47 @ CHECK: vshr.u16       q8, q8, #16     @ encoding: [0xd0,0xff,0x70,0x00]
48         vshr.u16        q8, q8, #16
49 @ CHECK: vshr.u32       q8, q8, #32     @ encoding: [0xe0,0xff,0x70,0x00]
50         vshr.u32        q8, q8, #32
51 @ CHECK: vshr.u64       q8, q8, #64     @ encoding: [0xc0,0xff,0xf0,0x00]
52         vshr.u64        q8, q8, #64
53 @ CHECK: vshr.s8        d16, d16, #8            @ encoding: [0xc8,0xef,0x30,0x00]
54         vshr.s8 d16, d16, #8
55 @ CHECK: vshr.s16       d16, d16, #16   @ encoding: [0xd0,0xef,0x30,0x00]
56         vshr.s16        d16, d16, #16
57 @ CHECK: vshr.s32       d16, d16, #32   @ encoding: [0xe0,0xef,0x30,0x00]
58         vshr.s32        d16, d16, #32
59 @ CHECK: vshr.s64       d16, d16, #64   @ encoding: [0xc0,0xef,0xb0,0x00]
60         vshr.s64        d16, d16, #64
61 @ CHECK: vshr.s8        q8, q8, #8              @ encoding: [0xc8,0xef,0x70,0x00]
62         vshr.s8 q8, q8, #8
63 @ CHECK: vshr.s16       q8, q8, #16     @ encoding: [0xd0,0xef,0x70,0x00]
64         vshr.s16        q8, q8, #16
65 @ CHECK: vshr.s32       q8, q8, #32     @ encoding: [0xe0,0xef,0x70,0x00]
66         vshr.s32        q8, q8, #32
67 @ CHECK: vshr.s64       q8, q8, #64     @ encoding: [0xc0,0xef,0xf0,0x00]
68         vshr.s64        q8, q8, #64
69 @ CHECK: vshll.s8       q8, d16, #7     @ encoding: [0xcf,0xef,0x30,0x0a]
70         vshll.s8        q8, d16, #7
71 @ CHECK: vshll.s16      q8, d16, #15    @ encoding: [0xdf,0xef,0x30,0x0a]
72         vshll.s16       q8, d16, #15
73 @ CHECK: vshll.s32      q8, d16, #31    @ encoding: [0xff,0xef,0x30,0x0a]
74         vshll.s32       q8, d16, #31
75 @ CHECK: vshll.u8       q8, d16, #7     @ encoding: [0xcf,0xff,0x30,0x0a]
76         vshll.u8        q8, d16, #7
77 @ CHECK: vshll.u16      q8, d16, #15    @ encoding: [0xdf,0xff,0x30,0x0a]
78         vshll.u16       q8, d16, #15
79 @ CHECK: vshll.u32      q8, d16, #31    @ encoding: [0xff,0xff,0x30,0x0a]
80         vshll.u32       q8, d16, #31
81 @ CHECK: vshll.i8       q8, d16, #8     @ encoding: [0xf2,0xff,0x20,0x03]
82         vshll.i8        q8, d16, #8
83 @ CHECK: vshll.i16      q8, d16, #16    @ encoding: [0xf6,0xff,0x20,0x03]
84         vshll.i16       q8, d16, #16
85 @ CHECK: vshll.i32      q8, d16, #32    @ encoding: [0xfa,0xff,0x20,0x03]
86         vshll.i32       q8, d16, #32
87 @ CHECK: vshrn.i16      d16, q8, #8     @ encoding: [0xc8,0xef,0x30,0x08]
88         vshrn.i16       d16, q8, #8
89 @ CHECK: vshrn.i32      d16, q8, #16    @ encoding: [0xd0,0xef,0x30,0x08]
90         vshrn.i32       d16, q8, #16
91 @ CHECK: vshrn.i64      d16, q8, #32    @ encoding: [0xe0,0xef,0x30,0x08]
92         vshrn.i64       d16, q8, #32
93 @ CHECK: vrshl.s8       d16, d17, d16   @ encoding: [0x40,0xef,0xa1,0x05]
94         vrshl.s8        d16, d17, d16
95 @ CHECK: vrshl.s16      d16, d17, d16   @ encoding: [0x50,0xef,0xa1,0x05]
96         vrshl.s16       d16, d17, d16
97 @ CHECK: vrshl.s32      d16, d17, d16   @ encoding: [0x60,0xef,0xa1,0x05]
98         vrshl.s32       d16, d17, d16
99 @ CHECK: vrshl.s64      d16, d17, d16   @ encoding: [0x70,0xef,0xa1,0x05]
100         vrshl.s64       d16, d17, d16
101 @ CHECK: vrshl.u8       d16, d17, d16   @ encoding: [0x40,0xff,0xa1,0x05]
102         vrshl.u8        d16, d17, d16
103 @ CHECK: vrshl.u16      d16, d17, d16   @ encoding: [0x50,0xff,0xa1,0x05]
104         vrshl.u16       d16, d17, d16
105 @ CHECK: vrshl.u32      d16, d17, d16   @ encoding: [0x60,0xff,0xa1,0x05]
106         vrshl.u32       d16, d17, d16
107 @ CHECK: vrshl.u64      d16, d17, d16   @ encoding: [0x70,0xff,0xa1,0x05]
108         vrshl.u64       d16, d17, d16
109 @ CHECK: vrshl.s8       q8, q9, q8      @ encoding: [0x40,0xef,0xe2,0x05]
110         vrshl.s8        q8, q9, q8
111 @ CHECK: vrshl.s16      q8, q9, q8      @ encoding: [0x50,0xef,0xe2,0x05]
112         vrshl.s16       q8, q9, q8
113 @ CHECK: vrshl.s32      q8, q9, q8      @ encoding: [0x60,0xef,0xe2,0x05]
114         vrshl.s32       q8, q9, q8
115 @ CHECK: vrshl.s64      q8, q9, q8      @ encoding: [0x70,0xef,0xe2,0x05]
116         vrshl.s64       q8, q9, q8
117 @ CHECK: vrshl.u8       q8, q9, q8      @ encoding: [0x40,0xff,0xe2,0x05]
118         vrshl.u8        q8, q9, q8
119 @ CHECK: vrshl.u16      q8, q9, q8      @ encoding: [0x50,0xff,0xe2,0x05]
120         vrshl.u16       q8, q9, q8
121 @ CHECK: vrshl.u32      q8, q9, q8      @ encoding: [0x60,0xff,0xe2,0x05]
122         vrshl.u32       q8, q9, q8
123 @ CHECK: vrshl.u64      q8, q9, q8      @ encoding: [0x70,0xff,0xe2,0x05]
124         vrshl.u64       q8, q9, q8
125 @ CHECK: vrshr.s8       d16, d16, #8    @ encoding: [0xc8,0xef,0x30,0x02]
126         vrshr.s8        d16, d16, #8
127 @ CHECK: vrshr.s16      d16, d16, #16   @ encoding: [0xd0,0xef,0x30,0x02]
128         vrshr.s16       d16, d16, #16
129 @ CHECK: vrshr.s32      d16, d16, #32   @ encoding: [0xe0,0xef,0x30,0x02]
130         vrshr.s32       d16, d16, #32
131 @ CHECK: vrshr.s64      d16, d16, #64   @ encoding: [0xc0,0xef,0xb0,0x02]
132         vrshr.s64       d16, d16, #64
133 @ CHECK: vrshr.u8       d16, d16, #8    @ encoding: [0xc8,0xff,0x30,0x02]
134         vrshr.u8        d16, d16, #8
135 @ CHECK: vrshr.u16      d16, d16, #16   @ encoding: [0xd0,0xff,0x30,0x02]
136         vrshr.u16       d16, d16, #16
137 @ CHECK: vrshr.u32      d16, d16, #32   @ encoding: [0xe0,0xff,0x30,0x02]
138         vrshr.u32       d16, d16, #32
139 @ CHECK: vrshr.u64      d16, d16, #64   @ encoding: [0xc0,0xff,0xb0,0x02]
140         vrshr.u64       d16, d16, #64
141 @ CHECK: vrshr.s8       q8, q8, #8      @ encoding: [0xc8,0xef,0x70,0x02]
142         vrshr.s8        q8, q8, #8
143 @ CHECK: vrshr.s16      q8, q8, #16     @ encoding: [0xd0,0xef,0x70,0x02]
144         vrshr.s16       q8, q8, #16
145 @ CHECK: vrshr.s32      q8, q8, #32     @ encoding: [0xe0,0xef,0x70,0x02]
146         vrshr.s32       q8, q8, #32
147 @ CHECK: vrshr.s64      q8, q8, #64     @ encoding: [0xc0,0xef,0xf0,0x02]
148         vrshr.s64       q8, q8, #64
149 @ CHECK: vrshr.u8       q8, q8, #8      @ encoding: [0xc8,0xff,0x70,0x02]
150         vrshr.u8        q8, q8, #8
151 @ CHECK: vrshr.u16      q8, q8, #16     @ encoding: [0xd0,0xff,0x70,0x02]
152         vrshr.u16       q8, q8, #16
153 @ CHECK: vrshr.u32      q8, q8, #32     @ encoding: [0xe0,0xff,0x70,0x02]
154         vrshr.u32       q8, q8, #32
155 @ CHECK: vrshr.u64      q8, q8, #64     @ encoding: [0xc0,0xff,0xf0,0x02]
156         vrshr.u64       q8, q8, #64
157 @ CHECK: vrshrn.i16     d16, q8, #8     @ encoding: [0xc8,0xef,0x70,0x08]
158         vrshrn.i16      d16, q8, #8
159 @ CHECK: vrshrn.i32     d16, q8, #16    @ encoding: [0xd0,0xef,0x70,0x08]
160         vrshrn.i32      d16, q8, #16
161 @ CHECK: vrshrn.i64     d16, q8, #32    @ encoding: [0xe0,0xef,0x70,0x08]
162         vrshrn.i64      d16, q8, #32