[ARM] Support for ARMv6-Z / ARMv6-ZK missing
[oota-llvm.git] / test / MC / ARM / neon-sub-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
2
3         vsub.i8 d16, d17, d16
4         vsub.i16        d16, d17, d16
5         vsub.i32        d16, d17, d16
6         vsub.i64        d16, d17, d16
7         vsub.f32        d16, d16, d17
8         vsub.i8 q8, q8, q9
9         vsub.i16        q8, q8, q9
10         vsub.i32        q8, q8, q9
11         vsub.i64        q8, q8, q9
12         vsub.f32        q8, q8, q9
13
14         vsub.i8  d13, d21
15         vsub.i16 d14, d22
16         vsub.i32 d15, d23
17         vsub.i64 d16, d24
18         vsub.f32 d17, d25
19         vsub.i8  q1, q10
20         vsub.i16 q2, q9
21         vsub.i32 q3, q8
22         vsub.i64 q4, q7
23         vsub.f32 q5, q6
24
25 @ CHECK: vsub.i8        d16, d17, d16   @ encoding: [0xa0,0x08,0x41,0xf3]
26 @ CHECK: vsub.i16       d16, d17, d16   @ encoding: [0xa0,0x08,0x51,0xf3]
27 @ CHECK: vsub.i32       d16, d17, d16   @ encoding: [0xa0,0x08,0x61,0xf3]
28 @ CHECK: vsub.i64       d16, d17, d16   @ encoding: [0xa0,0x08,0x71,0xf3]
29 @ CHECK: vsub.f32       d16, d16, d17   @ encoding: [0xa1,0x0d,0x60,0xf2]
30 @ CHECK: vsub.i8        q8, q8, q9      @ encoding: [0xe2,0x08,0x40,0xf3]
31 @ CHECK: vsub.i16       q8, q8, q9      @ encoding: [0xe2,0x08,0x50,0xf3]
32 @ CHECK: vsub.i32       q8, q8, q9      @ encoding: [0xe2,0x08,0x60,0xf3]
33 @ CHECK: vsub.i64       q8, q8, q9      @ encoding: [0xe2,0x08,0x70,0xf3]
34 @ CHECK: vsub.f32       q8, q8, q9      @ encoding: [0xe2,0x0d,0x60,0xf2]
35
36 @ CHECK: vsub.i8        d13, d13, d21   @ encoding: [0x25,0xd8,0x0d,0xf3]
37 @ CHECK: vsub.i16       d14, d14, d22   @ encoding: [0x26,0xe8,0x1e,0xf3]
38 @ CHECK: vsub.i32       d15, d15, d23   @ encoding: [0x27,0xf8,0x2f,0xf3]
39 @ CHECK: vsub.i64       d16, d16, d24   @ encoding: [0xa8,0x08,0x70,0xf3]
40 @ CHECK: vsub.f32       d17, d17, d25   @ encoding: [0xa9,0x1d,0x61,0xf2]
41 @ CHECK: vsub.i8        q1, q1, q10     @ encoding: [0x64,0x28,0x02,0xf3]
42 @ CHECK: vsub.i16       q2, q2, q9      @ encoding: [0x62,0x48,0x14,0xf3]
43 @ CHECK: vsub.i32       q3, q3, q8      @ encoding: [0x60,0x68,0x26,0xf3]
44 @ CHECK: vsub.i64       q4, q4, q7      @ encoding: [0x4e,0x88,0x38,0xf3]
45 @ CHECK: vsub.f32       q5, q5, q6      @ encoding: [0x4c,0xad,0x2a,0xf2]
46
47
48
49 @ CHECK: vsubl.s8       q8, d17, d16    @ encoding: [0xa0,0x02,0xc1,0xf2]
50         vsubl.s8        q8, d17, d16
51 @ CHECK: vsubl.s16      q8, d17, d16    @ encoding: [0xa0,0x02,0xd1,0xf2]
52         vsubl.s16       q8, d17, d16
53 @ CHECK: vsubl.s32      q8, d17, d16    @ encoding: [0xa0,0x02,0xe1,0xf2]
54         vsubl.s32       q8, d17, d16
55 @ CHECK: vsubl.u8       q8, d17, d16    @ encoding: [0xa0,0x02,0xc1,0xf3]
56         vsubl.u8        q8, d17, d16
57 @ CHECK: vsubl.u16      q8, d17, d16    @ encoding: [0xa0,0x02,0xd1,0xf3]
58         vsubl.u16       q8, d17, d16
59 @ CHECK: vsubl.u32      q8, d17, d16    @ encoding: [0xa0,0x02,0xe1,0xf3]
60         vsubl.u32       q8, d17, d16
61 @ CHECK: vsubw.s8       q8, q8, d18     @ encoding: [0xa2,0x03,0xc0,0xf2]
62         vsubw.s8        q8, q8, d18
63 @ CHECK: vsubw.s16      q8, q8, d18     @ encoding: [0xa2,0x03,0xd0,0xf2]
64         vsubw.s16       q8, q8, d18
65 @ CHECK: vsubw.s32      q8, q8, d18     @ encoding: [0xa2,0x03,0xe0,0xf2]
66         vsubw.s32       q8, q8, d18
67 @ CHECK: vsubw.u8       q8, q8, d18     @ encoding: [0xa2,0x03,0xc0,0xf3]
68         vsubw.u8        q8, q8, d18
69 @ CHECK: vsubw.u16      q8, q8, d18     @ encoding: [0xa2,0x03,0xd0,0xf3]
70         vsubw.u16       q8, q8, d18
71 @ CHECK: vsubw.u32      q8, q8, d18     @ encoding: [0xa2,0x03,0xe0,0xf3]
72         vsubw.u32       q8, q8, d18
73 @ CHECK: vhsub.s8       d16, d16, d17   @ encoding: [0xa1,0x02,0x40,0xf2]
74         vhsub.s8        d16, d16, d17
75 @ CHECK: vhsub.s16      d16, d16, d17   @ encoding: [0xa1,0x02,0x50,0xf2]
76         vhsub.s16       d16, d16, d17
77 @ CHECK: vhsub.s32      d16, d16, d17   @ encoding: [0xa1,0x02,0x60,0xf2]
78         vhsub.s32       d16, d16, d17
79 @ CHECK: vhsub.u8       d16, d16, d17   @ encoding: [0xa1,0x02,0x40,0xf3]
80         vhsub.u8        d16, d16, d17
81 @ CHECK: vhsub.u16      d16, d16, d17   @ encoding: [0xa1,0x02,0x50,0xf3]
82         vhsub.u16       d16, d16, d17
83 @ CHECK: vhsub.u32      d16, d16, d17   @ encoding: [0xa1,0x02,0x60,0xf3]
84         vhsub.u32       d16, d16, d17
85 @ CHECK: vhsub.s8       q8, q8, q9      @ encoding: [0xe2,0x02,0x40,0xf2]
86         vhsub.s8        q8, q8, q9
87 @ CHECK: vhsub.s16      q8, q8, q9      @ encoding: [0xe2,0x02,0x50,0xf2]
88         vhsub.s16       q8, q8, q9
89 @ CHECK: vhsub.s32      q8, q8, q9      @ encoding: [0xe2,0x02,0x60,0xf2]
90         vhsub.s32       q8, q8, q9
91 @ CHECK: vqsub.s8       d16, d16, d17   @ encoding: [0xb1,0x02,0x40,0xf2]
92         vqsub.s8        d16, d16, d17
93 @ CHECK: vqsub.s16      d16, d16, d17   @ encoding: [0xb1,0x02,0x50,0xf2]
94         vqsub.s16       d16, d16, d17
95 @ CHECK: vqsub.s32      d16, d16, d17   @ encoding: [0xb1,0x02,0x60,0xf2]
96         vqsub.s32       d16, d16, d17
97 @ CHECK: vqsub.s64      d16, d16, d17   @ encoding: [0xb1,0x02,0x70,0xf2]
98         vqsub.s64       d16, d16, d17
99 @ CHECK: vqsub.u8       d16, d16, d17   @ encoding: [0xb1,0x02,0x40,0xf3]
100         vqsub.u8        d16, d16, d17
101 @ CHECK: vqsub.u16      d16, d16, d17   @ encoding: [0xb1,0x02,0x50,0xf3]
102         vqsub.u16       d16, d16, d17
103 @ CHECK: vqsub.u32      d16, d16, d17   @ encoding: [0xb1,0x02,0x60,0xf3]
104         vqsub.u32       d16, d16, d17
105 @ CHECK: vqsub.u64      d16, d16, d17   @ encoding: [0xb1,0x02,0x70,0xf3]
106         vqsub.u64       d16, d16, d17
107 @ CHECK: vqsub.s8       q8, q8, q9      @ encoding: [0xf2,0x02,0x40,0xf2]
108         vqsub.s8        q8, q8, q9
109 @ CHECK: vqsub.s16      q8, q8, q9      @ encoding: [0xf2,0x02,0x50,0xf2]
110         vqsub.s16       q8, q8, q9
111 @ CHECK: vqsub.s32      q8, q8, q9      @ encoding: [0xf2,0x02,0x60,0xf2]
112         vqsub.s32       q8, q8, q9
113 @ CHECK: vqsub.s64      q8, q8, q9      @ encoding: [0xf2,0x02,0x70,0xf2]
114         vqsub.s64       q8, q8, q9
115 @ CHECK: vqsub.u8       q8, q8, q9      @ encoding: [0xf2,0x02,0x40,0xf3]
116         vqsub.u8        q8, q8, q9
117 @ CHECK: vqsub.u16      q8, q8, q9      @ encoding: [0xf2,0x02,0x50,0xf3]
118         vqsub.u16       q8, q8, q9
119 @ CHECK: vqsub.u32      q8, q8, q9      @ encoding: [0xf2,0x02,0x60,0xf3]
120         vqsub.u32       q8, q8, q9
121 @ CHECK: vqsub.u64      q8, q8, q9      @ encoding: [0xf2,0x02,0x70,0xf3]
122         vqsub.u64       q8, q8, q9
123 @ CHECK: vsubhn.i16     d16, q8, q9     @ encoding: [0xa2,0x06,0xc0,0xf2]
124         vsubhn.i16      d16, q8, q9
125 @ CHECK: vsubhn.i32     d16, q8, q9     @ encoding: [0xa2,0x06,0xd0,0xf2]
126         vsubhn.i32      d16, q8, q9
127 @ CHECK: vsubhn.i64     d16, q8, q9     @ encoding: [0xa2,0x06,0xe0,0xf2]
128         vsubhn.i64      d16, q8, q9
129 @ CHECK: vrsubhn.i16    d16, q8, q9     @ encoding: [0xa2,0x06,0xc0,0xf3]
130         vrsubhn.i16     d16, q8, q9
131 @ CHECK: vrsubhn.i32    d16, q8, q9     @ encoding: [0xa2,0x06,0xd0,0xf3]
132         vrsubhn.i32     d16, q8, q9
133 @ CHECK: vrsubhn.i64    d16, q8, q9     @ encoding: [0xa2,0x06,0xe0,0xf3]
134         vrsubhn.i64     d16, q8, q9
135
136         vhsub.s8        d11, d24
137         vhsub.s16       d12, d23
138         vhsub.s32       d13, d22
139         vhsub.u8        d14, d21
140         vhsub.u16       d15, d20
141         vhsub.u32       d16, d19
142         vhsub.s8        q1, q12
143         vhsub.s16       q2, q11
144         vhsub.s32       q3, q10
145         vhsub.u8        q4, q9
146         vhsub.u16       q5, q8
147         vhsub.u32       q6, q7
148
149 @ CHECK: vhsub.s8       d11, d11, d24   @ encoding: [0x28,0xb2,0x0b,0xf2]
150 @ CHECK: vhsub.s16      d12, d12, d23   @ encoding: [0x27,0xc2,0x1c,0xf2]
151 @ CHECK: vhsub.s32      d13, d13, d22   @ encoding: [0x26,0xd2,0x2d,0xf2]
152 @ CHECK: vhsub.u8       d14, d14, d21   @ encoding: [0x25,0xe2,0x0e,0xf3]
153 @ CHECK: vhsub.u16      d15, d15, d20   @ encoding: [0x24,0xf2,0x1f,0xf3]
154 @ CHECK: vhsub.u32      d16, d16, d19   @ encoding: [0xa3,0x02,0x60,0xf3]
155 @ CHECK: vhsub.s8       q1, q1, q12     @ encoding: [0x68,0x22,0x02,0xf2]
156 @ CHECK: vhsub.s16      q2, q2, q11     @ encoding: [0x66,0x42,0x14,0xf2]
157 @ CHECK: vhsub.s32      q3, q3, q10     @ encoding: [0x64,0x62,0x26,0xf2]
158 @ CHECK: vhsub.u8       q4, q4, q9      @ encoding: [0x62,0x82,0x08,0xf3]
159 @ CHECK: vhsub.u16      q5, q5, q8      @ encoding: [0x60,0xa2,0x1a,0xf3]
160 @ CHECK: vhsub.u32      q6, q6, q7      @ encoding: [0x4e,0xc2,0x2c,0xf3]
161
162
163         vsubw.s8  q6, d5
164         vsubw.s16 q7, d1
165         vsubw.s32 q8, d2
166         vsubw.u8  q6, d5
167         vsubw.u16 q7, d1
168         vsubw.u32 q8, d2
169
170 @ CHECK: vsubw.s8       q6, q6, d5      @ encoding: [0x05,0xc3,0x8c,0xf2]
171 @ CHECK: vsubw.s16      q7, q7, d1      @ encoding: [0x01,0xe3,0x9e,0xf2]
172 @ CHECK: vsubw.s32      q8, q8, d2      @ encoding: [0x82,0x03,0xe0,0xf2]
173 @ CHECK: vsubw.u8       q6, q6, d5      @ encoding: [0x05,0xc3,0x8c,0xf3]
174 @ CHECK: vsubw.u16      q7, q7, d1      @ encoding: [0x01,0xe3,0x9e,0xf3]
175 @ CHECK: vsubw.u32      q8, q8, d2      @ encoding: [0x82,0x03,0xe0,0xf3]