ARM alternate size suffices for VTRN instructions.
[oota-llvm.git] / test / MC / ARM / neon-shuffle-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
2
3 @ CHECK: vext.8 d16, d17, d16, #3       @ encoding: [0xa0,0x03,0xf1,0xf2]
4         vext.8  d16, d17, d16, #3
5 @ CHECK: vext.8 d16, d17, d16, #5       @ encoding: [0xa0,0x05,0xf1,0xf2]
6         vext.8  d16, d17, d16, #5
7 @ CHECK: vext.8 q8, q9, q8, #3          @ encoding: [0xe0,0x03,0xf2,0xf2]
8         vext.8  q8, q9, q8, #3
9 @ CHECK: vext.8 q8, q9, q8, #7          @ encoding: [0xe0,0x07,0xf2,0xf2]
10         vext.8  q8, q9, q8, #7
11 @ CHECK: vext.16        d16, d17, d16, #3       @ encoding: [0xa0,0x06,0xf1,0xf2]
12         vext.16 d16, d17, d16, #3
13 @ CHECK: vext.32        q8, q9, q8, #3          @ encoding: [0xe0,0x0c,0xf2,0xf2]
14         vext.32 q8, q9, q8, #3
15 @ CHECK: vtrn.8 d17, d16                @ encoding: [0xa0,0x10,0xf2,0xf3]
16         vtrn.8  d17, d16
17 @ CHECK: vtrn.16        d17, d16                @ encoding: [0xa0,0x10,0xf6,0xf3]
18         vtrn.16 d17, d16
19 @ CHECK: vtrn.32        d17, d16                @ encoding: [0xa0,0x10,0xfa,0xf3]
20         vtrn.32 d17, d16
21 @ CHECK: vtrn.8 q9, q8                  @ encoding: [0xe0,0x20,0xf2,0xf3]
22         vtrn.8  q9, q8
23 @ CHECK: vtrn.16        q9, q8                  @ encoding: [0xe0,0x20,0xf6,0xf3]
24         vtrn.16 q9, q8
25 @ CHECK: vtrn.32        q9, q8                  @ encoding: [0xe0,0x20,0xfa,0xf3]
26         vtrn.32 q9, q8
27 @ CHECK: vuzp.8 d17, d16                @ encoding: [0x20,0x11,0xf2,0xf3]
28         vuzp.8  d17, d16
29 @ CHECK: vuzp.16        d17, d16                @ encoding: [0x20,0x11,0xf6,0xf3]
30         vuzp.16 d17, d16
31 @ CHECK: vuzp.8 q9, q8                  @ encoding: [0x60,0x21,0xf2,0xf3]
32         vuzp.8  q9, q8
33 @ CHECK: vuzp.16        q9, q8                  @ encoding: [0x60,0x21,0xf6,0xf3]
34         vuzp.16 q9, q8
35 @ CHECK: vuzp.32        q9, q8                  @ encoding: [0x60,0x21,0xfa,0xf3]
36         vuzp.32 q9, q8
37 @ CHECK: vzip.8 d17, d16                @ encoding: [0xa0,0x11,0xf2,0xf3]
38         vzip.8  d17, d16
39 @ CHECK: vzip.16        d17, d16                @ encoding: [0xa0,0x11,0xf6,0xf3]
40         vzip.16 d17, d16
41 @ CHECK: vzip.8 q9, q8                  @ encoding: [0xe0,0x21,0xf2,0xf3]
42         vzip.8  q9, q8
43 @ CHECK: vzip.16        q9, q8                  @ encoding: [0xe0,0x21,0xf6,0xf3]
44         vzip.16 q9, q8
45 @ CHECK: vzip.32        q9, q8                  @ encoding: [0xe0,0x21,0xfa,0xf3]
46         vzip.32 q9, q8
47
48
49 @ VTRN alternate size suffices
50
51         vtrn.8 d3, d9
52         vtrn.i8 d3, d9
53         vtrn.u8 d3, d9
54         vtrn.p8 d3, d9
55         vtrn.16 d3, d9
56         vtrn.i16 d3, d9
57         vtrn.u16 d3, d9
58         vtrn.p16 d3, d9
59         vtrn.32 d3, d9
60         vtrn.i32 d3, d9
61         vtrn.u32 d3, d9
62         vtrn.f32 d3, d9
63         vtrn.f d3, d9
64
65         vtrn.8 q14, q6
66         vtrn.i8 q14, q6
67         vtrn.u8 q14, q6
68         vtrn.p8 q14, q6
69         vtrn.16 q14, q6
70         vtrn.i16 q14, q6
71         vtrn.u16 q14, q6
72         vtrn.p16 q14, q6
73         vtrn.32 q14, q6
74         vtrn.i32 q14, q6
75         vtrn.u32 q14, q6
76         vtrn.f32 q14, q6
77         vtrn.f q14, q6
78
79 @ CHECK: vtrn.8 d3, d9                  @ encoding: [0x89,0x30,0xb2,0xf3]
80 @ CHECK: vtrn.8 d3, d9                  @ encoding: [0x89,0x30,0xb2,0xf3]
81 @ CHECK: vtrn.8 d3, d9                  @ encoding: [0x89,0x30,0xb2,0xf3]
82 @ CHECK: vtrn.8 d3, d9                  @ encoding: [0x89,0x30,0xb2,0xf3]
83 @ CHECK: vtrn.16        d3, d9          @ encoding: [0x89,0x30,0xb6,0xf3]
84 @ CHECK: vtrn.16        d3, d9          @ encoding: [0x89,0x30,0xb6,0xf3]
85 @ CHECK: vtrn.16        d3, d9          @ encoding: [0x89,0x30,0xb6,0xf3]
86 @ CHECK: vtrn.16        d3, d9          @ encoding: [0x89,0x30,0xb6,0xf3]
87 @ CHECK: vtrn.32        d3, d9          @ encoding: [0x89,0x30,0xba,0xf3]
88 @ CHECK: vtrn.32        d3, d9          @ encoding: [0x89,0x30,0xba,0xf3]
89 @ CHECK: vtrn.32        d3, d9          @ encoding: [0x89,0x30,0xba,0xf3]
90 @ CHECK: vtrn.32        d3, d9          @ encoding: [0x89,0x30,0xba,0xf3]
91 @ CHECK: vtrn.32        d3, d9          @ encoding: [0x89,0x30,0xba,0xf3]
92
93 @ CHECK: vtrn.8 q14, q6                 @ encoding: [0xcc,0xc0,0xf2,0xf3]
94 @ CHECK: vtrn.8 q14, q6                 @ encoding: [0xcc,0xc0,0xf2,0xf3]
95 @ CHECK: vtrn.8 q14, q6                 @ encoding: [0xcc,0xc0,0xf2,0xf3]
96 @ CHECK: vtrn.8 q14, q6                 @ encoding: [0xcc,0xc0,0xf2,0xf3]
97 @ CHECK: vtrn.16        q14, q6         @ encoding: [0xcc,0xc0,0xf6,0xf3]
98 @ CHECK: vtrn.16        q14, q6         @ encoding: [0xcc,0xc0,0xf6,0xf3]
99 @ CHECK: vtrn.16        q14, q6         @ encoding: [0xcc,0xc0,0xf6,0xf3]
100 @ CHECK: vtrn.16        q14, q6         @ encoding: [0xcc,0xc0,0xf6,0xf3]
101 @ CHECK: vtrn.32        q14, q6         @ encoding: [0xcc,0xc0,0xfa,0xf3]
102 @ CHECK: vtrn.32        q14, q6         @ encoding: [0xcc,0xc0,0xfa,0xf3]
103 @ CHECK: vtrn.32        q14, q6         @ encoding: [0xcc,0xc0,0xfa,0xf3]
104 @ CHECK: vtrn.32        q14, q6         @ encoding: [0xcc,0xc0,0xfa,0xf3]
105 @ CHECK: vtrn.32        q14, q6         @ encoding: [0xcc,0xc0,0xfa,0xf3]
106