Add Neon VCVT instructions for f32 <-> f16 conversions.
[oota-llvm.git] / test / MC / ARM / neon-convert-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a9 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
2
3 @ CHECK: vcvt.s32.f32   d16, d16        @ encoding: [0x20,0x07,0xfb,0xf3]
4         vcvt.s32.f32    d16, d16
5 @ CHECK: vcvt.u32.f32   d16, d16        @ encoding: [0xa0,0x07,0xfb,0xf3]
6         vcvt.u32.f32    d16, d16
7 @ CHECK: vcvt.f32.s32   d16, d16        @ encoding: [0x20,0x06,0xfb,0xf3]
8         vcvt.f32.s32    d16, d16
9 @ CHECK: vcvt.f32.u32   d16, d16        @ encoding: [0xa0,0x06,0xfb,0xf3]
10         vcvt.f32.u32    d16, d16
11 @ CHECK: vcvt.s32.f32   q8, q8          @ encoding: [0x60,0x07,0xfb,0xf3]
12         vcvt.s32.f32    q8, q8
13 @ CHECK: vcvt.u32.f32   q8, q8          @ encoding: [0xe0,0x07,0xfb,0xf3]
14         vcvt.u32.f32    q8, q8
15 @ CHECK: vcvt.f32.s32   q8, q8          @ encoding: [0x60,0x06,0xfb,0xf3]
16         vcvt.f32.s32    q8, q8
17 @ CHECK: vcvt.f32.u32   q8, q8          @ encoding: [0xe0,0x06,0xfb,0xf3]
18         vcvt.f32.u32    q8, q8
19 @ CHECK: vcvt.s32.f32   d16, d16, #1    @ encoding: [0x30,0x0f,0xff,0xf2]
20         vcvt.s32.f32    d16, d16, #1
21 @ CHECK: vcvt.u32.f32   d16, d16, #1    @ encoding: [0x30,0x0f,0xff,0xf3]
22         vcvt.u32.f32    d16, d16, #1
23 @ CHECK: vcvt.f32.s32   d16, d16, #1    @ encoding: [0x30,0x0e,0xff,0xf2]
24         vcvt.f32.s32    d16, d16, #1
25 @ CHECK: vcvt.f32.u32   d16, d16, #1    @ encoding: [0x30,0x0e,0xff,0xf3]
26         vcvt.f32.u32    d16, d16, #1
27 @ CHECK: vcvt.s32.f32   q8, q8, #1      @ encoding: [0x70,0x0f,0xff,0xf2]
28         vcvt.s32.f32    q8, q8, #1
29 @ CHECK: vcvt.u32.f32   q8, q8, #1      @ encoding: [0x70,0x0f,0xff,0xf3]
30         vcvt.u32.f32    q8, q8, #1
31 @ CHECK: vcvt.f32.s32   q8, q8, #1      @ encoding: [0x70,0x0e,0xff,0xf2]
32         vcvt.f32.s32    q8, q8, #1
33 @ CHECK: vcvt.f32.u32   q8, q8, #1      @ encoding: [0x70,0x0e,0xff,0xf3]
34         vcvt.f32.u32    q8, q8, #1
35 @ CHECK: vcvt.f32.f16   q8, d16         @ encoding: [0x20,0x07,0xf6,0xf3]
36         vcvt.f32.f16    q8, d16
37 @ CHECK: vcvt.f16.f32   d16, q8         @ encoding: [0x20,0x06,0xf6,0xf3]
38         vcvt.f16.f32    d16, q8