test/MC/ARM/basic-thumb2-instructions.s

   1 @ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s | FileCheck %s
   2   .syntax unified
   3   .globl _func
   4
   5 @ Check that the assembler can handle the documented syntax from the ARM ARM.
   6 @ For complex constructs like shifter operands, check more thoroughly for them
   7 @ once then spot check that following instructions accept the form generally.
   8 @ This gives us good coverage while keeping the overall size of the test
   9 @ more reasonable.
  10
  11
  12 @ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
  13
  14 _func:
  15 @ CHECK: _func
  16
  17 @------------------------------------------------------------------------------
  18 @ ADC (immediate)
  19 @------------------------------------------------------------------------------
  20         adc r0, r1, #4
  21         adcs r0, r1, #0
  22         adc r1, r2, #255
  23         adc r3, r7, #0x00550055
  24         adc r8, r12, #0xaa00aa00
  25         adc r9, r7, #0xa5a5a5a5
  26         adc r5, r3, #0x87000000
  27         adc r4, r2, #0x7f800000
  28         adc r4, r2, #0x00000680
  29
  30 @ CHECK: adc    r0, r1, #4              @ encoding: [0x41,0xf1,0x04,0x00]
  31 @ CHECK: adcs   r0, r1, #0              @ encoding: [0x51,0xf1,0x00,0x00]
  32 @ CHECK: adc    r1, r2, #255            @ encoding: [0x42,0xf1,0xff,0x01]
  33 @ CHECK: adc    r3, r7, #5570645        @ encoding: [0x47,0xf1,0x55,0x13]
  34 @ CHECK: adc    r8, r12, #2852170240    @ encoding: [0x4c,0xf1,0xaa,0x28]
  35 @ CHECK: adc    r9, r7, #2779096485     @ encoding: [0x47,0xf1,0xa5,0x39]
  36 @ CHECK: adc    r5, r3, #2264924160     @ encoding: [0x43,0xf1,0x07,0x45]
  37 @ CHECK: adc    r4, r2, #2139095040     @ encoding: [0x42,0xf1,0xff,0x44]
  38 @ CHECK: adc    r4, r2, #1664           @ encoding: [0x42,0xf5,0xd0,0x64]
  39
  40 @------------------------------------------------------------------------------
  41 @ ADC (register)
  42 @------------------------------------------------------------------------------
  43         adc r4, r5, r6
  44         adcs r4, r5, r6
  45         adc.w r9, r1, r3
  46         adcs.w r9, r1, r3
  47         adc     r0, r1, r3, ror #4
  48         adcs    r0, r1, r3, lsl #7
  49         adc.w   r0, r1, r3, lsr #31
  50         adcs.w  r0, r1, r3, asr #32
  51
  52 @ CHECK: adc.w  r4, r5, r6              @ encoding: [0x45,0xeb,0x06,0x04]
  53 @ CHECK: adcs.w r4, r5, r6              @ encoding: [0x55,0xeb,0x06,0x04]
  54 @ CHECK: adc.w  r9, r1, r3              @ encoding: [0x41,0xeb,0x03,0x09]
  55 @ CHECK: adcs.w r9, r1, r3              @ encoding: [0x51,0xeb,0x03,0x09]
  56 @ CHECK: adc.w  r0, r1, r3, ror #4      @ encoding: [0x41,0xeb,0x33,0x10]
  57 @ CHECK: adcs.w r0, r1, r3, lsl #7      @ encoding: [0x51,0xeb,0xc3,0x10]
  58 @ CHECK: adc.w  r0, r1, r3, lsr #31     @ encoding: [0x41,0xeb,0xd3,0x70]
  59 @ CHECK: adcs.w r0, r1, r3, asr #32     @ encoding: [0x51,0xeb,0x23,0x00]
  60
  61
  62 @------------------------------------------------------------------------------
  63 @ ADD (immediate)
  64 @------------------------------------------------------------------------------
  65         itet eq
  66         addeq r1, r2, #4
  67         addwne r5, r3, #1023
  68         addeq r4, r5, #293
  69         add r2, sp, #1024
  70         add r2, r8, #0xff00
  71         add r2, r3, #257
  72         addw r2, r3, #257
  73         add r12, r6, #0x100
  74         addw r12, r6, #0x100
  75         adds r1, r2, #0x1f0
  76
  77 @ CHECK: itet   eq                      @ encoding: [0x0a,0xbf]
  78 @ CHECK: addeq  r1, r2, #4              @ encoding: [0x11,0x1d]
  79 @ CHECK: addwne r5, r3, #1023           @ encoding: [0x03,0xf2,0xff,0x35]
  80 @ CHECK: addweq r4, r5, #293            @ encoding: [0x05,0xf2,0x25,0x14]
  81 @ CHECK: add.w  r2, sp, #1024           @ encoding: [0x0d,0xf5,0x80,0x62]
  82 @ CHECK: add.w  r2, r8, #65280          @ encoding: [0x08,0xf5,0x7f,0x42]
  83 @ CHECK: addw   r2, r3, #257            @ encoding: [0x03,0xf2,0x01,0x12]
  84 @ CHECK: addw   r2, r3, #257            @ encoding: [0x03,0xf2,0x01,0x12]
  85 @ CHECK: add.w  r12, r6, #256           @ encoding: [0x06,0xf5,0x80,0x7c]
  86 @ CHECK: addw   r12, r6, #256           @ encoding: [0x06,0xf2,0x00,0x1c]
  87 @ CHECK: adds.w r1, r2, #496            @ encoding: [0x12,0xf5,0xf8,0x71]
  88
  89
  90 @------------------------------------------------------------------------------
  91 @ CBZ/CBNZ
  92 @------------------------------------------------------------------------------
  93         cbnz    r7, #6
  94         cbnz    r7, #12
  95
  96 @ CHECK: cbnz    r7, #6                  @ encoding: [0x1f,0xb9]
  97 @ CHECK: cbnz    r7, #12                 @ encoding: [0x37,0xb9]
  98
  99 @------------------------------------------------------------------------------
 100 @ IT
 101 @------------------------------------------------------------------------------
 102 @ Test encodings of a few full IT blocks, not just the IT instruction
 103
 104         iteet eq
 105         addeq r0, r1, r2
 106         nopne
 107         subne r5, r6, r7
 108         addeq r1, r2, #4
 109
 110 @ CHECK: iteet  eq                      @ encoding: [0x0d,0xbf]
 111 @ CHECK: addeq  r0, r1, r2              @ encoding: [0x88,0x18]
 112 @ CHECK: nopne                          @ encoding: [0x00,0xbf]
 113 @ CHECK: subne  r5, r6, r7              @ encoding: [0xf5,0x1b]
 114 @ CHECK: addeq  r1, r2, #4              @ encoding: [0x11,0x1d]