test/MC/ARM/arm_instructions.s

   1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s \
   2 @ RUN:  | FileCheck %s -check-prefix=ALL
   3 @ RUN: llvm-mc -mcpu=cortex-a9 -triple armv7-unknown-nacl -show-encoding %s \
   4 @ RUN:  | FileCheck %s -check-prefix=NACL
   5 @ RUN: llvm-mc -mcpu=cortex-a8 -mattr=+nacl-trap -triple armv7 -show-encoding %s \
   6 @ RUN:  | FileCheck %s -check-prefix=NACL
   7
   8 @ ALL: trap
   9 @ ALL: encoding: [0xfe,0xde,0xff,0xe7]
  10 @ NACL: trap
  11 @ NACL: encoding: [0xf0,0xde,0xfe,0xe7]
  12         trap
  13
  14 @ CHECK: bx     lr
  15 @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1]
  16         bx lr
  17
  18 @ CHECK: vqdmull.s32    q8, d17, d16
  19 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2]
  20         vqdmull.s32     q8, d17, d16
  21
  22 @ CHECK: and    r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
  23         and r1,r2,r3
  24
  25 @ CHECK: ands   r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
  26         ands r1,r2,r3
  27
  28 @ CHECK: eor    r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
  29         eor r1,r2,r3
  30
  31 @ CHECK: eors   r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
  32         eors r1,r2,r3
  33
  34 @ CHECK: sub    r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
  35         sub r1,r2,r3
  36
  37 @ CHECK: subs   r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0]
  38         subs r1,r2,r3
  39
  40 @ CHECK: add    r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0]
  41         add r1,r2,r3
  42
  43 @ CHECK: adds   r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0]
  44         adds r1,r2,r3
  45
  46 @ CHECK: adc    r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0]
  47         adc r1,r2,r3
  48
  49 @ CHECK: bic    r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1]
  50         bic r1,r2,r3
  51
  52 @ CHECK: bics   r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1]
  53         bics r1,r2,r3
  54
  55 @ CHECK: mov    r1, r2 @ encoding: [0x02,0x10,0xa0,0xe1]
  56         mov r1,r2
  57
  58 @ CHECK: mvn    r1, r2 @ encoding: [0x02,0x10,0xe0,0xe1]
  59         mvn r1,r2
  60
  61 @ CHECK: mvns   r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1]
  62         mvns r1,r2
  63
  64 @ CHECK: bfi  r0, r0, #5, #7 @ encoding: [0x90,0x02,0xcb,0xe7]
  65         bfi  r0, r0, #5, #7
  66
  67 @ CHECK: bkpt  #10 @ encoding: [0x7a,0x00,0x20,0xe1]
  68         bkpt  #10
  69
  70 @ CHECK: cdp  p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee]
  71         cdp  p7, #1, c1, c1, c1, #4
  72 @ CHECK: cdp2  p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
  73         cdp2  p7, #1, c1, c1, c1, #4
  74
  75 @ CHECK: add    r1, r2, r3, lsl r4      @ encoding: [0x13,0x14,0x82,0xe0]
  76   add r1, r2, r3, lsl r4
  77
  78 @ CHECK: ssat16  r0, #7, r0 @ encoding: [0x30,0x0f,0xa6,0xe6]
  79         ssat16  r0, #7, r0
  80
  81 @ CHECK: cpsie none, #0                @ encoding: [0x00,0x00,0x0a,0xf1]
  82         cpsie none, #0
  83
  84 @ CHECK: strh r3, [r2, #-0]            @ encoding: [0xb0,0x30,0x42,0xe1]
  85         strh r3, [r2, #-0]
  86