1 ; RUN: llc < %s -march=xcore | FileCheck %s
3 ; I am currently fixing this test case.
5 ; CHECK-LABEL: atomic_fence
11 define void @atomic_fence() nounwind {
20 @pool = external global i64
22 define void @atomicloadstore() nounwind {
24 ; CHECK-LABEL: atomicloadstore
26 ; CHECK: ldw r0, dp[pool]
27 ; CHECK-NEXT: #MEMBARRIER
28 %0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4
30 ; CHECK-NEXT: ldaw r1, dp[pool]
31 ; CHECK-NEXT: ldc r2, 0
33 ; CHECK-NEXT: ld16s r3, r1[r2]
34 ; CHECK-NEXT: #MEMBARRIER
35 %1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2
37 ; CHECK-NEXT: ld8u r11, r1[r2]
38 ; CHECK-NEXT: #MEMBARRIER
39 %2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1
41 ; CHECK-NEXT: ldw r4, dp[pool]
42 ; CHECK-NEXT: #MEMBARRIER
43 %3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4
45 ; CHECK-NEXT: ld16s r5, r1[r2]
46 ; CHECK-NEXT: #MEMBARRIER
47 %4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2
49 ; CHECK-NEXT: ld8u r6, r1[r2]
50 ; CHECK-NEXT: #MEMBARRIER
51 %5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1
53 ; CHECK-NEXT: #MEMBARRIER
54 ; CHECK-NEXT: stw r0, dp[pool]
55 store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
57 ; CHECK-NEXT: #MEMBARRIER
58 ; CHECK-NEXT: st16 r3, r1[r2]
59 store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
61 ; CHECK-NEXT: #MEMBARRIER
62 ; CHECK-NEXT: st8 r11, r1[r2]
63 store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
65 ; CHECK-NEXT: #MEMBARRIER
66 ; CHECK-NEXT: stw r4, dp[pool]
67 ; CHECK-NEXT: #MEMBARRIER
68 store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
70 ; CHECK-NEXT: #MEMBARRIER
71 ; CHECK-NEXT: st16 r5, r1[r2]
72 ; CHECK-NEXT: #MEMBARRIER
73 store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
75 ; CHECK-NEXT: #MEMBARRIER
76 ; CHECK-NEXT: st8 r6, r1[r2]
77 ; CHECK-NEXT: #MEMBARRIER
78 store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
80 ; CHECK-NEXT: ldw r0, dp[pool]
81 ; CHECK-NEXT: stw r0, dp[pool]
82 ; CHECK-NEXT: ld16s r0, r1[r2]
83 ; CHECK-NEXT: st16 r0, r1[r2]
84 ; CHECK-NEXT: ld8u r0, r1[r2]
85 ; CHECK-NEXT: st8 r0, r1[r2]
86 %6 = load atomic i32* bitcast (i64* @pool to i32*) monotonic, align 4
87 store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
88 %7 = load atomic i16* bitcast (i64* @pool to i16*) monotonic, align 2
89 store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
90 %8 = load atomic i8* bitcast (i64* @pool to i8*) monotonic, align 1
91 store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1