1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -disable-fp-elim | FileCheck %s
3 ; Note: Print verbose stackmaps using -debug-only=stackmaps.
5 ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
6 ; CHECK-NEXT: __LLVM_StackMaps:
10 ; CHECK-NEXT: .long _constantargs
12 ; CHECK-NEXT: .long _osrinline
13 ; CHECK-NEXT: .long 24
14 ; CHECK-NEXT: .long _osrcold
16 ; CHECK-NEXT: .long _propertyRead
18 ; CHECK-NEXT: .long _propertyWrite
20 ; CHECK-NEXT: .long _jsVoidCall
22 ; CHECK-NEXT: .long _jsIntCall
24 ; CHECK-NEXT: .long _spilledValue
25 ; CHECK-NEXT: .long 56
26 ; CHECK-NEXT: .long _spilledStackMapValue
27 ; CHECK-NEXT: .long 56
28 ; CHECK-NEXT: .long _spillSubReg
29 ; CHECK-NEXT: .long 56
30 ; CHECK-NEXT: .long _subRegOffset
31 ; CHECK-NEXT: .long 56
32 ; CHECK-NEXT: .long _liveConstant
34 ; CHECK-NEXT: .long _directFrameIdx
35 ; CHECK-NEXT: .long 56
36 ; CHECK-NEXT: .long _longid
38 ; CHECK-NEXT: .long _clobberScratch
39 ; CHECK-NEXT: .long 56
42 ; CHECK-NEXT: .quad 2147483648
43 ; CHECK-NEXT: .quad 4294967295
44 ; CHECK-NEXT: .quad 4294967296
46 ; CHECK-NEXT: .long 19
51 ; CHECK-NEXT: .long L{{.*}}-_constantargs
52 ; CHECK-NEXT: .short 0
53 ; CHECK-NEXT: .short 12
57 ; CHECK-NEXT: .short 0
58 ; CHECK-NEXT: .long -1
62 ; CHECK-NEXT: .short 0
63 ; CHECK-NEXT: .long -1
67 ; CHECK-NEXT: .short 0
68 ; CHECK-NEXT: .long 65536
72 ; CHECK-NEXT: .short 0
73 ; CHECK-NEXT: .long 2000000000
77 ; CHECK-NEXT: .short 0
78 ; CHECK-NEXT: .long 2147483647
82 ; CHECK-NEXT: .short 0
83 ; CHECK-NEXT: .long -1
87 ; CHECK-NEXT: .short 0
88 ; CHECK-NEXT: .long -1
92 ; CHECK-NEXT: .short 0
94 ; LargeConstant at index 0
97 ; CHECK-NEXT: .short 0
99 ; LargeConstant at index 1
100 ; CHECK-NEXT: .byte 5
101 ; CHECK-NEXT: .byte 8
102 ; CHECK-NEXT: .short 0
103 ; CHECK-NEXT: .long 1
104 ; LargeConstant at index 2
105 ; CHECK-NEXT: .byte 5
106 ; CHECK-NEXT: .byte 8
107 ; CHECK-NEXT: .short 0
108 ; CHECK-NEXT: .long 2
110 ; CHECK-NEXT: .byte 4
111 ; CHECK-NEXT: .byte 8
112 ; CHECK-NEXT: .short 0
113 ; CHECK-NEXT: .long -1
115 define void @constantargs() {
117 %0 = inttoptr i64 12345 to i8*
118 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 1, i32 15, i8* %0, i32 0, i16 65535, i16 -1, i32 65536, i32 2000000000, i32 2147483647, i32 -1, i32 4294967295, i32 4294967296, i64 2147483648, i64 4294967295, i64 4294967296, i64 -1)
124 ; CHECK-LABEL: .long L{{.*}}-_osrinline
125 ; CHECK-NEXT: .short 0
126 ; CHECK-NEXT: .short 2
127 ; CHECK-NEXT: .byte 1
128 ; CHECK-NEXT: .byte 8
129 ; CHECK-NEXT: .short {{[0-9]+}}
130 ; CHECK-NEXT: .long 0
131 ; CHECK-NEXT: .byte 1
132 ; CHECK-NEXT: .byte 8
133 ; CHECK-NEXT: .short {{[0-9]+}}
134 ; CHECK-NEXT: .long 0
135 define void @osrinline(i64 %a, i64 %b) {
137 ; Runtime void->void call.
138 call void inttoptr (i64 -559038737 to void ()*)()
139 ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars.
140 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b)
146 ; 2 live variables in register.
148 ; CHECK-LABEL: .long L{{.*}}-_osrcold
149 ; CHECK-NEXT: .short 0
150 ; CHECK-NEXT: .short 2
151 ; CHECK-NEXT: .byte 1
152 ; CHECK-NEXT: .byte 8
153 ; CHECK-NEXT: .short {{[0-9]+}}
154 ; CHECK-NEXT: .long 0
155 ; CHECK-NEXT: .byte 1
156 ; CHECK-NEXT: .byte 8
157 ; CHECK-NEXT: .short {{[0-9]+}}
158 ; CHECK-NEXT: .long 0
159 define void @osrcold(i64 %a, i64 %b) {
161 %test = icmp slt i64 %a, %b
162 br i1 %test, label %ret, label %cold
164 ; OSR patchpoint with 12-byte nop-slide and 2 live vars.
165 %thunk = inttoptr i64 -559038737 to i8*
166 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4, i32 15, i8* %thunk, i32 0, i64 %a, i64 %b)
173 ; CHECK-LABEL: .long L{{.*}}-_propertyRead
174 ; CHECK-NEXT: .short 0
175 ; CHECK-NEXT: .short 2
176 ; CHECK-NEXT: .byte 1
177 ; CHECK-NEXT: .byte 8
178 ; CHECK-NEXT: .short {{[0-9]+}}
179 ; CHECK-NEXT: .long 0
180 ; CHECK-NEXT: .byte 1
181 ; CHECK-NEXT: .byte 8
182 ; CHECK-NEXT: .short {{[0-9]+}}
183 ; CHECK-NEXT: .long 0
184 define i64 @propertyRead(i64* %obj) {
186 %resolveRead = inttoptr i64 -559038737 to i8*
187 %result = call anyregcc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 15, i8* %resolveRead, i32 1, i64* %obj)
188 %add = add i64 %result, 3
193 ; CHECK-LABEL: .long L{{.*}}-_propertyWrite
194 ; CHECK-NEXT: .short 0
195 ; CHECK-NEXT: .short 2
196 ; CHECK-NEXT: .byte 1
197 ; CHECK-NEXT: .byte 8
198 ; CHECK-NEXT: .short {{[0-9]+}}
199 ; CHECK-NEXT: .long 0
200 ; CHECK-NEXT: .byte 1
201 ; CHECK-NEXT: .byte 8
202 ; CHECK-NEXT: .short {{[0-9]+}}
203 ; CHECK-NEXT: .long 0
204 define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) {
206 %resolveWrite = inttoptr i64 -559038737 to i8*
207 call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 6, i32 15, i8* %resolveWrite, i32 2, i64* %obj, i64 %a)
213 ; 2 live variables in registers.
215 ; CHECK-LABEL: .long L{{.*}}-_jsVoidCall
216 ; CHECK-NEXT: .short 0
217 ; CHECK-NEXT: .short 2
218 ; CHECK-NEXT: .byte 1
219 ; CHECK-NEXT: .byte 8
220 ; CHECK-NEXT: .short {{[0-9]+}}
221 ; CHECK-NEXT: .long 0
222 ; CHECK-NEXT: .byte 1
223 ; CHECK-NEXT: .byte 8
224 ; CHECK-NEXT: .short {{[0-9]+}}
225 ; CHECK-NEXT: .long 0
226 define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) {
228 %resolveCall = inttoptr i64 -559038737 to i8*
229 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 7, i32 15, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2)
235 ; 2 live variables in registers.
237 ; CHECK-LABEL: .long L{{.*}}-_jsIntCall
238 ; CHECK-NEXT: .short 0
239 ; CHECK-NEXT: .short 2
240 ; CHECK-NEXT: .byte 1
241 ; CHECK-NEXT: .byte 8
242 ; CHECK-NEXT: .short {{[0-9]+}}
243 ; CHECK-NEXT: .long 0
244 ; CHECK-NEXT: .byte 1
245 ; CHECK-NEXT: .byte 8
246 ; CHECK-NEXT: .short {{[0-9]+}}
247 ; CHECK-NEXT: .long 0
248 define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) {
250 %resolveCall = inttoptr i64 -559038737 to i8*
251 %result = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 8, i32 15, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2)
252 %add = add i64 %result, 3
256 ; Spilled stack map values.
258 ; Verify 17 stack map entries.
260 ; CHECK-LABEL: .long L{{.*}}-_spilledValue
261 ; CHECK-NEXT: .short 0
262 ; CHECK-NEXT: .short 17
264 ; Check that at least one is a spilled entry from RBP.
265 ; Location: Indirect RBP + ...
267 ; CHECK-NEXT: .byte 8
268 ; CHECK-NEXT: .short 6
269 define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
271 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 11, i32 15, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
275 ; Spilled stack map values.
277 ; Verify 17 stack map entries.
279 ; CHECK-LABEL: .long L{{.*}}-_spilledStackMapValue
280 ; CHECK-NEXT: .short 0
281 ; CHECK-NEXT: .short 17
283 ; Check that at least one is a spilled entry from RBP.
284 ; Location: Indirect RBP + ...
286 ; CHECK-NEXT: .byte 8
287 ; CHECK-NEXT: .short 6
288 define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
290 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 12, i32 15, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
294 ; Spill a subregister stackmap operand.
296 ; CHECK-LABEL: .long L{{.*}}-_spillSubReg
297 ; CHECK-NEXT: .short 0
299 ; CHECK-NEXT: .short 1
301 ; Check that the subregister operand is a 4-byte spill.
302 ; Location: Indirect, 4-byte, RBP + ...
304 ; CHECK-NEXT: .byte 4
305 ; CHECK-NEXT: .short 6
306 define void @spillSubReg(i64 %arg) #0 {
308 br i1 undef, label %bb1, label %bb2
314 %tmp = load i64* inttoptr (i64 140685446136880 to i64*)
315 br i1 undef, label %bb16, label %bb17
321 %tmp32 = trunc i64 %tmp to i32
322 br i1 undef, label %bb60, label %bb61
325 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
326 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 13, i32 5, i32 %tmp32)
333 ; Map a single byte subregister. There is no DWARF register number, so
334 ; we expect the register to be encoded with the proper size and spill offset. We don't know which
336 ; CHECK-LABEL: .long L{{.*}}-_subRegOffset
337 ; CHECK-NEXT: .short 0
339 ; CHECK-NEXT: .short 2
341 ; Check that the subregister operands are 1-byte spills.
342 ; Location 0: Register, 4-byte, AL
343 ; CHECK-NEXT: .byte 1
344 ; CHECK-NEXT: .byte 1
345 ; CHECK-NEXT: .short 0
346 ; CHECK-NEXT: .long 0
348 ; Location 1: Register, 4-byte, BL
349 ; CHECK-NEXT: .byte 1
350 ; CHECK-NEXT: .byte 1
351 ; CHECK-NEXT: .short 3
352 ; CHECK-NEXT: .long 0
353 define void @subRegOffset(i16 %arg) {
355 %a0 = trunc i16 %v to i8
356 tail call void asm sideeffect "nop", "~{bx}"() nounwind
357 %arghi = lshr i16 %v, 8
358 %a1 = trunc i16 %arghi to i8
359 tail call void asm sideeffect "nop", "~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
360 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 5, i8 %a0, i8 %a1)
364 ; Map a constant value.
366 ; CHECK-LABEL: .long L{{.*}}-_liveConstant
367 ; CHECK-NEXT: .short 0
369 ; CHECK-NEXT: .short 1
370 ; Loc 0: SmallConstant
371 ; CHECK-NEXT: .byte 4
372 ; CHECK-NEXT: .byte 8
373 ; CHECK-NEXT: .short 0
374 ; CHECK-NEXT: .long 33
376 define void @liveConstant() {
377 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 15, i32 5, i32 33)
381 ; Directly map an alloca's address.
384 ; CHECK-LABEL: .long L{{.*}}-_directFrameIdx
385 ; CHECK-NEXT: .short 0
387 ; CHECK-NEXT: .short 1
388 ; Loc 0: Direct RBP - ofs
389 ; CHECK-NEXT: .byte 2
390 ; CHECK-NEXT: .byte 8
391 ; CHECK-NEXT: .short 6
395 ; CHECK-LABEL: .long L{{.*}}-_directFrameIdx
396 ; CHECK-NEXT: .short 0
398 ; CHECK-NEXT: .short 2
399 ; Loc 0: Direct RBP - ofs
400 ; CHECK-NEXT: .byte 2
401 ; CHECK-NEXT: .byte 8
402 ; CHECK-NEXT: .short 6
404 ; Loc 1: Direct RBP - ofs
405 ; CHECK-NEXT: .byte 2
406 ; CHECK-NEXT: .byte 8
407 ; CHECK-NEXT: .short 6
409 define void @directFrameIdx() {
411 %metadata1 = alloca i64, i32 3, align 8
412 store i64 11, i64* %metadata1
413 store i64 12, i64* %metadata1
414 store i64 13, i64* %metadata1
415 call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 0, i64* %metadata1)
416 %metadata2 = alloca i8, i32 4, align 8
417 %metadata3 = alloca i16, i32 4, align 8
418 call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 17, i32 5, i8* null, i32 0, i8* %metadata2, i16* %metadata3)
424 ; CHECK: .quad 4294967295
425 ; CHECK-LABEL: .long L{{.*}}-_longid
426 ; CHECK: .quad 4294967296
427 ; CHECK-LABEL: .long L{{.*}}-_longid
428 ; CHECK: .quad 9223372036854775807
429 ; CHECK-LABEL: .long L{{.*}}-_longid
431 ; CHECK-LABEL: .long L{{.*}}-_longid
432 define void @longid() {
434 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4294967295, i32 0, i8* null, i32 0)
435 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4294967296, i32 0, i8* null, i32 0)
436 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 9223372036854775807, i32 0, i8* null, i32 0)
437 tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 -1, i32 0, i8* null, i32 0)
441 ; Map a value when R11 is the only free register.
442 ; The scratch register should not be used for a live stackmap value.
444 ; CHECK-LABEL: .long L{{.*}}-_clobberScratch
445 ; CHECK-NEXT: .short 0
447 ; CHECK-NEXT: .short 1
448 ; Loc 0: Indirect fp - offset
449 ; CHECK-NEXT: .byte 3
450 ; CHECK-NEXT: .byte 4
451 ; CHECK-NEXT: .short 6
452 ; CHECK-NEXT: .long -{{[0-9]+}}
453 define void @clobberScratch(i32 %a) {
454 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r12},~{r13},~{r14},~{r15}"() nounwind
455 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 8, i32 %a)
459 declare void @llvm.experimental.stackmap(i64, i32, ...)
460 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
461 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)