1 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s -check-prefix=SSE2
2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s -check-prefix=AVX
4 define <8 x i16> @test1(<8 x i16> %A, <8 x i16> %B) {
7 ; SSE2-NEXT: movd %xmm1, %eax
8 ; SSE2-NEXT: movzwl %ax, %eax
9 ; SSE2-NEXT: movd %eax, %xmm1
10 ; SSE2-NEXT: psllw %xmm1, %xmm0
14 ; AVX-NEXT: vmovd %xmm1, %eax
15 ; AVX-NEXT: movzwl %ax, %eax
16 ; AVX-NEXT: vmovd %eax, %xmm1
17 ; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0
20 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
21 %shl = shl <8 x i16> %A, %vecinit14
25 define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) {
28 ; SSE2-NEXT: xorps %xmm2, %xmm2
29 ; SSE2-NEXT: movss %xmm1, %xmm2
30 ; SSE2-NEXT: pslld %xmm2, %xmm0
34 ; AVX-NEXT: vpxor %xmm2, %xmm2
35 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
36 ; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0
39 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
40 %shl = shl <4 x i32> %A, %vecinit6
44 define <2 x i64> @test3(<2 x i64> %A, <2 x i64> %B) {
47 ; SSE2-NEXT: psllq %xmm1, %xmm0
51 ; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0
54 %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
55 %shl = shl <2 x i64> %A, %vecinit2
59 define <8 x i16> @test4(<8 x i16> %A, <8 x i16> %B) {
62 ; SSE2-NEXT: movd %xmm1, %eax
63 ; SSE2-NEXT: movzwl %ax, %eax
64 ; SSE2-NEXT: movd %eax, %xmm1
65 ; SSE2-NEXT: psrlw %xmm1, %xmm0
69 ; AVX-NEXT: vmovd %xmm1, %eax
70 ; AVX-NEXT: movzwl %ax, %eax
71 ; AVX-NEXT: vmovd %eax, %xmm1
72 ; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
75 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
76 %shr = lshr <8 x i16> %A, %vecinit14
80 define <4 x i32> @test5(<4 x i32> %A, <4 x i32> %B) {
83 ; SSE2-NEXT: xorps %xmm2, %xmm2
84 ; SSE2-NEXT: movss %xmm1, %xmm2
85 ; SSE2-NEXT: psrld %xmm2, %xmm0
89 ; AVX-NEXT: vpxor %xmm2, %xmm2
90 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
91 ; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0
94 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
95 %shr = lshr <4 x i32> %A, %vecinit6
99 define <2 x i64> @test6(<2 x i64> %A, <2 x i64> %B) {
102 ; SSE2-NEXT: psrlq %xmm1, %xmm0
106 ; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
109 %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
110 %shr = lshr <2 x i64> %A, %vecinit2
114 define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) {
117 ; SSE2-NEXT: movd %xmm1, %eax
118 ; SSE2-NEXT: movzwl %ax, %eax
119 ; SSE2-NEXT: movd %eax, %xmm1
120 ; SSE2-NEXT: psraw %xmm1, %xmm0
124 ; AVX-NEXT: vmovd %xmm1, %eax
125 ; AVX-NEXT: movzwl %ax, %eax
126 ; AVX-NEXT: vmovd %eax, %xmm1
127 ; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0
130 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
131 %shr = ashr <8 x i16> %A, %vecinit14
135 define <4 x i32> @test8(<4 x i32> %A, <4 x i32> %B) {
138 ; SSE2-NEXT: xorps %xmm2, %xmm2
139 ; SSE2-NEXT: movss %xmm1, %xmm2
140 ; SSE2-NEXT: psrad %xmm2, %xmm0
144 ; AVX-NEXT: vpxor %xmm2, %xmm2
145 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
146 ; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0
149 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
150 %shr = ashr <4 x i32> %A, %vecinit6