1 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s -check-prefix=SSE2
2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s -check-prefix=AVX
4 define <8 x i16> @test1(<8 x i16> %A, <8 x i16> %B) {
7 ; SSE2-NEXT: movd %xmm1, %eax
8 ; SSE2-NEXT: movzwl %ax, %eax
9 ; SSE2-NEXT: movd %eax, %xmm1
10 ; SSE2-NEXT: psllw %xmm1, %xmm0
14 ; AVX-NEXT: vmovd %xmm1, %eax
15 ; AVX-NEXT: movzwl %ax, %eax
16 ; AVX-NEXT: vmovd %eax, %xmm1
17 ; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0
20 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
21 %shl = shl <8 x i16> %A, %vecinit14
25 define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) {
28 ; SSE2-NEXT: xorps %xmm2, %xmm2
29 ; SSE2-NEXT: movss %xmm1, %xmm2
30 ; SSE2-NEXT: pslld %xmm2, %xmm0
34 ; AVX-NEXT: vpxor %xmm2, %xmm2
35 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
36 ; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0
39 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
40 %shl = shl <4 x i32> %A, %vecinit6
44 define <2 x i64> @test3(<2 x i64> %A, <2 x i64> %B) {
47 ; SSE2-NEXT: movd %xmm1, %rax
48 ; SSE2-NEXT: movd %eax, %xmm1
49 ; SSE2-NEXT: psllq %xmm1, %xmm0
53 ; AVX-NEXT: vmovq %xmm1, %rax
54 ; AVX-NEXT: vmovd %eax, %xmm1
55 ; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0
58 %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
59 %shl = shl <2 x i64> %A, %vecinit2
63 define <8 x i16> @test4(<8 x i16> %A, <8 x i16> %B) {
66 ; SSE2-NEXT: movd %xmm1, %eax
67 ; SSE2-NEXT: movzwl %ax, %eax
68 ; SSE2-NEXT: movd %eax, %xmm1
69 ; SSE2-NEXT: psrlw %xmm1, %xmm0
73 ; AVX-NEXT: vmovd %xmm1, %eax
74 ; AVX-NEXT: movzwl %ax, %eax
75 ; AVX-NEXT: vmovd %eax, %xmm1
76 ; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
79 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
80 %shr = lshr <8 x i16> %A, %vecinit14
84 define <4 x i32> @test5(<4 x i32> %A, <4 x i32> %B) {
87 ; SSE2-NEXT: xorps %xmm2, %xmm2
88 ; SSE2-NEXT: movss %xmm1, %xmm2
89 ; SSE2-NEXT: psrld %xmm2, %xmm0
93 ; AVX-NEXT: vpxor %xmm2, %xmm2
94 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
95 ; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0
98 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
99 %shr = lshr <4 x i32> %A, %vecinit6
103 define <2 x i64> @test6(<2 x i64> %A, <2 x i64> %B) {
106 ; SSE2-NEXT: movd %xmm1, %rax
107 ; SSE2-NEXT: movd %eax, %xmm1
108 ; SSE2-NEXT: psrlq %xmm1, %xmm0
112 ; AVX-NEXT: vmovq %xmm1, %rax
113 ; AVX-NEXT: vmovd %eax, %xmm1
114 ; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
117 %vecinit2 = shufflevector <2 x i64> %B, <2 x i64> undef, <2 x i32> zeroinitializer
118 %shr = lshr <2 x i64> %A, %vecinit2
122 define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) {
125 ; SSE2-NEXT: movd %xmm1, %eax
126 ; SSE2-NEXT: movzwl %ax, %eax
127 ; SSE2-NEXT: movd %eax, %xmm1
128 ; SSE2-NEXT: psraw %xmm1, %xmm0
132 ; AVX-NEXT: vmovd %xmm1, %eax
133 ; AVX-NEXT: movzwl %ax, %eax
134 ; AVX-NEXT: vmovd %eax, %xmm1
135 ; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0
138 %vecinit14 = shufflevector <8 x i16> %B, <8 x i16> undef, <8 x i32> zeroinitializer
139 %shr = ashr <8 x i16> %A, %vecinit14
143 define <4 x i32> @test8(<4 x i32> %A, <4 x i32> %B) {
146 ; SSE2-NEXT: xorps %xmm2, %xmm2
147 ; SSE2-NEXT: movss %xmm1, %xmm2
148 ; SSE2-NEXT: psrad %xmm2, %xmm0
152 ; AVX-NEXT: vpxor %xmm2, %xmm2
153 ; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
154 ; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0
157 %vecinit6 = shufflevector <4 x i32> %B, <4 x i32> undef, <4 x i32> zeroinitializer
158 %shr = ashr <4 x i32> %A, %vecinit6