2 ; disabled: llc -mcpu=generic -mtriple=i686-unknown-unknown < %s | FileCheck %s
3 ; Disabled for a single commit only.
4 define i64 @test1(i32 %xx, i32 %test) nounwind {
5 %conv = zext i32 %xx to i64
6 %and = and i32 %test, 7
7 %sh_prom = zext i32 %and to i64
8 %shl = shl i64 %conv, %sh_prom
11 ; CHECK: shll %cl, %eax
14 ; CHECK: shrl %cl, %edx
17 define i64 @test2(i64 %xx, i32 %test) nounwind {
18 %and = and i32 %test, 7
19 %sh_prom = zext i32 %and to i64
20 %shl = shl i64 %xx, %sh_prom
23 ; CHECK: shll %cl, %esi
26 ; CHECK: shrl %cl, %edx
27 ; CHECK: orl %esi, %edx
28 ; CHECK: shll %cl, %eax
31 define i64 @test3(i64 %xx, i32 %test) nounwind {
32 %and = and i32 %test, 7
33 %sh_prom = zext i32 %and to i64
34 %shr = lshr i64 %xx, %sh_prom
37 ; CHECK: shrl %cl, %esi
38 ; CHECK: leal (%edx,%edx), %eax
39 ; CHECK: xorb $31, %cl
40 ; CHECK: shll %cl, %eax
41 ; CHECK: orl %esi, %eax
42 ; CHECK: shrl %cl, %edx
45 define i64 @test4(i64 %xx, i32 %test) nounwind {
46 %and = and i32 %test, 7
47 %sh_prom = zext i32 %and to i64
48 %shr = ashr i64 %xx, %sh_prom
51 ; CHECK: shrl %cl, %esi
52 ; CHECK: leal (%edx,%edx), %eax
53 ; CHECK: xorb $31, %cl
54 ; CHECK: shll %cl, %eax
55 ; CHECK: orl %esi, %eax
56 ; CHECK: sarl %cl, %edx
60 define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {
61 %shl = shl <2 x i64> %A, %B