1 ; RUN: llc < %s -march=x86-64 | FileCheck %s
2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
4 define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
8 ; CHECK-NEXT: movl $12, %eax
9 ; CHECK-NEXT: cmovae (%rcx), %eax
12 %0 = lshr i32 %x, %n ; <i32> [#uses=1]
13 %1 = and i32 %0, 1 ; <i32> [#uses=1]
14 %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
16 %.0 = select i1 %toBool, i32 %v, i32 12 ; <i32> [#uses=1]
19 define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
23 ; CHECK-NEXT: movl $12, %eax
24 ; CHECK-NEXT: cmovb (%rcx), %eax
27 %0 = lshr i32 %x, %n ; <i32> [#uses=1]
28 %1 = and i32 %0, 1 ; <i32> [#uses=1]
29 %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
31 %.0 = select i1 %toBool, i32 12, i32 %v ; <i32> [#uses=1]
36 declare void @bar(i64) nounwind
38 define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
40 ; CHECK: cmovne %edi, %esi
41 ; CHECK-NEXT: movl %esi, %edi
43 %c = trunc i64 %a to i32
44 %d = trunc i64 %b to i32
45 %e = select i1 %p, i32 %c, i32 %d
46 %f = zext i32 %e to i64
47 call void @bar(i64 %f)
53 ; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
54 ; move without recomputing EFLAGS, because the expansion of the conditional
55 ; move with control flow may clobber EFLAGS (e.g., with xor, to set the
58 ; The test is a little awkward; the important part is that there's a test before the
63 @g_3 = external global i8 ; <i8*> [#uses=1]
64 @g_96 = external global i8 ; <i8*> [#uses=2]
65 @g_100 = external global i8 ; <i8*> [#uses=2]
66 @_2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1]
68 define i32 @test4() nounwind {
70 %0 = load i8* @g_3, align 1 ; <i8> [#uses=2]
71 %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
72 %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1]
73 %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1]
74 %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1]
75 %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1]
76 %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
77 %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2]
78 %g_96.promoted.i = load i8* @g_96 ; <i8> [#uses=3]
79 %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2]
80 br i1 %3, label %func_4.exit.i, label %bb.i.i.i
82 bb.i.i.i: ; preds = %entry
83 %4 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
84 br label %func_4.exit.i
89 ; CHECK: testb %al, %al
90 ; CHECK-NEXT: setne %al
93 func_4.exit.i: ; preds = %bb.i.i.i, %entry
94 %.not.i = xor i1 %2, true ; <i1> [#uses=1]
95 %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1]
96 %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
97 br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
99 bb.i.i: ; preds = %func_4.exit.i
100 %5 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
101 br label %func_1.exit
103 func_1.exit: ; preds = %bb.i.i, %func_4.exit.i
104 %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
105 store i8 %g_96.tmp.0.i, i8* @g_96
106 %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1]
107 %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
111 declare i32 @printf(i8* nocapture, ...) nounwind
114 ; Should compile to setcc | -2.
116 define i32 @test5(i32* nocapture %P) nounwind readonly {
120 ; CHECK: movzbl %al, %eax
121 ; CHECK: orl $-2, %eax
124 %0 = load i32* %P, align 4 ; <i32> [#uses=1]
125 %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
126 %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
130 define i32 @test6(i32* nocapture %P) nounwind readonly {
134 ; CHECK: movzbl %al, %eax
135 ; CHECK: leal 4(%rax,%rax,8), %eax
137 %0 = load i32* %P, align 4 ; <i32> [#uses=1]
138 %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
139 %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1]