1 ;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
8 call void @llvm.AMDGPU.shader.type(i32 1)
9 %0 = load <4 x i32> addrspace(2)* addrspace(8)* inttoptr (i32 6 to <4 x i32> addrspace(2)* addrspace(8)*)
10 %1 = getelementptr <4 x i32> addrspace(2)* %0, i32 0
11 %2 = load <4 x i32> addrspace(2)* %1
12 %3 = call i32 @llvm.SI.vs.load.buffer.index()
13 %4 = call <4 x float> @llvm.SI.vs.load.input(<4 x i32> %2, i32 0, i32 %3)
14 %5 = extractelement <4 x float> %4, i32 0
15 %6 = extractelement <4 x float> %4, i32 1
16 %7 = extractelement <4 x float> %4, i32 2
17 %8 = extractelement <4 x float> %4, i32 3
18 %9 = load <4 x i32> addrspace(2)* addrspace(8)* inttoptr (i32 6 to <4 x i32> addrspace(2)* addrspace(8)*)
19 %10 = getelementptr <4 x i32> addrspace(2)* %9, i32 1
20 %11 = load <4 x i32> addrspace(2)* %10
21 %12 = call i32 @llvm.SI.vs.load.buffer.index()
22 %13 = call <4 x float> @llvm.SI.vs.load.input(<4 x i32> %11, i32 0, i32 %12)
23 %14 = extractelement <4 x float> %13, i32 0
24 %15 = extractelement <4 x float> %13, i32 1
25 %16 = extractelement <4 x float> %13, i32 2
26 %17 = extractelement <4 x float> %13, i32 3
27 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %14, float %15, float %16, float %17)
28 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %5, float %6, float %7, float %8)
32 declare void @llvm.AMDGPU.shader.type(i32)
34 declare i32 @llvm.SI.vs.load.buffer.index() readnone
36 declare <4 x float> @llvm.SI.vs.load.input(<4 x i32>, i32, i32)
38 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)