1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; XXX: This testis for a bug in the SIShrinkInstruction pass and it will be
3 ; relevant once we are selecting 64-bit instructions. We are
4 ; currently selecting mostly 32-bit instruction, so the
5 ; SIShrinkInstructions pass isn't doing much.
8 ; Test that we correctly commute a sub instruction
10 ; SI-NOT: V_SUB_I32_e32 v{{[0-9]+}}, s
11 ; SI: V_SUBREV_I32_e32 v{{[0-9]+}}, s
13 ; ModuleID = 'vop-shrink.ll'
15 define void @sub_rev(i32 addrspace(1)* %out, <4 x i32> %sgpr, i32 %cond) {
17 %vgpr = call i32 @llvm.r600.read.tidig.x() #1
18 %tmp = icmp eq i32 %cond, 0
19 br i1 %tmp, label %if, label %else
22 %tmp1 = getelementptr i32 addrspace(1)* %out, i32 1
23 %tmp2 = extractelement <4 x i32> %sgpr, i32 1
24 store i32 %tmp2, i32 addrspace(1)* %out
27 else: ; preds = %entry
28 %tmp3 = extractelement <4 x i32> %sgpr, i32 2
29 %tmp4 = sub i32 %vgpr, %tmp3
30 store i32 %tmp4, i32 addrspace(1)* %out
33 endif: ; preds = %else, %if
37 ; Function Attrs: nounwind readnone
38 declare i32 @llvm.r600.read.tidig.x() #0
40 attributes #0 = { nounwind readnone }
41 attributes #1 = { readnone }