1 ; Check the miscellaneous logical vector operations added in P8
3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
5 define <4 x i32> @test_veqv(<4 x i32> %x, <4 x i32> %y) nounwind {
6 %tmp = xor <4 x i32> %x, %y
7 %ret_val = xor <4 x i32> %tmp, < i32 -1, i32 -1, i32 -1, i32 -1>
13 define <4 x i32> @test_vnand(<4 x i32> %x, <4 x i32> %y) nounwind {
14 %tmp = and <4 x i32> %x, %y
15 %ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>
16 ret <4 x i32> %ret_val
17 ; CHECK: vnand 2, 2, 3
21 define <4 x i32> @test_vorc(<4 x i32> %x, <4 x i32> %y) nounwind {
22 %tmp = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
23 %ret_val = or <4 x i32> %x, %tmp
24 ret <4 x i32> %ret_val