Taints the non-acquire RMW's store address with the load part
[oota-llvm.git] / test / CodeGen / ARM / fpcmp-f64-neon-opt.ll
1 ; RUN: llc -mtriple=linux-arm-gnueabihf -mattr=+neon %s -o - | FileCheck %s
2
3 ; Check that no intermediate integer register is used.
4 define i32 @no-intermediate-register-for-zero-imm(double %x) #0 {
5 entry:
6 ; CHECK-LABEL: no-intermediate-register-for-zero-imm
7 ; CHECK-NOT: vmov
8 ; CHECK: vcmp
9   %cmp = fcmp une double %x, 0.000000e+00
10   %conv = zext i1 %cmp to i32
11   ret i32 %conv
12 }