1 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
3 define float @test_vcvts_f32_s32(i32 %a) {
4 ; CHECK: test_vcvts_f32_s32
5 ; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}
7 %vcvtf.i = insertelement <1 x i32> undef, i32 %a, i32 0
8 %vcvtf1.i = call <1 x float> @llvm.aarch64.neon.vcvtf32.s32(<1 x i32> %vcvtf.i)
9 %0 = extractelement <1 x float> %vcvtf1.i, i32 0
13 declare <1 x float> @llvm.aarch64.neon.vcvtf32.s32(<1 x i32>)
15 define double @test_vcvtd_f64_s64(i64 %a) {
16 ; CHECK: test_vcvtd_f64_s64
17 ; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}
19 %vcvtf.i = insertelement <1 x i64> undef, i64 %a, i32 0
20 %vcvtf1.i = call <1 x double> @llvm.aarch64.neon.vcvtf64.s64(<1 x i64> %vcvtf.i)
21 %0 = extractelement <1 x double> %vcvtf1.i, i32 0
25 declare <1 x double> @llvm.aarch64.neon.vcvtf64.s64(<1 x i64>)
27 define float @test_vcvts_f32_u32(i32 %a) {
28 ; CHECK: test_vcvts_f32_u32
29 ; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}
31 %vcvtf.i = insertelement <1 x i32> undef, i32 %a, i32 0
32 %vcvtf1.i = call <1 x float> @llvm.aarch64.neon.vcvtf32.u32(<1 x i32> %vcvtf.i)
33 %0 = extractelement <1 x float> %vcvtf1.i, i32 0
37 declare <1 x float> @llvm.aarch64.neon.vcvtf32.u32(<1 x i32>)
39 define double @test_vcvtd_f64_u64(i64 %a) {
40 ; CHECK: test_vcvtd_f64_u64
41 ; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}
43 %vcvtf.i = insertelement <1 x i64> undef, i64 %a, i32 0
44 %vcvtf1.i = call <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64> %vcvtf.i)
45 %0 = extractelement <1 x double> %vcvtf1.i, i32 0
49 declare <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64>)
51 define float @test_vcvts_n_f32_s32(i32 %a) {
52 ; CHECK: test_vcvts_n_f32_s32
53 ; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}, #1
55 %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0
56 %vcvtf1 = call <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32> %vcvtf, i32 1)
57 %0 = extractelement <1 x float> %vcvtf1, i32 0
61 declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32>, i32)
63 define double @test_vcvtd_n_f64_s64(i64 %a) {
64 ; CHECK: test_vcvtd_n_f64_s64
65 ; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}, #1
67 %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0
68 %vcvtf1 = call <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64> %vcvtf, i32 1)
69 %0 = extractelement <1 x double> %vcvtf1, i32 0
73 declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64>, i32)
75 define float @test_vcvts_n_f32_u32(i32 %a) {
76 ; CHECK: test_vcvts_n_f32_u32
77 ; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}, #1
79 %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0
80 %vcvtf1 = call <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32> %vcvtf, i32 1)
81 %0 = extractelement <1 x float> %vcvtf1, i32 0
85 declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32>, i32)
87 define double @test_vcvtd_n_f64_u64(i64 %a) {
88 ; CHECK: test_vcvtd_n_f64_u64
89 ; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}, #1
91 %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0
92 %vcvtf1 = call <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64> %vcvtf, i32 1)
93 %0 = extractelement <1 x double> %vcvtf1, i32 0
97 declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64>, i32)
99 define i32 @test_vcvts_n_s32_f32(float %a) {
100 ; CHECK: test_vcvts_n_s32_f32
101 ; CHECK: fcvtzs {{s[0-9]+}}, {{s[0-9]+}}, #0
103 %fcvtzs = insertelement <1 x float> undef, float %a, i32 0
104 %fcvtzs1 = call <1 x i32> @llvm.aarch64.neon.vcvts.n.s32.f32(<1 x float> %fcvtzs, i32 0)
105 %0 = extractelement <1 x i32> %fcvtzs1, i32 0
109 declare <1 x i32> @llvm.aarch64.neon.vcvts.n.s32.f32(<1 x float>, i32)
111 define i64 @test_vcvtd_n_s64_f64(double %a) {
112 ; CHECK: test_vcvtd_n_s64_f64
113 ; CHECK: fcvtzs {{d[0-9]+}}, {{d[0-9]+}}, #0
115 %fcvtzs = insertelement <1 x double> undef, double %a, i32 0
116 %fcvtzs1 = call <1 x i64> @llvm.aarch64.neon.vcvtd.n.s64.f64(<1 x double> %fcvtzs, i32 0)
117 %0 = extractelement <1 x i64> %fcvtzs1, i32 0
121 declare <1 x i64> @llvm.aarch64.neon.vcvtd.n.s64.f64(<1 x double>, i32)
123 define i32 @test_vcvts_n_u32_f32(float %a) {
124 ; CHECK: test_vcvts_n_u32_f32
125 ; CHECK: fcvtzu {{s[0-9]+}}, {{s[0-9]+}}, #0
127 %fcvtzu = insertelement <1 x float> undef, float %a, i32 0
128 %fcvtzu1 = call <1 x i32> @llvm.aarch64.neon.vcvts.n.u32.f32(<1 x float> %fcvtzu, i32 0)
129 %0 = extractelement <1 x i32> %fcvtzu1, i32 0
133 declare <1 x i32> @llvm.aarch64.neon.vcvts.n.u32.f32(<1 x float>, i32)
135 define i64 @test_vcvtd_n_u64_f64(double %a) {
136 ; CHECK: test_vcvtd_n_u64_f64
137 ; CHECK: fcvtzu {{d[0-9]+}}, {{d[0-9]+}}, #0
139 %fcvtzu = insertelement <1 x double> undef, double %a, i32 0
140 %fcvtzu1 = tail call <1 x i64> @llvm.aarch64.neon.vcvtd.n.u64.f64(<1 x double> %fcvtzu, i32 0)
141 %0 = extractelement <1 x i64> %fcvtzu1, i32 0
145 declare <1 x i64> @llvm.aarch64.neon.vcvtd.n.u64.f64(<1 x double>, i32)