1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This transformation analyzes and transforms the induction variables (and
11 // computations derived from them) into forms suitable for efficient execution
14 // This pass performs a strength reduction on array references inside loops that
15 // have as one or more of their components the loop induction variable, it
16 // rewrites expressions to take advantage of scaled-index addressing modes
17 // available on the target, and it performs a variety of other optimizations
18 // related to loop induction variables.
20 // Terminology note: this code has a lot of handling for "post-increment" or
21 // "post-inc" users. This is not talking about post-increment addressing modes;
22 // it is instead talking about code like this:
24 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
26 // %i.next = add %i, 1
27 // %c = icmp eq %i.next, %n
29 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
30 // it's useful to think about these as the same register, with some uses using
31 // the value of the register before the add and some using it after. In this
32 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // the value of the induction variable after the increment. The other common
34 // case of post-increment users is users outside the loop.
36 // TODO: More sophistication in the way Formulae are generated and filtered.
38 // TODO: Handle multiple loops at a time.
40 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
43 // TODO: When truncation is free, truncate ICmp users' operands to make it a
44 // smaller encoding (on x86 at least).
46 // TODO: When a negated register is used by an add (such as in a list of
47 // multiple base registers, or as the increment expression in an addrec),
48 // we may not actually need both reg and (-1 * reg) in registers; the
49 // negation can be implemented by using a sub instead of an add. The
50 // lack of support for taking this into consideration when making
51 // register pressure decisions is partly worked around by the "Special"
54 //===----------------------------------------------------------------------===//
56 #include "llvm/Transforms/Scalar.h"
57 #include "llvm/ADT/DenseSet.h"
58 #include "llvm/ADT/Hashing.h"
59 #include "llvm/ADT/STLExtras.h"
60 #include "llvm/ADT/SetVector.h"
61 #include "llvm/ADT/SmallBitVector.h"
62 #include "llvm/Analysis/IVUsers.h"
63 #include "llvm/Analysis/LoopPass.h"
64 #include "llvm/Analysis/ScalarEvolutionExpander.h"
65 #include "llvm/Analysis/TargetTransformInfo.h"
66 #include "llvm/IR/Constants.h"
67 #include "llvm/IR/DerivedTypes.h"
68 #include "llvm/IR/Dominators.h"
69 #include "llvm/IR/Instructions.h"
70 #include "llvm/IR/IntrinsicInst.h"
71 #include "llvm/IR/Module.h"
72 #include "llvm/IR/ValueHandle.h"
73 #include "llvm/Support/CommandLine.h"
74 #include "llvm/Support/Debug.h"
75 #include "llvm/Support/raw_ostream.h"
76 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
77 #include "llvm/Transforms/Utils/Local.h"
81 #define DEBUG_TYPE "loop-reduce"
83 /// MaxIVUsers is an arbitrary threshold that provides an early opportunitiy for
84 /// bail out. This threshold is far beyond the number of users that LSR can
85 /// conceivably solve, so it should not affect generated code, but catches the
86 /// worst cases before LSR burns too much compile time and stack space.
87 static const unsigned MaxIVUsers = 200;
89 // Temporary flag to cleanup congruent phis after LSR phi expansion.
90 // It's currently disabled until we can determine whether it's truly useful or
91 // not. The flag should be removed after the v3.0 release.
92 // This is now needed for ivchains.
93 static cl::opt<bool> EnablePhiElim(
94 "enable-lsr-phielim", cl::Hidden, cl::init(true),
95 cl::desc("Enable LSR phi elimination"));
98 // Stress test IV chain generation.
99 static cl::opt<bool> StressIVChain(
100 "stress-ivchain", cl::Hidden, cl::init(false),
101 cl::desc("Stress test LSR IV chains"));
103 static bool StressIVChain = false;
109 /// Used in situations where the accessed memory type is unknown.
110 static const unsigned UnknownAddressSpace = ~0u;
115 MemAccessTy() : MemTy(nullptr), AddrSpace(UnknownAddressSpace) {}
117 MemAccessTy(Type *Ty, unsigned AS) :
118 MemTy(Ty), AddrSpace(AS) {}
120 bool operator==(MemAccessTy Other) const {
121 return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace;
124 bool operator!=(MemAccessTy Other) const { return !(*this == Other); }
126 static MemAccessTy getUnknown(LLVMContext &Ctx) {
127 return MemAccessTy(Type::getVoidTy(Ctx), UnknownAddressSpace);
131 /// This class holds data which is used to order reuse candidates.
134 /// This represents the set of LSRUse indices which reference
135 /// a particular register.
136 SmallBitVector UsedByIndices;
138 void print(raw_ostream &OS) const;
144 void RegSortData::print(raw_ostream &OS) const {
145 OS << "[NumUses=" << UsedByIndices.count() << ']';
149 void RegSortData::dump() const {
150 print(errs()); errs() << '\n';
155 /// Map register candidates to information about how they are used.
156 class RegUseTracker {
157 typedef DenseMap<const SCEV *, RegSortData> RegUsesTy;
159 RegUsesTy RegUsesMap;
160 SmallVector<const SCEV *, 16> RegSequence;
163 void countRegister(const SCEV *Reg, size_t LUIdx);
164 void dropRegister(const SCEV *Reg, size_t LUIdx);
165 void swapAndDropUse(size_t LUIdx, size_t LastLUIdx);
167 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
169 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
173 typedef SmallVectorImpl<const SCEV *>::iterator iterator;
174 typedef SmallVectorImpl<const SCEV *>::const_iterator const_iterator;
175 iterator begin() { return RegSequence.begin(); }
176 iterator end() { return RegSequence.end(); }
177 const_iterator begin() const { return RegSequence.begin(); }
178 const_iterator end() const { return RegSequence.end(); }
184 RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) {
185 std::pair<RegUsesTy::iterator, bool> Pair =
186 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
187 RegSortData &RSD = Pair.first->second;
189 RegSequence.push_back(Reg);
190 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
191 RSD.UsedByIndices.set(LUIdx);
195 RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) {
196 RegUsesTy::iterator It = RegUsesMap.find(Reg);
197 assert(It != RegUsesMap.end());
198 RegSortData &RSD = It->second;
199 assert(RSD.UsedByIndices.size() > LUIdx);
200 RSD.UsedByIndices.reset(LUIdx);
204 RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
205 assert(LUIdx <= LastLUIdx);
207 // Update RegUses. The data structure is not optimized for this purpose;
208 // we must iterate through it and update each of the bit vectors.
209 for (auto &Pair : RegUsesMap) {
210 SmallBitVector &UsedByIndices = Pair.second.UsedByIndices;
211 if (LUIdx < UsedByIndices.size())
212 UsedByIndices[LUIdx] =
213 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : 0;
214 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
219 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
220 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
221 if (I == RegUsesMap.end())
223 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
224 int i = UsedByIndices.find_first();
225 if (i == -1) return false;
226 if ((size_t)i != LUIdx) return true;
227 return UsedByIndices.find_next(i) != -1;
230 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
231 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
232 assert(I != RegUsesMap.end() && "Unknown register!");
233 return I->second.UsedByIndices;
236 void RegUseTracker::clear() {
243 /// This class holds information that describes a formula for computing
244 /// satisfying a use. It may include broken-out immediates and scaled registers.
246 /// Global base address used for complex addressing.
249 /// Base offset for complex addressing.
252 /// Whether any complex addressing has a base register.
255 /// The scale of any complex addressing.
258 /// The list of "base" registers for this use. When this is non-empty. The
259 /// canonical representation of a formula is
260 /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
261 /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
262 /// #1 enforces that the scaled register is always used when at least two
263 /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
264 /// #2 enforces that 1 * reg is reg.
265 /// This invariant can be temporarly broken while building a formula.
266 /// However, every formula inserted into the LSRInstance must be in canonical
268 SmallVector<const SCEV *, 4> BaseRegs;
270 /// The 'scaled' register for this use. This should be non-null when Scale is
272 const SCEV *ScaledReg;
274 /// An additional constant offset which added near the use. This requires a
275 /// temporary register, but the offset itself can live in an add immediate
276 /// field rather than a register.
277 int64_t UnfoldedOffset;
280 : BaseGV(nullptr), BaseOffset(0), HasBaseReg(false), Scale(0),
281 ScaledReg(nullptr), UnfoldedOffset(0) {}
283 void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
285 bool isCanonical() const;
291 size_t getNumRegs() const;
292 Type *getType() const;
294 void deleteBaseReg(const SCEV *&S);
296 bool referencesReg(const SCEV *S) const;
297 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
298 const RegUseTracker &RegUses) const;
300 void print(raw_ostream &OS) const;
306 /// Recursion helper for initialMatch.
307 static void DoInitialMatch(const SCEV *S, Loop *L,
308 SmallVectorImpl<const SCEV *> &Good,
309 SmallVectorImpl<const SCEV *> &Bad,
310 ScalarEvolution &SE) {
311 // Collect expressions which properly dominate the loop header.
312 if (SE.properlyDominates(S, L->getHeader())) {
317 // Look at add operands.
318 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
319 for (const SCEV *S : Add->operands())
320 DoInitialMatch(S, L, Good, Bad, SE);
324 // Look at addrec operands.
325 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
326 if (!AR->getStart()->isZero()) {
327 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
328 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
329 AR->getStepRecurrence(SE),
330 // FIXME: AR->getNoWrapFlags()
331 AR->getLoop(), SCEV::FlagAnyWrap),
336 // Handle a multiplication by -1 (negation) if it didn't fold.
337 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
338 if (Mul->getOperand(0)->isAllOnesValue()) {
339 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
340 const SCEV *NewMul = SE.getMulExpr(Ops);
342 SmallVector<const SCEV *, 4> MyGood;
343 SmallVector<const SCEV *, 4> MyBad;
344 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
345 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
346 SE.getEffectiveSCEVType(NewMul->getType())));
347 for (const SCEV *S : MyGood)
348 Good.push_back(SE.getMulExpr(NegOne, S));
349 for (const SCEV *S : MyBad)
350 Bad.push_back(SE.getMulExpr(NegOne, S));
354 // Ok, we can't do anything interesting. Just stuff the whole thing into a
355 // register and hope for the best.
359 /// Incorporate loop-variant parts of S into this Formula, attempting to keep
360 /// all loop-invariant and loop-computable values in a single base register.
361 void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
362 SmallVector<const SCEV *, 4> Good;
363 SmallVector<const SCEV *, 4> Bad;
364 DoInitialMatch(S, L, Good, Bad, SE);
366 const SCEV *Sum = SE.getAddExpr(Good);
368 BaseRegs.push_back(Sum);
372 const SCEV *Sum = SE.getAddExpr(Bad);
374 BaseRegs.push_back(Sum);
380 /// \brief Check whether or not this formula statisfies the canonical
382 /// \see Formula::BaseRegs.
383 bool Formula::isCanonical() const {
385 return Scale != 1 || !BaseRegs.empty();
386 return BaseRegs.size() <= 1;
389 /// \brief Helper method to morph a formula into its canonical representation.
390 /// \see Formula::BaseRegs.
391 /// Every formula having more than one base register, must use the ScaledReg
392 /// field. Otherwise, we would have to do special cases everywhere in LSR
393 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
394 /// On the other hand, 1*reg should be canonicalized into reg.
395 void Formula::canonicalize() {
398 // So far we did not need this case. This is easy to implement but it is
399 // useless to maintain dead code. Beside it could hurt compile time.
400 assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
401 // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
402 ScaledReg = BaseRegs.back();
405 size_t BaseRegsSize = BaseRegs.size();
407 // If ScaledReg is an invariant, try to find a variant expression.
408 while (Try < BaseRegsSize && !isa<SCEVAddRecExpr>(ScaledReg))
409 std::swap(ScaledReg, BaseRegs[Try++]);
412 /// \brief Get rid of the scale in the formula.
413 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
414 /// \return true if it was possible to get rid of the scale, false otherwise.
415 /// \note After this operation the formula may not be in the canonical form.
416 bool Formula::unscale() {
420 BaseRegs.push_back(ScaledReg);
425 /// Return the total number of register operands used by this formula. This does
426 /// not include register uses implied by non-constant addrec strides.
427 size_t Formula::getNumRegs() const {
428 return !!ScaledReg + BaseRegs.size();
431 /// Return the type of this formula, if it has one, or null otherwise. This type
432 /// is meaningless except for the bit size.
433 Type *Formula::getType() const {
434 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
435 ScaledReg ? ScaledReg->getType() :
436 BaseGV ? BaseGV->getType() :
440 /// Delete the given base reg from the BaseRegs list.
441 void Formula::deleteBaseReg(const SCEV *&S) {
442 if (&S != &BaseRegs.back())
443 std::swap(S, BaseRegs.back());
447 /// Test if this formula references the given register.
448 bool Formula::referencesReg(const SCEV *S) const {
449 return S == ScaledReg ||
450 std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
453 /// Test whether this formula uses registers which are used by uses other than
454 /// the use with the given index.
455 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
456 const RegUseTracker &RegUses) const {
458 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
460 for (const SCEV *BaseReg : BaseRegs)
461 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
466 void Formula::print(raw_ostream &OS) const {
469 if (!First) OS << " + "; else First = false;
470 BaseGV->printAsOperand(OS, /*PrintType=*/false);
472 if (BaseOffset != 0) {
473 if (!First) OS << " + "; else First = false;
476 for (const SCEV *BaseReg : BaseRegs) {
477 if (!First) OS << " + "; else First = false;
478 OS << "reg(" << *BaseReg << ')';
480 if (HasBaseReg && BaseRegs.empty()) {
481 if (!First) OS << " + "; else First = false;
482 OS << "**error: HasBaseReg**";
483 } else if (!HasBaseReg && !BaseRegs.empty()) {
484 if (!First) OS << " + "; else First = false;
485 OS << "**error: !HasBaseReg**";
488 if (!First) OS << " + "; else First = false;
489 OS << Scale << "*reg(";
496 if (UnfoldedOffset != 0) {
497 if (!First) OS << " + ";
498 OS << "imm(" << UnfoldedOffset << ')';
503 void Formula::dump() const {
504 print(errs()); errs() << '\n';
507 /// Return true if the given addrec can be sign-extended without changing its
509 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
511 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
512 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
515 /// Return true if the given add can be sign-extended without changing its
517 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
519 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
520 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
523 /// Return true if the given mul can be sign-extended without changing its
525 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
527 IntegerType::get(SE.getContext(),
528 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
529 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
532 /// Return an expression for LHS /s RHS, if it can be determined and if the
533 /// remainder is known to be zero, or null otherwise. If IgnoreSignificantBits
534 /// is true, expressions like (X * Y) /s Y are simplified to Y, ignoring that
535 /// the multiplication may overflow, which is useful when the result will be
536 /// used in a context where the most significant bits are ignored.
537 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
539 bool IgnoreSignificantBits = false) {
540 // Handle the trivial case, which works for any SCEV type.
542 return SE.getConstant(LHS->getType(), 1);
544 // Handle a few RHS special cases.
545 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
547 const APInt &RA = RC->getValue()->getValue();
548 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
550 if (RA.isAllOnesValue())
551 return SE.getMulExpr(LHS, RC);
552 // Handle x /s 1 as x.
557 // Check for a division of a constant by a constant.
558 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
561 const APInt &LA = C->getValue()->getValue();
562 const APInt &RA = RC->getValue()->getValue();
563 if (LA.srem(RA) != 0)
565 return SE.getConstant(LA.sdiv(RA));
568 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
569 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
570 if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
571 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
572 IgnoreSignificantBits);
573 if (!Step) return nullptr;
574 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
575 IgnoreSignificantBits);
576 if (!Start) return nullptr;
577 // FlagNW is independent of the start value, step direction, and is
578 // preserved with smaller magnitude steps.
579 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
580 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
585 // Distribute the sdiv over add operands, if the add doesn't overflow.
586 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
587 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
588 SmallVector<const SCEV *, 8> Ops;
589 for (const SCEV *S : Add->operands()) {
590 const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
591 if (!Op) return nullptr;
594 return SE.getAddExpr(Ops);
599 // Check for a multiply operand that we can pull RHS out of.
600 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
601 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
602 SmallVector<const SCEV *, 4> Ops;
604 for (const SCEV *S : Mul->operands()) {
606 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
607 IgnoreSignificantBits)) {
613 return Found ? SE.getMulExpr(Ops) : nullptr;
618 // Otherwise we don't know.
622 /// If S involves the addition of a constant integer value, return that integer
623 /// value, and mutate S to point to a new SCEV with that value excluded.
624 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
625 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
626 if (C->getValue()->getValue().getMinSignedBits() <= 64) {
627 S = SE.getConstant(C->getType(), 0);
628 return C->getValue()->getSExtValue();
630 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
631 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
632 int64_t Result = ExtractImmediate(NewOps.front(), SE);
634 S = SE.getAddExpr(NewOps);
636 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
637 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
638 int64_t Result = ExtractImmediate(NewOps.front(), SE);
640 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
641 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
648 /// If S involves the addition of a GlobalValue address, return that symbol, and
649 /// mutate S to point to a new SCEV with that value excluded.
650 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
651 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
652 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
653 S = SE.getConstant(GV->getType(), 0);
656 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
657 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
658 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
660 S = SE.getAddExpr(NewOps);
662 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
663 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
664 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
666 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
667 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
674 /// Returns true if the specified instruction is using the specified value as an
676 static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
677 bool isAddress = isa<LoadInst>(Inst);
678 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
679 if (SI->getOperand(1) == OperandVal)
681 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
682 // Addressing modes can also be folded into prefetches and a variety
684 switch (II->getIntrinsicID()) {
686 case Intrinsic::prefetch:
687 case Intrinsic::x86_sse_storeu_ps:
688 case Intrinsic::x86_sse2_storeu_pd:
689 case Intrinsic::x86_sse2_storeu_dq:
690 case Intrinsic::x86_sse2_storel_dq:
691 if (II->getArgOperand(0) == OperandVal)
699 /// Return the type of the memory being accessed.
700 static MemAccessTy getAccessType(const Instruction *Inst) {
701 MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
702 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
703 AccessTy.MemTy = SI->getOperand(0)->getType();
704 AccessTy.AddrSpace = SI->getPointerAddressSpace();
705 } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
706 AccessTy.AddrSpace = LI->getPointerAddressSpace();
707 } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
708 // Addressing modes can also be folded into prefetches and a variety
710 switch (II->getIntrinsicID()) {
712 case Intrinsic::x86_sse_storeu_ps:
713 case Intrinsic::x86_sse2_storeu_pd:
714 case Intrinsic::x86_sse2_storeu_dq:
715 case Intrinsic::x86_sse2_storel_dq:
716 AccessTy.MemTy = II->getArgOperand(0)->getType();
721 // All pointers have the same requirements, so canonicalize them to an
722 // arbitrary pointer type to minimize variation.
723 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy))
724 AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
725 PTy->getAddressSpace());
730 /// Return true if this AddRec is already a phi in its loop.
731 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
732 for (BasicBlock::iterator I = AR->getLoop()->getHeader()->begin();
733 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
734 if (SE.isSCEVable(PN->getType()) &&
735 (SE.getEffectiveSCEVType(PN->getType()) ==
736 SE.getEffectiveSCEVType(AR->getType())) &&
737 SE.getSCEV(PN) == AR)
743 /// Check if expanding this expression is likely to incur significant cost. This
744 /// is tricky because SCEV doesn't track which expressions are actually computed
745 /// by the current IR.
747 /// We currently allow expansion of IV increments that involve adds,
748 /// multiplication by constants, and AddRecs from existing phis.
750 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
751 /// obvious multiple of the UDivExpr.
752 static bool isHighCostExpansion(const SCEV *S,
753 SmallPtrSetImpl<const SCEV*> &Processed,
754 ScalarEvolution &SE) {
755 // Zero/One operand expressions
756 switch (S->getSCEVType()) {
761 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
764 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
767 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
771 if (!Processed.insert(S).second)
774 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
775 for (const SCEV *S : Add->operands()) {
776 if (isHighCostExpansion(S, Processed, SE))
782 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
783 if (Mul->getNumOperands() == 2) {
784 // Multiplication by a constant is ok
785 if (isa<SCEVConstant>(Mul->getOperand(0)))
786 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
788 // If we have the value of one operand, check if an existing
789 // multiplication already generates this expression.
790 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
791 Value *UVal = U->getValue();
792 for (User *UR : UVal->users()) {
793 // If U is a constant, it may be used by a ConstantExpr.
794 Instruction *UI = dyn_cast<Instruction>(UR);
795 if (UI && UI->getOpcode() == Instruction::Mul &&
796 SE.isSCEVable(UI->getType())) {
797 return SE.getSCEV(UI) == Mul;
804 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
805 if (isExistingPhi(AR, SE))
809 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
813 /// If any of the instructions is the specified set are trivially dead, delete
814 /// them and see if this makes any of their operands subsequently dead.
816 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
817 bool Changed = false;
819 while (!DeadInsts.empty()) {
820 Value *V = DeadInsts.pop_back_val();
821 Instruction *I = dyn_cast_or_null<Instruction>(V);
823 if (!I || !isInstructionTriviallyDead(I))
826 for (Use &O : I->operands())
827 if (Instruction *U = dyn_cast<Instruction>(O)) {
830 DeadInsts.emplace_back(U);
833 I->eraseFromParent();
844 /// \brief Check if the addressing mode defined by \p F is completely
845 /// folded in \p LU at isel time.
846 /// This includes address-mode folding and special icmp tricks.
847 /// This function returns true if \p LU can accommodate what \p F
848 /// defines and up to 1 base + 1 scaled + offset.
849 /// In other words, if \p F has several base registers, this function may
850 /// still return true. Therefore, users still need to account for
851 /// additional base registers and/or unfolded offsets to derive an
852 /// accurate cost model.
853 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
854 const LSRUse &LU, const Formula &F);
855 // Get the cost of the scaling factor used in F for LU.
856 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
857 const LSRUse &LU, const Formula &F);
861 /// This class is used to measure and compare candidate formulae.
863 /// TODO: Some of these could be merged. Also, a lexical ordering
864 /// isn't always optimal.
868 unsigned NumBaseAdds;
875 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
876 SetupCost(0), ScaleCost(0) {}
878 bool operator<(const Cost &Other) const;
883 // Once any of the metrics loses, they must all remain losers.
885 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
886 | ImmCost | SetupCost | ScaleCost) != ~0u)
887 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
888 & ImmCost & SetupCost & ScaleCost) == ~0u);
893 assert(isValid() && "invalid cost");
894 return NumRegs == ~0u;
897 void RateFormula(const TargetTransformInfo &TTI,
899 SmallPtrSetImpl<const SCEV *> &Regs,
900 const DenseSet<const SCEV *> &VisitedRegs,
902 const SmallVectorImpl<int64_t> &Offsets,
903 ScalarEvolution &SE, DominatorTree &DT,
905 SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
907 void print(raw_ostream &OS) const;
911 void RateRegister(const SCEV *Reg,
912 SmallPtrSetImpl<const SCEV *> &Regs,
914 ScalarEvolution &SE, DominatorTree &DT);
915 void RatePrimaryRegister(const SCEV *Reg,
916 SmallPtrSetImpl<const SCEV *> &Regs,
918 ScalarEvolution &SE, DominatorTree &DT,
919 SmallPtrSetImpl<const SCEV *> *LoserRegs);
924 /// Tally up interesting quantities from the given register.
925 void Cost::RateRegister(const SCEV *Reg,
926 SmallPtrSetImpl<const SCEV *> &Regs,
928 ScalarEvolution &SE, DominatorTree &DT) {
929 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
930 // If this is an addrec for another loop, don't second-guess its addrec phi
931 // nodes. LSR isn't currently smart enough to reason about more than one
932 // loop at a time. LSR has already run on inner loops, will not run on outer
933 // loops, and cannot be expected to change sibling loops.
934 if (AR->getLoop() != L) {
935 // If the AddRec exists, consider it's register free and leave it alone.
936 if (isExistingPhi(AR, SE))
939 // Otherwise, do not consider this formula at all.
943 AddRecCost += 1; /// TODO: This should be a function of the stride.
945 // Add the step value register, if it needs one.
946 // TODO: The non-affine case isn't precisely modeled here.
947 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
948 if (!Regs.count(AR->getOperand(1))) {
949 RateRegister(AR->getOperand(1), Regs, L, SE, DT);
957 // Rough heuristic; favor registers which don't require extra setup
958 // instructions in the preheader.
959 if (!isa<SCEVUnknown>(Reg) &&
960 !isa<SCEVConstant>(Reg) &&
961 !(isa<SCEVAddRecExpr>(Reg) &&
962 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
963 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
966 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
967 SE.hasComputableLoopEvolution(Reg, L);
970 /// Record this register in the set. If we haven't seen it before, rate
971 /// it. Optional LoserRegs provides a way to declare any formula that refers to
972 /// one of those regs an instant loser.
973 void Cost::RatePrimaryRegister(const SCEV *Reg,
974 SmallPtrSetImpl<const SCEV *> &Regs,
976 ScalarEvolution &SE, DominatorTree &DT,
977 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
978 if (LoserRegs && LoserRegs->count(Reg)) {
982 if (Regs.insert(Reg).second) {
983 RateRegister(Reg, Regs, L, SE, DT);
984 if (LoserRegs && isLoser())
985 LoserRegs->insert(Reg);
989 void Cost::RateFormula(const TargetTransformInfo &TTI,
991 SmallPtrSetImpl<const SCEV *> &Regs,
992 const DenseSet<const SCEV *> &VisitedRegs,
994 const SmallVectorImpl<int64_t> &Offsets,
995 ScalarEvolution &SE, DominatorTree &DT,
997 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
998 assert(F.isCanonical() && "Cost is accurate only for canonical formula");
999 // Tally up the registers.
1000 if (const SCEV *ScaledReg = F.ScaledReg) {
1001 if (VisitedRegs.count(ScaledReg)) {
1005 RatePrimaryRegister(ScaledReg, Regs, L, SE, DT, LoserRegs);
1009 for (const SCEV *BaseReg : F.BaseRegs) {
1010 if (VisitedRegs.count(BaseReg)) {
1014 RatePrimaryRegister(BaseReg, Regs, L, SE, DT, LoserRegs);
1019 // Determine how many (unfolded) adds we'll need inside the loop.
1020 size_t NumBaseParts = F.getNumRegs();
1021 if (NumBaseParts > 1)
1022 // Do not count the base and a possible second register if the target
1023 // allows to fold 2 registers.
1025 NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(TTI, LU, F)));
1026 NumBaseAdds += (F.UnfoldedOffset != 0);
1028 // Accumulate non-free scaling amounts.
1029 ScaleCost += getScalingFactorCost(TTI, LU, F);
1031 // Tally up the non-zero immediates.
1032 for (int64_t O : Offsets) {
1033 int64_t Offset = (uint64_t)O + F.BaseOffset;
1035 ImmCost += 64; // Handle symbolic values conservatively.
1036 // TODO: This should probably be the pointer size.
1037 else if (Offset != 0)
1038 ImmCost += APInt(64, Offset, true).getMinSignedBits();
1040 assert(isValid() && "invalid cost");
1043 /// Set this cost to a losing value.
1054 /// Choose the lower cost.
1055 bool Cost::operator<(const Cost &Other) const {
1056 return std::tie(NumRegs, AddRecCost, NumIVMuls, NumBaseAdds, ScaleCost,
1057 ImmCost, SetupCost) <
1058 std::tie(Other.NumRegs, Other.AddRecCost, Other.NumIVMuls,
1059 Other.NumBaseAdds, Other.ScaleCost, Other.ImmCost,
1063 void Cost::print(raw_ostream &OS) const {
1064 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
1065 if (AddRecCost != 0)
1066 OS << ", with addrec cost " << AddRecCost;
1068 OS << ", plus " << NumIVMuls << " IV mul" << (NumIVMuls == 1 ? "" : "s");
1069 if (NumBaseAdds != 0)
1070 OS << ", plus " << NumBaseAdds << " base add"
1071 << (NumBaseAdds == 1 ? "" : "s");
1073 OS << ", plus " << ScaleCost << " scale cost";
1075 OS << ", plus " << ImmCost << " imm cost";
1077 OS << ", plus " << SetupCost << " setup cost";
1081 void Cost::dump() const {
1082 print(errs()); errs() << '\n';
1087 /// An operand value in an instruction which is to be replaced with some
1088 /// equivalent, possibly strength-reduced, replacement.
1090 /// The instruction which will be updated.
1091 Instruction *UserInst;
1093 /// The operand of the instruction which will be replaced. The operand may be
1094 /// used more than once; every instance will be replaced.
1095 Value *OperandValToReplace;
1097 /// If this user is to use the post-incremented value of an induction
1098 /// variable, this variable is non-null and holds the loop associated with the
1099 /// induction variable.
1100 PostIncLoopSet PostIncLoops;
1102 /// The index of the LSRUse describing the expression which this fixup needs,
1103 /// minus an offset (below).
1106 /// A constant offset to be added to the LSRUse expression. This allows
1107 /// multiple fixups to share the same LSRUse with different offsets, for
1108 /// example in an unrolled loop.
1111 bool isUseFullyOutsideLoop(const Loop *L) const;
1115 void print(raw_ostream &OS) const;
1121 LSRFixup::LSRFixup()
1122 : UserInst(nullptr), OperandValToReplace(nullptr), LUIdx(~size_t(0)),
1125 /// Test whether this fixup always uses its value outside of the given loop.
1126 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1127 // PHI nodes use their value in their incoming blocks.
1128 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1129 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1130 if (PN->getIncomingValue(i) == OperandValToReplace &&
1131 L->contains(PN->getIncomingBlock(i)))
1136 return !L->contains(UserInst);
1139 void LSRFixup::print(raw_ostream &OS) const {
1141 // Store is common and interesting enough to be worth special-casing.
1142 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1144 Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1145 } else if (UserInst->getType()->isVoidTy())
1146 OS << UserInst->getOpcodeName();
1148 UserInst->printAsOperand(OS, /*PrintType=*/false);
1150 OS << ", OperandValToReplace=";
1151 OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1153 for (const Loop *PIL : PostIncLoops) {
1154 OS << ", PostIncLoop=";
1155 PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1158 if (LUIdx != ~size_t(0))
1159 OS << ", LUIdx=" << LUIdx;
1162 OS << ", Offset=" << Offset;
1166 void LSRFixup::dump() const {
1167 print(errs()); errs() << '\n';
1172 /// A DenseMapInfo implementation for holding DenseMaps and DenseSets of sorted
1173 /// SmallVectors of const SCEV*.
1174 struct UniquifierDenseMapInfo {
1175 static SmallVector<const SCEV *, 4> getEmptyKey() {
1176 SmallVector<const SCEV *, 4> V;
1177 V.push_back(reinterpret_cast<const SCEV *>(-1));
1181 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1182 SmallVector<const SCEV *, 4> V;
1183 V.push_back(reinterpret_cast<const SCEV *>(-2));
1187 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1188 return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1191 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1192 const SmallVector<const SCEV *, 4> &RHS) {
1197 /// This class holds the state that LSR keeps for each use in IVUsers, as well
1198 /// as uses invented by LSR itself. It includes information about what kinds of
1199 /// things can be folded into the user, information about the user itself, and
1200 /// information about how the use may be satisfied. TODO: Represent multiple
1201 /// users of the same expression in common?
1203 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1206 /// An enum for a kind of use, indicating what types of scaled and immediate
1207 /// operands it might support.
1209 Basic, ///< A normal use, with no folding.
1210 Special, ///< A special case of basic, allowing -1 scales.
1211 Address, ///< An address use; folding according to TargetLowering
1212 ICmpZero ///< An equality icmp with both operands folded into one.
1213 // TODO: Add a generic icmp too?
1216 typedef PointerIntPair<const SCEV *, 2, KindType> SCEVUseKindPair;
1219 MemAccessTy AccessTy;
1221 SmallVector<int64_t, 8> Offsets;
1225 /// This records whether all of the fixups using this LSRUse are outside of
1226 /// the loop, in which case some special-case heuristics may be used.
1227 bool AllFixupsOutsideLoop;
1229 /// RigidFormula is set to true to guarantee that this use will be associated
1230 /// with a single formula--the one that initially matched. Some SCEV
1231 /// expressions cannot be expanded. This allows LSR to consider the registers
1232 /// used by those expressions without the need to expand them later after
1233 /// changing the formula.
1236 /// This records the widest use type for any fixup using this
1237 /// LSRUse. FindUseWithSimilarFormula can't consider uses with different max
1238 /// fixup widths to be equivalent, because the narrower one may be relying on
1239 /// the implicit truncation to truncate away bogus bits.
1240 Type *WidestFixupType;
1242 /// A list of ways to build a value that can satisfy this user. After the
1243 /// list is populated, one of these is selected heuristically and used to
1244 /// formulate a replacement for OperandValToReplace in UserInst.
1245 SmallVector<Formula, 12> Formulae;
1247 /// The set of register candidates used by all formulae in this LSRUse.
1248 SmallPtrSet<const SCEV *, 4> Regs;
1250 LSRUse(KindType K, MemAccessTy AT)
1251 : Kind(K), AccessTy(AT), MinOffset(INT64_MAX), MaxOffset(INT64_MIN),
1252 AllFixupsOutsideLoop(true), RigidFormula(false),
1253 WidestFixupType(nullptr) {}
1255 bool HasFormulaWithSameRegs(const Formula &F) const;
1256 bool InsertFormula(const Formula &F);
1257 void DeleteFormula(Formula &F);
1258 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1260 void print(raw_ostream &OS) const;
1266 /// Test whether this use as a formula which has the same registers as the given
1268 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1269 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1270 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1271 // Unstable sort by host order ok, because this is only used for uniquifying.
1272 std::sort(Key.begin(), Key.end());
1273 return Uniquifier.count(Key);
1276 /// If the given formula has not yet been inserted, add it to the list, and
1277 /// return true. Return false otherwise. The formula must be in canonical form.
1278 bool LSRUse::InsertFormula(const Formula &F) {
1279 assert(F.isCanonical() && "Invalid canonical representation");
1281 if (!Formulae.empty() && RigidFormula)
1284 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1285 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1286 // Unstable sort by host order ok, because this is only used for uniquifying.
1287 std::sort(Key.begin(), Key.end());
1289 if (!Uniquifier.insert(Key).second)
1292 // Using a register to hold the value of 0 is not profitable.
1293 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1294 "Zero allocated in a scaled register!");
1296 for (const SCEV *BaseReg : F.BaseRegs)
1297 assert(!BaseReg->isZero() && "Zero allocated in a base register!");
1300 // Add the formula to the list.
1301 Formulae.push_back(F);
1303 // Record registers now being used by this use.
1304 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1306 Regs.insert(F.ScaledReg);
1311 /// Remove the given formula from this use's list.
1312 void LSRUse::DeleteFormula(Formula &F) {
1313 if (&F != &Formulae.back())
1314 std::swap(F, Formulae.back());
1315 Formulae.pop_back();
1318 /// Recompute the Regs field, and update RegUses.
1319 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1320 // Now that we've filtered out some formulae, recompute the Regs set.
1321 SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs);
1323 for (const Formula &F : Formulae) {
1324 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1325 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1328 // Update the RegTracker.
1329 for (const SCEV *S : OldRegs)
1331 RegUses.dropRegister(S, LUIdx);
1334 void LSRUse::print(raw_ostream &OS) const {
1335 OS << "LSR Use: Kind=";
1337 case Basic: OS << "Basic"; break;
1338 case Special: OS << "Special"; break;
1339 case ICmpZero: OS << "ICmpZero"; break;
1341 OS << "Address of ";
1342 if (AccessTy.MemTy->isPointerTy())
1343 OS << "pointer"; // the full pointer type could be really verbose
1345 OS << *AccessTy.MemTy;
1348 OS << " in addrspace(" << AccessTy.AddrSpace << ')';
1351 OS << ", Offsets={";
1352 bool NeedComma = false;
1353 for (int64_t O : Offsets) {
1354 if (NeedComma) OS << ',';
1360 if (AllFixupsOutsideLoop)
1361 OS << ", all-fixups-outside-loop";
1363 if (WidestFixupType)
1364 OS << ", widest fixup type: " << *WidestFixupType;
1368 void LSRUse::dump() const {
1369 print(errs()); errs() << '\n';
1372 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1373 LSRUse::KindType Kind, MemAccessTy AccessTy,
1374 GlobalValue *BaseGV, int64_t BaseOffset,
1375 bool HasBaseReg, int64_t Scale) {
1377 case LSRUse::Address:
1378 return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
1379 HasBaseReg, Scale, AccessTy.AddrSpace);
1381 case LSRUse::ICmpZero:
1382 // There's not even a target hook for querying whether it would be legal to
1383 // fold a GV into an ICmp.
1387 // ICmp only has two operands; don't allow more than two non-trivial parts.
1388 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1391 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1392 // putting the scaled register in the other operand of the icmp.
1393 if (Scale != 0 && Scale != -1)
1396 // If we have low-level target information, ask the target if it can fold an
1397 // integer immediate on an icmp.
1398 if (BaseOffset != 0) {
1400 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1401 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1402 // Offs is the ICmp immediate.
1404 // The cast does the right thing with INT64_MIN.
1405 BaseOffset = -(uint64_t)BaseOffset;
1406 return TTI.isLegalICmpImmediate(BaseOffset);
1409 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1413 // Only handle single-register values.
1414 return !BaseGV && Scale == 0 && BaseOffset == 0;
1416 case LSRUse::Special:
1417 // Special case Basic to handle -1 scales.
1418 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1421 llvm_unreachable("Invalid LSRUse Kind!");
1424 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1425 int64_t MinOffset, int64_t MaxOffset,
1426 LSRUse::KindType Kind, MemAccessTy AccessTy,
1427 GlobalValue *BaseGV, int64_t BaseOffset,
1428 bool HasBaseReg, int64_t Scale) {
1429 // Check for overflow.
1430 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1433 MinOffset = (uint64_t)BaseOffset + MinOffset;
1434 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1437 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1439 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1440 HasBaseReg, Scale) &&
1441 isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1445 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1446 int64_t MinOffset, int64_t MaxOffset,
1447 LSRUse::KindType Kind, MemAccessTy AccessTy,
1449 // For the purpose of isAMCompletelyFolded either having a canonical formula
1450 // or a scale not equal to zero is correct.
1451 // Problems may arise from non canonical formulae having a scale == 0.
1452 // Strictly speaking it would best to just rely on canonical formulae.
1453 // However, when we generate the scaled formulae, we first check that the
1454 // scaling factor is profitable before computing the actual ScaledReg for
1455 // compile time sake.
1456 assert((F.isCanonical() || F.Scale != 0));
1457 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1458 F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1461 /// Test whether we know how to expand the current formula.
1462 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1463 int64_t MaxOffset, LSRUse::KindType Kind,
1464 MemAccessTy AccessTy, GlobalValue *BaseGV,
1465 int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1466 // We know how to expand completely foldable formulae.
1467 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1468 BaseOffset, HasBaseReg, Scale) ||
1469 // Or formulae that use a base register produced by a sum of base
1472 isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1473 BaseGV, BaseOffset, true, 0));
1476 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1477 int64_t MaxOffset, LSRUse::KindType Kind,
1478 MemAccessTy AccessTy, const Formula &F) {
1479 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1480 F.BaseOffset, F.HasBaseReg, F.Scale);
1483 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1484 const LSRUse &LU, const Formula &F) {
1485 return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1486 LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1490 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1491 const LSRUse &LU, const Formula &F) {
1495 // If the use is not completely folded in that instruction, we will have to
1496 // pay an extra cost only for scale != 1.
1497 if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1499 return F.Scale != 1;
1502 case LSRUse::Address: {
1503 // Check the scaling factor cost with both the min and max offsets.
1504 int ScaleCostMinOffset = TTI.getScalingFactorCost(
1505 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
1506 F.Scale, LU.AccessTy.AddrSpace);
1507 int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1508 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
1509 F.Scale, LU.AccessTy.AddrSpace);
1511 assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1512 "Legal addressing mode has an illegal cost!");
1513 return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1515 case LSRUse::ICmpZero:
1517 case LSRUse::Special:
1518 // The use is completely folded, i.e., everything is folded into the
1523 llvm_unreachable("Invalid LSRUse Kind!");
1526 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1527 LSRUse::KindType Kind, MemAccessTy AccessTy,
1528 GlobalValue *BaseGV, int64_t BaseOffset,
1530 // Fast-path: zero is always foldable.
1531 if (BaseOffset == 0 && !BaseGV) return true;
1533 // Conservatively, create an address with an immediate and a
1534 // base and a scale.
1535 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1537 // Canonicalize a scale of 1 to a base register if the formula doesn't
1538 // already have a base register.
1539 if (!HasBaseReg && Scale == 1) {
1544 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1548 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1549 ScalarEvolution &SE, int64_t MinOffset,
1550 int64_t MaxOffset, LSRUse::KindType Kind,
1551 MemAccessTy AccessTy, const SCEV *S,
1553 // Fast-path: zero is always foldable.
1554 if (S->isZero()) return true;
1556 // Conservatively, create an address with an immediate and a
1557 // base and a scale.
1558 int64_t BaseOffset = ExtractImmediate(S, SE);
1559 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1561 // If there's anything else involved, it's not foldable.
1562 if (!S->isZero()) return false;
1564 // Fast-path: zero is always foldable.
1565 if (BaseOffset == 0 && !BaseGV) return true;
1567 // Conservatively, create an address with an immediate and a
1568 // base and a scale.
1569 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1571 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1572 BaseOffset, HasBaseReg, Scale);
1577 /// An individual increment in a Chain of IV increments. Relate an IV user to
1578 /// an expression that computes the IV it uses from the IV used by the previous
1579 /// link in the Chain.
1581 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1582 /// original IVOperand. The head of the chain's IVOperand is only valid during
1583 /// chain collection, before LSR replaces IV users. During chain generation,
1584 /// IncExpr can be used to find the new IVOperand that computes the same
1587 Instruction *UserInst;
1589 const SCEV *IncExpr;
1591 IVInc(Instruction *U, Value *O, const SCEV *E):
1592 UserInst(U), IVOperand(O), IncExpr(E) {}
1595 // The list of IV increments in program order. We typically add the head of a
1596 // chain without finding subsequent links.
1598 SmallVector<IVInc,1> Incs;
1599 const SCEV *ExprBase;
1601 IVChain() : ExprBase(nullptr) {}
1603 IVChain(const IVInc &Head, const SCEV *Base)
1604 : Incs(1, Head), ExprBase(Base) {}
1606 typedef SmallVectorImpl<IVInc>::const_iterator const_iterator;
1608 // Return the first increment in the chain.
1609 const_iterator begin() const {
1610 assert(!Incs.empty());
1611 return std::next(Incs.begin());
1613 const_iterator end() const {
1617 // Returns true if this chain contains any increments.
1618 bool hasIncs() const { return Incs.size() >= 2; }
1620 // Add an IVInc to the end of this chain.
1621 void add(const IVInc &X) { Incs.push_back(X); }
1623 // Returns the last UserInst in the chain.
1624 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1626 // Returns true if IncExpr can be profitably added to this chain.
1627 bool isProfitableIncrement(const SCEV *OperExpr,
1628 const SCEV *IncExpr,
1632 /// Helper for CollectChains to track multiple IV increment uses. Distinguish
1633 /// between FarUsers that definitely cross IV increments and NearUsers that may
1634 /// be used between IV increments.
1636 SmallPtrSet<Instruction*, 4> FarUsers;
1637 SmallPtrSet<Instruction*, 4> NearUsers;
1640 /// This class holds state for the main loop strength reduction logic.
1643 ScalarEvolution &SE;
1646 const TargetTransformInfo &TTI;
1650 /// This is the insert position that the current loop's induction variable
1651 /// increment should be placed. In simple loops, this is the latch block's
1652 /// terminator. But in more complicated cases, this is a position which will
1653 /// dominate all the in-loop post-increment users.
1654 Instruction *IVIncInsertPos;
1656 /// Interesting factors between use strides.
1657 SmallSetVector<int64_t, 8> Factors;
1659 /// Interesting use types, to facilitate truncation reuse.
1660 SmallSetVector<Type *, 4> Types;
1662 /// The list of operands which are to be replaced.
1663 SmallVector<LSRFixup, 16> Fixups;
1665 /// The list of interesting uses.
1666 SmallVector<LSRUse, 16> Uses;
1668 /// Track which uses use which register candidates.
1669 RegUseTracker RegUses;
1671 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1672 // have more than a few IV increment chains in a loop. Missing a Chain falls
1673 // back to normal LSR behavior for those uses.
1674 static const unsigned MaxChains = 8;
1676 /// IV users can form a chain of IV increments.
1677 SmallVector<IVChain, MaxChains> IVChainVec;
1679 /// IV users that belong to profitable IVChains.
1680 SmallPtrSet<Use*, MaxChains> IVIncSet;
1682 void OptimizeShadowIV();
1683 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1684 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1685 void OptimizeLoopTermCond();
1687 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1688 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1689 void FinalizeChain(IVChain &Chain);
1690 void CollectChains();
1691 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1692 SmallVectorImpl<WeakVH> &DeadInsts);
1694 void CollectInterestingTypesAndFactors();
1695 void CollectFixupsAndInitialFormulae();
1697 LSRFixup &getNewFixup() {
1698 Fixups.push_back(LSRFixup());
1699 return Fixups.back();
1702 // Support for sharing of LSRUses between LSRFixups.
1703 typedef DenseMap<LSRUse::SCEVUseKindPair, size_t> UseMapTy;
1706 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1707 LSRUse::KindType Kind, MemAccessTy AccessTy);
1709 std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
1710 MemAccessTy AccessTy);
1712 void DeleteUse(LSRUse &LU, size_t LUIdx);
1714 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1716 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1717 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1718 void CountRegisters(const Formula &F, size_t LUIdx);
1719 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1721 void CollectLoopInvariantFixupsAndFormulae();
1723 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1724 unsigned Depth = 0);
1726 void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1727 const Formula &Base, unsigned Depth,
1728 size_t Idx, bool IsScaledReg = false);
1729 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1730 void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1731 const Formula &Base, size_t Idx,
1732 bool IsScaledReg = false);
1733 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1734 void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1735 const Formula &Base,
1736 const SmallVectorImpl<int64_t> &Worklist,
1737 size_t Idx, bool IsScaledReg = false);
1738 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1739 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1740 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1741 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
1742 void GenerateCrossUseConstantOffsets();
1743 void GenerateAllReuseFormulae();
1745 void FilterOutUndesirableDedicatedRegisters();
1747 size_t EstimateSearchSpaceComplexity() const;
1748 void NarrowSearchSpaceByDetectingSupersets();
1749 void NarrowSearchSpaceByCollapsingUnrolledCode();
1750 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
1751 void NarrowSearchSpaceByPickingWinnerRegs();
1752 void NarrowSearchSpaceUsingHeuristics();
1754 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
1756 SmallVectorImpl<const Formula *> &Workspace,
1757 const Cost &CurCost,
1758 const SmallPtrSet<const SCEV *, 16> &CurRegs,
1759 DenseSet<const SCEV *> &VisitedRegs) const;
1760 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
1762 BasicBlock::iterator
1763 HoistInsertPosition(BasicBlock::iterator IP,
1764 const SmallVectorImpl<Instruction *> &Inputs) const;
1765 BasicBlock::iterator
1766 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1769 SCEVExpander &Rewriter) const;
1771 Value *Expand(const LSRFixup &LF,
1773 BasicBlock::iterator IP,
1774 SCEVExpander &Rewriter,
1775 SmallVectorImpl<WeakVH> &DeadInsts) const;
1776 void RewriteForPHI(PHINode *PN, const LSRFixup &LF,
1778 SCEVExpander &Rewriter,
1779 SmallVectorImpl<WeakVH> &DeadInsts,
1781 void Rewrite(const LSRFixup &LF,
1783 SCEVExpander &Rewriter,
1784 SmallVectorImpl<WeakVH> &DeadInsts,
1786 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
1790 LSRInstance(Loop *L, Pass *P);
1792 bool getChanged() const { return Changed; }
1794 void print_factors_and_types(raw_ostream &OS) const;
1795 void print_fixups(raw_ostream &OS) const;
1796 void print_uses(raw_ostream &OS) const;
1797 void print(raw_ostream &OS) const;
1803 /// If IV is used in a int-to-float cast inside the loop then try to eliminate
1804 /// the cast operation.
1805 void LSRInstance::OptimizeShadowIV() {
1806 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1807 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1810 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
1811 UI != E; /* empty */) {
1812 IVUsers::const_iterator CandidateUI = UI;
1814 Instruction *ShadowUse = CandidateUI->getUser();
1815 Type *DestTy = nullptr;
1816 bool IsSigned = false;
1818 /* If shadow use is a int->float cast then insert a second IV
1819 to eliminate this cast.
1821 for (unsigned i = 0; i < n; ++i)
1827 for (unsigned i = 0; i < n; ++i, ++d)
1830 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
1832 DestTy = UCast->getDestTy();
1834 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
1836 DestTy = SCast->getDestTy();
1838 if (!DestTy) continue;
1840 // If target does not support DestTy natively then do not apply
1841 // this transformation.
1842 if (!TTI.isTypeLegal(DestTy)) continue;
1844 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
1846 if (PH->getNumIncomingValues() != 2) continue;
1848 Type *SrcTy = PH->getType();
1849 int Mantissa = DestTy->getFPMantissaWidth();
1850 if (Mantissa == -1) continue;
1851 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
1854 unsigned Entry, Latch;
1855 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
1863 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
1864 if (!Init) continue;
1865 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
1866 (double)Init->getSExtValue() :
1867 (double)Init->getZExtValue());
1869 BinaryOperator *Incr =
1870 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
1871 if (!Incr) continue;
1872 if (Incr->getOpcode() != Instruction::Add
1873 && Incr->getOpcode() != Instruction::Sub)
1876 /* Initialize new IV, double d = 0.0 in above example. */
1877 ConstantInt *C = nullptr;
1878 if (Incr->getOperand(0) == PH)
1879 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
1880 else if (Incr->getOperand(1) == PH)
1881 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
1887 // Ignore negative constants, as the code below doesn't handle them
1888 // correctly. TODO: Remove this restriction.
1889 if (!C->getValue().isStrictlyPositive()) continue;
1891 /* Add new PHINode. */
1892 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
1894 /* create new increment. '++d' in above example. */
1895 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
1896 BinaryOperator *NewIncr =
1897 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
1898 Instruction::FAdd : Instruction::FSub,
1899 NewPH, CFP, "IV.S.next.", Incr);
1901 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
1902 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
1904 /* Remove cast operation */
1905 ShadowUse->replaceAllUsesWith(NewPH);
1906 ShadowUse->eraseFromParent();
1912 /// If Cond has an operand that is an expression of an IV, set the IV user and
1913 /// stride information and return true, otherwise return false.
1914 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
1915 for (IVStrideUse &U : IU)
1916 if (U.getUser() == Cond) {
1917 // NOTE: we could handle setcc instructions with multiple uses here, but
1918 // InstCombine does it as well for simple uses, it's not clear that it
1919 // occurs enough in real life to handle.
1926 /// Rewrite the loop's terminating condition if it uses a max computation.
1928 /// This is a narrow solution to a specific, but acute, problem. For loops
1934 /// } while (++i < n);
1936 /// the trip count isn't just 'n', because 'n' might not be positive. And
1937 /// unfortunately this can come up even for loops where the user didn't use
1938 /// a C do-while loop. For example, seemingly well-behaved top-test loops
1939 /// will commonly be lowered like this:
1945 /// } while (++i < n);
1948 /// and then it's possible for subsequent optimization to obscure the if
1949 /// test in such a way that indvars can't find it.
1951 /// When indvars can't find the if test in loops like this, it creates a
1952 /// max expression, which allows it to give the loop a canonical
1953 /// induction variable:
1956 /// max = n < 1 ? 1 : n;
1959 /// } while (++i != max);
1961 /// Canonical induction variables are necessary because the loop passes
1962 /// are designed around them. The most obvious example of this is the
1963 /// LoopInfo analysis, which doesn't remember trip count values. It
1964 /// expects to be able to rediscover the trip count each time it is
1965 /// needed, and it does this using a simple analysis that only succeeds if
1966 /// the loop has a canonical induction variable.
1968 /// However, when it comes time to generate code, the maximum operation
1969 /// can be quite costly, especially if it's inside of an outer loop.
1971 /// This function solves this problem by detecting this type of loop and
1972 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
1973 /// the instructions for the maximum computation.
1975 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
1976 // Check that the loop matches the pattern we're looking for.
1977 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
1978 Cond->getPredicate() != CmpInst::ICMP_NE)
1981 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
1982 if (!Sel || !Sel->hasOneUse()) return Cond;
1984 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1985 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1987 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
1989 // Add one to the backedge-taken count to get the trip count.
1990 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
1991 if (IterationCount != SE.getSCEV(Sel)) return Cond;
1993 // Check for a max calculation that matches the pattern. There's no check
1994 // for ICMP_ULE here because the comparison would be with zero, which
1995 // isn't interesting.
1996 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
1997 const SCEVNAryExpr *Max = nullptr;
1998 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
1999 Pred = ICmpInst::ICMP_SLE;
2001 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2002 Pred = ICmpInst::ICMP_SLT;
2004 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2005 Pred = ICmpInst::ICMP_ULT;
2012 // To handle a max with more than two operands, this optimization would
2013 // require additional checking and setup.
2014 if (Max->getNumOperands() != 2)
2017 const SCEV *MaxLHS = Max->getOperand(0);
2018 const SCEV *MaxRHS = Max->getOperand(1);
2020 // ScalarEvolution canonicalizes constants to the left. For < and >, look
2021 // for a comparison with 1. For <= and >=, a comparison with zero.
2023 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2026 // Check the relevant induction variable for conformance to
2028 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2029 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2030 if (!AR || !AR->isAffine() ||
2031 AR->getStart() != One ||
2032 AR->getStepRecurrence(SE) != One)
2035 assert(AR->getLoop() == L &&
2036 "Loop condition operand is an addrec in a different loop!");
2038 // Check the right operand of the select, and remember it, as it will
2039 // be used in the new comparison instruction.
2040 Value *NewRHS = nullptr;
2041 if (ICmpInst::isTrueWhenEqual(Pred)) {
2042 // Look for n+1, and grab n.
2043 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2044 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2045 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2046 NewRHS = BO->getOperand(0);
2047 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2048 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2049 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2050 NewRHS = BO->getOperand(0);
2053 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2054 NewRHS = Sel->getOperand(1);
2055 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2056 NewRHS = Sel->getOperand(2);
2057 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2058 NewRHS = SU->getValue();
2060 // Max doesn't match expected pattern.
2063 // Determine the new comparison opcode. It may be signed or unsigned,
2064 // and the original comparison may be either equality or inequality.
2065 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2066 Pred = CmpInst::getInversePredicate(Pred);
2068 // Ok, everything looks ok to change the condition into an SLT or SGE and
2069 // delete the max calculation.
2071 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2073 // Delete the max calculation instructions.
2074 Cond->replaceAllUsesWith(NewCond);
2075 CondUse->setUser(NewCond);
2076 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2077 Cond->eraseFromParent();
2078 Sel->eraseFromParent();
2079 if (Cmp->use_empty())
2080 Cmp->eraseFromParent();
2084 /// Change loop terminating condition to use the postinc iv when possible.
2086 LSRInstance::OptimizeLoopTermCond() {
2087 SmallPtrSet<Instruction *, 4> PostIncs;
2089 BasicBlock *LatchBlock = L->getLoopLatch();
2090 SmallVector<BasicBlock*, 8> ExitingBlocks;
2091 L->getExitingBlocks(ExitingBlocks);
2093 for (BasicBlock *ExitingBlock : ExitingBlocks) {
2095 // Get the terminating condition for the loop if possible. If we
2096 // can, we want to change it to use a post-incremented version of its
2097 // induction variable, to allow coalescing the live ranges for the IV into
2098 // one register value.
2100 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2103 // FIXME: Overly conservative, termination condition could be an 'or' etc..
2104 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2107 // Search IVUsesByStride to find Cond's IVUse if there is one.
2108 IVStrideUse *CondUse = nullptr;
2109 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2110 if (!FindIVUserForCond(Cond, CondUse))
2113 // If the trip count is computed in terms of a max (due to ScalarEvolution
2114 // being unable to find a sufficient guard, for example), change the loop
2115 // comparison to use SLT or ULT instead of NE.
2116 // One consequence of doing this now is that it disrupts the count-down
2117 // optimization. That's not always a bad thing though, because in such
2118 // cases it may still be worthwhile to avoid a max.
2119 Cond = OptimizeMax(Cond, CondUse);
2121 // If this exiting block dominates the latch block, it may also use
2122 // the post-inc value if it won't be shared with other uses.
2123 // Check for dominance.
2124 if (!DT.dominates(ExitingBlock, LatchBlock))
2127 // Conservatively avoid trying to use the post-inc value in non-latch
2128 // exits if there may be pre-inc users in intervening blocks.
2129 if (LatchBlock != ExitingBlock)
2130 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2131 // Test if the use is reachable from the exiting block. This dominator
2132 // query is a conservative approximation of reachability.
2133 if (&*UI != CondUse &&
2134 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2135 // Conservatively assume there may be reuse if the quotient of their
2136 // strides could be a legal scale.
2137 const SCEV *A = IU.getStride(*CondUse, L);
2138 const SCEV *B = IU.getStride(*UI, L);
2139 if (!A || !B) continue;
2140 if (SE.getTypeSizeInBits(A->getType()) !=
2141 SE.getTypeSizeInBits(B->getType())) {
2142 if (SE.getTypeSizeInBits(A->getType()) >
2143 SE.getTypeSizeInBits(B->getType()))
2144 B = SE.getSignExtendExpr(B, A->getType());
2146 A = SE.getSignExtendExpr(A, B->getType());
2148 if (const SCEVConstant *D =
2149 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2150 const ConstantInt *C = D->getValue();
2151 // Stride of one or negative one can have reuse with non-addresses.
2152 if (C->isOne() || C->isAllOnesValue())
2153 goto decline_post_inc;
2154 // Avoid weird situations.
2155 if (C->getValue().getMinSignedBits() >= 64 ||
2156 C->getValue().isMinSignedValue())
2157 goto decline_post_inc;
2158 // Check for possible scaled-address reuse.
2159 MemAccessTy AccessTy = getAccessType(UI->getUser());
2160 int64_t Scale = C->getSExtValue();
2161 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2163 /*HasBaseReg=*/false, Scale,
2164 AccessTy.AddrSpace))
2165 goto decline_post_inc;
2167 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2169 /*HasBaseReg=*/false, Scale,
2170 AccessTy.AddrSpace))
2171 goto decline_post_inc;
2175 DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2178 // It's possible for the setcc instruction to be anywhere in the loop, and
2179 // possible for it to have multiple users. If it is not immediately before
2180 // the exiting block branch, move it.
2181 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2182 if (Cond->hasOneUse()) {
2183 Cond->moveBefore(TermBr);
2185 // Clone the terminating condition and insert into the loopend.
2186 ICmpInst *OldCond = Cond;
2187 Cond = cast<ICmpInst>(Cond->clone());
2188 Cond->setName(L->getHeader()->getName() + ".termcond");
2189 ExitingBlock->getInstList().insert(TermBr->getIterator(), Cond);
2191 // Clone the IVUse, as the old use still exists!
2192 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2193 TermBr->replaceUsesOfWith(OldCond, Cond);
2197 // If we get to here, we know that we can transform the setcc instruction to
2198 // use the post-incremented version of the IV, allowing us to coalesce the
2199 // live ranges for the IV correctly.
2200 CondUse->transformToPostInc(L);
2203 PostIncs.insert(Cond);
2207 // Determine an insertion point for the loop induction variable increment. It
2208 // must dominate all the post-inc comparisons we just set up, and it must
2209 // dominate the loop latch edge.
2210 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2211 for (Instruction *Inst : PostIncs) {
2213 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2215 if (BB == Inst->getParent())
2216 IVIncInsertPos = Inst;
2217 else if (BB != IVIncInsertPos->getParent())
2218 IVIncInsertPos = BB->getTerminator();
2222 /// Determine if the given use can accommodate a fixup at the given offset and
2223 /// other details. If so, update the use and return true.
2224 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2225 bool HasBaseReg, LSRUse::KindType Kind,
2226 MemAccessTy AccessTy) {
2227 int64_t NewMinOffset = LU.MinOffset;
2228 int64_t NewMaxOffset = LU.MaxOffset;
2229 MemAccessTy NewAccessTy = AccessTy;
2231 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2232 // something conservative, however this can pessimize in the case that one of
2233 // the uses will have all its uses outside the loop, for example.
2234 if (LU.Kind != Kind)
2237 // Check for a mismatched access type, and fall back conservatively as needed.
2238 // TODO: Be less conservative when the type is similar and can use the same
2239 // addressing modes.
2240 if (Kind == LSRUse::Address) {
2241 if (AccessTy != LU.AccessTy)
2242 NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext());
2245 // Conservatively assume HasBaseReg is true for now.
2246 if (NewOffset < LU.MinOffset) {
2247 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2248 LU.MaxOffset - NewOffset, HasBaseReg))
2250 NewMinOffset = NewOffset;
2251 } else if (NewOffset > LU.MaxOffset) {
2252 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2253 NewOffset - LU.MinOffset, HasBaseReg))
2255 NewMaxOffset = NewOffset;
2259 LU.MinOffset = NewMinOffset;
2260 LU.MaxOffset = NewMaxOffset;
2261 LU.AccessTy = NewAccessTy;
2262 if (NewOffset != LU.Offsets.back())
2263 LU.Offsets.push_back(NewOffset);
2267 /// Return an LSRUse index and an offset value for a fixup which needs the given
2268 /// expression, with the given kind and optional access type. Either reuse an
2269 /// existing use or create a new one, as needed.
2270 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2271 LSRUse::KindType Kind,
2272 MemAccessTy AccessTy) {
2273 const SCEV *Copy = Expr;
2274 int64_t Offset = ExtractImmediate(Expr, SE);
2276 // Basic uses can't accept any offset, for example.
2277 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2278 Offset, /*HasBaseReg=*/ true)) {
2283 std::pair<UseMapTy::iterator, bool> P =
2284 UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2286 // A use already existed with this base.
2287 size_t LUIdx = P.first->second;
2288 LSRUse &LU = Uses[LUIdx];
2289 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2291 return std::make_pair(LUIdx, Offset);
2294 // Create a new use.
2295 size_t LUIdx = Uses.size();
2296 P.first->second = LUIdx;
2297 Uses.push_back(LSRUse(Kind, AccessTy));
2298 LSRUse &LU = Uses[LUIdx];
2300 // We don't need to track redundant offsets, but we don't need to go out
2301 // of our way here to avoid them.
2302 if (LU.Offsets.empty() || Offset != LU.Offsets.back())
2303 LU.Offsets.push_back(Offset);
2305 LU.MinOffset = Offset;
2306 LU.MaxOffset = Offset;
2307 return std::make_pair(LUIdx, Offset);
2310 /// Delete the given use from the Uses list.
2311 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2312 if (&LU != &Uses.back())
2313 std::swap(LU, Uses.back());
2317 RegUses.swapAndDropUse(LUIdx, Uses.size());
2320 /// Look for a use distinct from OrigLU which is has a formula that has the same
2321 /// registers as the given formula.
2323 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2324 const LSRUse &OrigLU) {
2325 // Search all uses for the formula. This could be more clever.
2326 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2327 LSRUse &LU = Uses[LUIdx];
2328 // Check whether this use is close enough to OrigLU, to see whether it's
2329 // worthwhile looking through its formulae.
2330 // Ignore ICmpZero uses because they may contain formulae generated by
2331 // GenerateICmpZeroScales, in which case adding fixup offsets may
2333 if (&LU != &OrigLU &&
2334 LU.Kind != LSRUse::ICmpZero &&
2335 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2336 LU.WidestFixupType == OrigLU.WidestFixupType &&
2337 LU.HasFormulaWithSameRegs(OrigF)) {
2338 // Scan through this use's formulae.
2339 for (const Formula &F : LU.Formulae) {
2340 // Check to see if this formula has the same registers and symbols
2342 if (F.BaseRegs == OrigF.BaseRegs &&
2343 F.ScaledReg == OrigF.ScaledReg &&
2344 F.BaseGV == OrigF.BaseGV &&
2345 F.Scale == OrigF.Scale &&
2346 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2347 if (F.BaseOffset == 0)
2349 // This is the formula where all the registers and symbols matched;
2350 // there aren't going to be any others. Since we declined it, we
2351 // can skip the rest of the formulae and proceed to the next LSRUse.
2358 // Nothing looked good.
2362 void LSRInstance::CollectInterestingTypesAndFactors() {
2363 SmallSetVector<const SCEV *, 4> Strides;
2365 // Collect interesting types and strides.
2366 SmallVector<const SCEV *, 4> Worklist;
2367 for (const IVStrideUse &U : IU) {
2368 const SCEV *Expr = IU.getExpr(U);
2370 // Collect interesting types.
2371 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2373 // Add strides for mentioned loops.
2374 Worklist.push_back(Expr);
2376 const SCEV *S = Worklist.pop_back_val();
2377 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2378 if (AR->getLoop() == L)
2379 Strides.insert(AR->getStepRecurrence(SE));
2380 Worklist.push_back(AR->getStart());
2381 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2382 Worklist.append(Add->op_begin(), Add->op_end());
2384 } while (!Worklist.empty());
2387 // Compute interesting factors from the set of interesting strides.
2388 for (SmallSetVector<const SCEV *, 4>::const_iterator
2389 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2390 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2391 std::next(I); NewStrideIter != E; ++NewStrideIter) {
2392 const SCEV *OldStride = *I;
2393 const SCEV *NewStride = *NewStrideIter;
2395 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2396 SE.getTypeSizeInBits(NewStride->getType())) {
2397 if (SE.getTypeSizeInBits(OldStride->getType()) >
2398 SE.getTypeSizeInBits(NewStride->getType()))
2399 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2401 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2403 if (const SCEVConstant *Factor =
2404 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2406 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2407 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2408 } else if (const SCEVConstant *Factor =
2409 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2412 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2413 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2417 // If all uses use the same type, don't bother looking for truncation-based
2419 if (Types.size() == 1)
2422 DEBUG(print_factors_and_types(dbgs()));
2425 /// Helper for CollectChains that finds an IV operand (computed by an AddRec in
2426 /// this loop) within [OI,OE) or returns OE. If IVUsers mapped Instructions to
2427 /// IVStrideUses, we could partially skip this.
2428 static User::op_iterator
2429 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2430 Loop *L, ScalarEvolution &SE) {
2431 for(; OI != OE; ++OI) {
2432 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2433 if (!SE.isSCEVable(Oper->getType()))
2436 if (const SCEVAddRecExpr *AR =
2437 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2438 if (AR->getLoop() == L)
2446 /// IVChain logic must consistenctly peek base TruncInst operands, so wrap it in
2447 /// a convenient helper.
2448 static Value *getWideOperand(Value *Oper) {
2449 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2450 return Trunc->getOperand(0);
2454 /// Return true if we allow an IV chain to include both types.
2455 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2456 Type *LType = LVal->getType();
2457 Type *RType = RVal->getType();
2458 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy());
2461 /// Return an approximation of this SCEV expression's "base", or NULL for any
2462 /// constant. Returning the expression itself is conservative. Returning a
2463 /// deeper subexpression is more precise and valid as long as it isn't less
2464 /// complex than another subexpression. For expressions involving multiple
2465 /// unscaled values, we need to return the pointer-type SCEVUnknown. This avoids
2466 /// forming chains across objects, such as: PrevOper==a[i], IVOper==b[i],
2469 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2470 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2471 static const SCEV *getExprBase(const SCEV *S) {
2472 switch (S->getSCEVType()) {
2473 default: // uncluding scUnknown.
2478 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2480 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2482 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2484 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2485 // there's nothing more complex.
2486 // FIXME: not sure if we want to recognize negation.
2487 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2488 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2489 E(Add->op_begin()); I != E; ++I) {
2490 const SCEV *SubExpr = *I;
2491 if (SubExpr->getSCEVType() == scAddExpr)
2492 return getExprBase(SubExpr);
2494 if (SubExpr->getSCEVType() != scMulExpr)
2497 return S; // all operands are scaled, be conservative.
2500 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2504 /// Return true if the chain increment is profitable to expand into a loop
2505 /// invariant value, which may require its own register. A profitable chain
2506 /// increment will be an offset relative to the same base. We allow such offsets
2507 /// to potentially be used as chain increment as long as it's not obviously
2508 /// expensive to expand using real instructions.
2509 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2510 const SCEV *IncExpr,
2511 ScalarEvolution &SE) {
2512 // Aggressively form chains when -stress-ivchain.
2516 // Do not replace a constant offset from IV head with a nonconstant IV
2518 if (!isa<SCEVConstant>(IncExpr)) {
2519 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2520 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2524 SmallPtrSet<const SCEV*, 8> Processed;
2525 return !isHighCostExpansion(IncExpr, Processed, SE);
2528 /// Return true if the number of registers needed for the chain is estimated to
2529 /// be less than the number required for the individual IV users. First prohibit
2530 /// any IV users that keep the IV live across increments (the Users set should
2531 /// be empty). Next count the number and type of increments in the chain.
2533 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2534 /// effectively use postinc addressing modes. Only consider it profitable it the
2535 /// increments can be computed in fewer registers when chained.
2537 /// TODO: Consider IVInc free if it's already used in another chains.
2539 isProfitableChain(IVChain &Chain, SmallPtrSetImpl<Instruction*> &Users,
2540 ScalarEvolution &SE, const TargetTransformInfo &TTI) {
2544 if (!Chain.hasIncs())
2547 if (!Users.empty()) {
2548 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2549 for (Instruction *Inst : Users) {
2550 dbgs() << " " << *Inst << "\n";
2554 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2556 // The chain itself may require a register, so intialize cost to 1.
2559 // A complete chain likely eliminates the need for keeping the original IV in
2560 // a register. LSR does not currently know how to form a complete chain unless
2561 // the header phi already exists.
2562 if (isa<PHINode>(Chain.tailUserInst())
2563 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2566 const SCEV *LastIncExpr = nullptr;
2567 unsigned NumConstIncrements = 0;
2568 unsigned NumVarIncrements = 0;
2569 unsigned NumReusedIncrements = 0;
2570 for (const IVInc &Inc : Chain) {
2571 if (Inc.IncExpr->isZero())
2574 // Incrementing by zero or some constant is neutral. We assume constants can
2575 // be folded into an addressing mode or an add's immediate operand.
2576 if (isa<SCEVConstant>(Inc.IncExpr)) {
2577 ++NumConstIncrements;
2581 if (Inc.IncExpr == LastIncExpr)
2582 ++NumReusedIncrements;
2586 LastIncExpr = Inc.IncExpr;
2588 // An IV chain with a single increment is handled by LSR's postinc
2589 // uses. However, a chain with multiple increments requires keeping the IV's
2590 // value live longer than it needs to be if chained.
2591 if (NumConstIncrements > 1)
2594 // Materializing increment expressions in the preheader that didn't exist in
2595 // the original code may cost a register. For example, sign-extended array
2596 // indices can produce ridiculous increments like this:
2597 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2598 cost += NumVarIncrements;
2600 // Reusing variable increments likely saves a register to hold the multiple of
2602 cost -= NumReusedIncrements;
2604 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2610 /// Add this IV user to an existing chain or make it the head of a new chain.
2611 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2612 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2613 // When IVs are used as types of varying widths, they are generally converted
2614 // to a wider type with some uses remaining narrow under a (free) trunc.
2615 Value *const NextIV = getWideOperand(IVOper);
2616 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2617 const SCEV *const OperExprBase = getExprBase(OperExpr);
2619 // Visit all existing chains. Check if its IVOper can be computed as a
2620 // profitable loop invariant increment from the last link in the Chain.
2621 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2622 const SCEV *LastIncExpr = nullptr;
2623 for (; ChainIdx < NChains; ++ChainIdx) {
2624 IVChain &Chain = IVChainVec[ChainIdx];
2626 // Prune the solution space aggressively by checking that both IV operands
2627 // are expressions that operate on the same unscaled SCEVUnknown. This
2628 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2629 // first avoids creating extra SCEV expressions.
2630 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2633 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2634 if (!isCompatibleIVType(PrevIV, NextIV))
2637 // A phi node terminates a chain.
2638 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2641 // The increment must be loop-invariant so it can be kept in a register.
2642 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2643 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2644 if (!SE.isLoopInvariant(IncExpr, L))
2647 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2648 LastIncExpr = IncExpr;
2652 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2653 // bother for phi nodes, because they must be last in the chain.
2654 if (ChainIdx == NChains) {
2655 if (isa<PHINode>(UserInst))
2657 if (NChains >= MaxChains && !StressIVChain) {
2658 DEBUG(dbgs() << "IV Chain Limit\n");
2661 LastIncExpr = OperExpr;
2662 // IVUsers may have skipped over sign/zero extensions. We don't currently
2663 // attempt to form chains involving extensions unless they can be hoisted
2664 // into this loop's AddRec.
2665 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2668 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2670 ChainUsersVec.resize(NChains);
2671 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2672 << ") IV=" << *LastIncExpr << "\n");
2674 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2675 << ") IV+" << *LastIncExpr << "\n");
2676 // Add this IV user to the end of the chain.
2677 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2679 IVChain &Chain = IVChainVec[ChainIdx];
2681 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2682 // This chain's NearUsers become FarUsers.
2683 if (!LastIncExpr->isZero()) {
2684 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2689 // All other uses of IVOperand become near uses of the chain.
2690 // We currently ignore intermediate values within SCEV expressions, assuming
2691 // they will eventually be used be the current chain, or can be computed
2692 // from one of the chain increments. To be more precise we could
2693 // transitively follow its user and only add leaf IV users to the set.
2694 for (User *U : IVOper->users()) {
2695 Instruction *OtherUse = dyn_cast<Instruction>(U);
2698 // Uses in the chain will no longer be uses if the chain is formed.
2699 // Include the head of the chain in this iteration (not Chain.begin()).
2700 IVChain::const_iterator IncIter = Chain.Incs.begin();
2701 IVChain::const_iterator IncEnd = Chain.Incs.end();
2702 for( ; IncIter != IncEnd; ++IncIter) {
2703 if (IncIter->UserInst == OtherUse)
2706 if (IncIter != IncEnd)
2709 if (SE.isSCEVable(OtherUse->getType())
2710 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
2711 && IU.isIVUserOrOperand(OtherUse)) {
2714 NearUsers.insert(OtherUse);
2717 // Since this user is part of the chain, it's no longer considered a use
2719 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
2722 /// Populate the vector of Chains.
2724 /// This decreases ILP at the architecture level. Targets with ample registers,
2725 /// multiple memory ports, and no register renaming probably don't want
2726 /// this. However, such targets should probably disable LSR altogether.
2728 /// The job of LSR is to make a reasonable choice of induction variables across
2729 /// the loop. Subsequent passes can easily "unchain" computation exposing more
2730 /// ILP *within the loop* if the target wants it.
2732 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
2733 /// will not reorder memory operations, it will recognize this as a chain, but
2734 /// will generate redundant IV increments. Ideally this would be corrected later
2735 /// by a smart scheduler:
2741 /// TODO: Walk the entire domtree within this loop, not just the path to the
2742 /// loop latch. This will discover chains on side paths, but requires
2743 /// maintaining multiple copies of the Chains state.
2744 void LSRInstance::CollectChains() {
2745 DEBUG(dbgs() << "Collecting IV Chains.\n");
2746 SmallVector<ChainUsers, 8> ChainUsersVec;
2748 SmallVector<BasicBlock *,8> LatchPath;
2749 BasicBlock *LoopHeader = L->getHeader();
2750 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
2751 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
2752 LatchPath.push_back(Rung->getBlock());
2754 LatchPath.push_back(LoopHeader);
2756 // Walk the instruction stream from the loop header to the loop latch.
2757 for (SmallVectorImpl<BasicBlock *>::reverse_iterator
2758 BBIter = LatchPath.rbegin(), BBEnd = LatchPath.rend();
2759 BBIter != BBEnd; ++BBIter) {
2760 for (BasicBlock::iterator I = (*BBIter)->begin(), E = (*BBIter)->end();
2762 // Skip instructions that weren't seen by IVUsers analysis.
2763 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(&*I))
2766 // Ignore users that are part of a SCEV expression. This way we only
2767 // consider leaf IV Users. This effectively rediscovers a portion of
2768 // IVUsers analysis but in program order this time.
2769 if (SE.isSCEVable(I->getType()) && !isa<SCEVUnknown>(SE.getSCEV(&*I)))
2772 // Remove this instruction from any NearUsers set it may be in.
2773 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
2774 ChainIdx < NChains; ++ChainIdx) {
2775 ChainUsersVec[ChainIdx].NearUsers.erase(&*I);
2777 // Search for operands that can be chained.
2778 SmallPtrSet<Instruction*, 4> UniqueOperands;
2779 User::op_iterator IVOpEnd = I->op_end();
2780 User::op_iterator IVOpIter = findIVOperand(I->op_begin(), IVOpEnd, L, SE);
2781 while (IVOpIter != IVOpEnd) {
2782 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
2783 if (UniqueOperands.insert(IVOpInst).second)
2784 ChainInstruction(&*I, IVOpInst, ChainUsersVec);
2785 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2787 } // Continue walking down the instructions.
2788 } // Continue walking down the domtree.
2789 // Visit phi backedges to determine if the chain can generate the IV postinc.
2790 for (BasicBlock::iterator I = L->getHeader()->begin();
2791 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
2792 if (!SE.isSCEVable(PN->getType()))
2796 dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
2798 ChainInstruction(PN, IncV, ChainUsersVec);
2800 // Remove any unprofitable chains.
2801 unsigned ChainIdx = 0;
2802 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
2803 UsersIdx < NChains; ++UsersIdx) {
2804 if (!isProfitableChain(IVChainVec[UsersIdx],
2805 ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
2807 // Preserve the chain at UsesIdx.
2808 if (ChainIdx != UsersIdx)
2809 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
2810 FinalizeChain(IVChainVec[ChainIdx]);
2813 IVChainVec.resize(ChainIdx);
2816 void LSRInstance::FinalizeChain(IVChain &Chain) {
2817 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2818 DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
2820 for (const IVInc &Inc : Chain) {
2821 DEBUG(dbgs() << " Inc: " << Inc.UserInst << "\n");
2822 auto UseI = std::find(Inc.UserInst->op_begin(), Inc.UserInst->op_end(),
2824 assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
2825 IVIncSet.insert(UseI);
2829 /// Return true if the IVInc can be folded into an addressing mode.
2830 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
2831 Value *Operand, const TargetTransformInfo &TTI) {
2832 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
2833 if (!IncConst || !isAddressUse(UserInst, Operand))
2836 if (IncConst->getValue()->getValue().getMinSignedBits() > 64)
2839 MemAccessTy AccessTy = getAccessType(UserInst);
2840 int64_t IncOffset = IncConst->getValue()->getSExtValue();
2841 if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
2842 IncOffset, /*HaseBaseReg=*/false))
2848 /// Generate an add or subtract for each IVInc in a chain to materialize the IV
2849 /// user's operand from the previous IV user's operand.
2850 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
2851 SmallVectorImpl<WeakVH> &DeadInsts) {
2852 // Find the new IVOperand for the head of the chain. It may have been replaced
2854 const IVInc &Head = Chain.Incs[0];
2855 User::op_iterator IVOpEnd = Head.UserInst->op_end();
2856 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
2857 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
2859 Value *IVSrc = nullptr;
2860 while (IVOpIter != IVOpEnd) {
2861 IVSrc = getWideOperand(*IVOpIter);
2863 // If this operand computes the expression that the chain needs, we may use
2864 // it. (Check this after setting IVSrc which is used below.)
2866 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
2867 // narrow for the chain, so we can no longer use it. We do allow using a
2868 // wider phi, assuming the LSR checked for free truncation. In that case we
2869 // should already have a truncate on this operand such that
2870 // getSCEV(IVSrc) == IncExpr.
2871 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
2872 || SE.getSCEV(IVSrc) == Head.IncExpr) {
2875 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2877 if (IVOpIter == IVOpEnd) {
2878 // Gracefully give up on this chain.
2879 DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
2883 DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
2884 Type *IVTy = IVSrc->getType();
2885 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
2886 const SCEV *LeftOverExpr = nullptr;
2887 for (const IVInc &Inc : Chain) {
2888 Instruction *InsertPt = Inc.UserInst;
2889 if (isa<PHINode>(InsertPt))
2890 InsertPt = L->getLoopLatch()->getTerminator();
2892 // IVOper will replace the current IV User's operand. IVSrc is the IV
2893 // value currently held in a register.
2894 Value *IVOper = IVSrc;
2895 if (!Inc.IncExpr->isZero()) {
2896 // IncExpr was the result of subtraction of two narrow values, so must
2898 const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
2899 LeftOverExpr = LeftOverExpr ?
2900 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
2902 if (LeftOverExpr && !LeftOverExpr->isZero()) {
2903 // Expand the IV increment.
2904 Rewriter.clearPostInc();
2905 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
2906 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
2907 SE.getUnknown(IncV));
2908 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
2910 // If an IV increment can't be folded, use it as the next IV value.
2911 if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
2912 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
2914 LeftOverExpr = nullptr;
2917 Type *OperTy = Inc.IVOperand->getType();
2918 if (IVTy != OperTy) {
2919 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
2920 "cannot extend a chained IV");
2921 IRBuilder<> Builder(InsertPt);
2922 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
2924 Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
2925 DeadInsts.emplace_back(Inc.IVOperand);
2927 // If LSR created a new, wider phi, we may also replace its postinc. We only
2928 // do this if we also found a wide value for the head of the chain.
2929 if (isa<PHINode>(Chain.tailUserInst())) {
2930 for (BasicBlock::iterator I = L->getHeader()->begin();
2931 PHINode *Phi = dyn_cast<PHINode>(I); ++I) {
2932 if (!isCompatibleIVType(Phi, IVSrc))
2934 Instruction *PostIncV = dyn_cast<Instruction>(
2935 Phi->getIncomingValueForBlock(L->getLoopLatch()));
2936 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
2938 Value *IVOper = IVSrc;
2939 Type *PostIncTy = PostIncV->getType();
2940 if (IVTy != PostIncTy) {
2941 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
2942 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
2943 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
2944 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
2946 Phi->replaceUsesOfWith(PostIncV, IVOper);
2947 DeadInsts.emplace_back(PostIncV);
2952 void LSRInstance::CollectFixupsAndInitialFormulae() {
2953 for (const IVStrideUse &U : IU) {
2954 Instruction *UserInst = U.getUser();
2955 // Skip IV users that are part of profitable IV Chains.
2956 User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
2957 U.getOperandValToReplace());
2958 assert(UseI != UserInst->op_end() && "cannot find IV operand");
2959 if (IVIncSet.count(UseI))
2963 LSRFixup &LF = getNewFixup();
2964 LF.UserInst = UserInst;
2965 LF.OperandValToReplace = U.getOperandValToReplace();
2966 LF.PostIncLoops = U.getPostIncLoops();
2968 LSRUse::KindType Kind = LSRUse::Basic;
2969 MemAccessTy AccessTy;
2970 if (isAddressUse(LF.UserInst, LF.OperandValToReplace)) {
2971 Kind = LSRUse::Address;
2972 AccessTy = getAccessType(LF.UserInst);
2975 const SCEV *S = IU.getExpr(U);
2977 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
2978 // (N - i == 0), and this allows (N - i) to be the expression that we work
2979 // with rather than just N or i, so we can consider the register
2980 // requirements for both N and i at the same time. Limiting this code to
2981 // equality icmps is not a problem because all interesting loops use
2982 // equality icmps, thanks to IndVarSimplify.
2983 if (ICmpInst *CI = dyn_cast<ICmpInst>(LF.UserInst))
2984 if (CI->isEquality()) {
2985 // Swap the operands if needed to put the OperandValToReplace on the
2986 // left, for consistency.
2987 Value *NV = CI->getOperand(1);
2988 if (NV == LF.OperandValToReplace) {
2989 CI->setOperand(1, CI->getOperand(0));
2990 CI->setOperand(0, NV);
2991 NV = CI->getOperand(1);
2995 // x == y --> x - y == 0
2996 const SCEV *N = SE.getSCEV(NV);
2997 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
2998 // S is normalized, so normalize N before folding it into S
2999 // to keep the result normalized.
3000 N = TransformForPostIncUse(Normalize, N, CI, nullptr,
3001 LF.PostIncLoops, SE, DT);
3002 Kind = LSRUse::ICmpZero;
3003 S = SE.getMinusSCEV(N, S);
3006 // -1 and the negations of all interesting strides (except the negation
3007 // of -1) are now also interesting.
3008 for (size_t i = 0, e = Factors.size(); i != e; ++i)
3009 if (Factors[i] != -1)
3010 Factors.insert(-(uint64_t)Factors[i]);
3014 // Set up the initial formula for this use.
3015 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3017 LF.Offset = P.second;
3018 LSRUse &LU = Uses[LF.LUIdx];
3019 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3020 if (!LU.WidestFixupType ||
3021 SE.getTypeSizeInBits(LU.WidestFixupType) <
3022 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3023 LU.WidestFixupType = LF.OperandValToReplace->getType();
3025 // If this is the first use of this LSRUse, give it a formula.
3026 if (LU.Formulae.empty()) {
3027 InsertInitialFormula(S, LU, LF.LUIdx);
3028 CountRegisters(LU.Formulae.back(), LF.LUIdx);
3032 DEBUG(print_fixups(dbgs()));
3035 /// Insert a formula for the given expression into the given use, separating out
3036 /// loop-variant portions from loop-invariant and loop-computable portions.
3038 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3039 // Mark uses whose expressions cannot be expanded.
3040 if (!isSafeToExpand(S, SE))
3041 LU.RigidFormula = true;
3044 F.initialMatch(S, L, SE);
3045 bool Inserted = InsertFormula(LU, LUIdx, F);
3046 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3049 /// Insert a simple single-register formula for the given expression into the
3052 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3053 LSRUse &LU, size_t LUIdx) {
3055 F.BaseRegs.push_back(S);
3056 F.HasBaseReg = true;
3057 bool Inserted = InsertFormula(LU, LUIdx, F);
3058 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3061 /// Note which registers are used by the given formula, updating RegUses.
3062 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3064 RegUses.countRegister(F.ScaledReg, LUIdx);
3065 for (const SCEV *BaseReg : F.BaseRegs)
3066 RegUses.countRegister(BaseReg, LUIdx);
3069 /// If the given formula has not yet been inserted, add it to the list, and
3070 /// return true. Return false otherwise.
3071 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3072 // Do not insert formula that we will not be able to expand.
3073 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3074 "Formula is illegal");
3075 if (!LU.InsertFormula(F))
3078 CountRegisters(F, LUIdx);
3082 /// Check for other uses of loop-invariant values which we're tracking. These
3083 /// other uses will pin these values in registers, making them less profitable
3084 /// for elimination.
3085 /// TODO: This currently misses non-constant addrec step registers.
3086 /// TODO: Should this give more weight to users inside the loop?
3088 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3089 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3090 SmallPtrSet<const SCEV *, 32> Visited;
3092 while (!Worklist.empty()) {
3093 const SCEV *S = Worklist.pop_back_val();
3095 // Don't process the same SCEV twice
3096 if (!Visited.insert(S).second)
3099 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3100 Worklist.append(N->op_begin(), N->op_end());
3101 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3102 Worklist.push_back(C->getOperand());
3103 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3104 Worklist.push_back(D->getLHS());
3105 Worklist.push_back(D->getRHS());
3106 } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3107 const Value *V = US->getValue();
3108 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3109 // Look for instructions defined outside the loop.
3110 if (L->contains(Inst)) continue;
3111 } else if (isa<UndefValue>(V))
3112 // Undef doesn't have a live range, so it doesn't matter.
3114 for (const Use &U : V->uses()) {
3115 const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3116 // Ignore non-instructions.
3119 // Ignore instructions in other functions (as can happen with
3121 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3123 // Ignore instructions not dominated by the loop.
3124 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3125 UserInst->getParent() :
3126 cast<PHINode>(UserInst)->getIncomingBlock(
3127 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3128 if (!DT.dominates(L->getHeader(), UseBB))
3130 // Don't bother if the instruction is in a BB which ends in an EHPad.
3131 if (UseBB->getTerminator()->isEHPad())
3133 // Ignore uses which are part of other SCEV expressions, to avoid
3134 // analyzing them multiple times.
3135 if (SE.isSCEVable(UserInst->getType())) {
3136 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3137 // If the user is a no-op, look through to its uses.
3138 if (!isa<SCEVUnknown>(UserS))
3142 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3146 // Ignore icmp instructions which are already being analyzed.
3147 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3148 unsigned OtherIdx = !U.getOperandNo();
3149 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3150 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3154 LSRFixup &LF = getNewFixup();
3155 LF.UserInst = const_cast<Instruction *>(UserInst);
3156 LF.OperandValToReplace = U;
3157 std::pair<size_t, int64_t> P = getUse(
3158 S, LSRUse::Basic, MemAccessTy());
3160 LF.Offset = P.second;
3161 LSRUse &LU = Uses[LF.LUIdx];
3162 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3163 if (!LU.WidestFixupType ||
3164 SE.getTypeSizeInBits(LU.WidestFixupType) <
3165 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3166 LU.WidestFixupType = LF.OperandValToReplace->getType();
3167 InsertSupplementalFormula(US, LU, LF.LUIdx);
3168 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3175 /// Split S into subexpressions which can be pulled out into separate
3176 /// registers. If C is non-null, multiply each subexpression by C.
3178 /// Return remainder expression after factoring the subexpressions captured by
3179 /// Ops. If Ops is complete, return NULL.
3180 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3181 SmallVectorImpl<const SCEV *> &Ops,
3183 ScalarEvolution &SE,
3184 unsigned Depth = 0) {
3185 // Arbitrarily cap recursion to protect compile time.
3189 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3190 // Break out add operands.
3191 for (const SCEV *S : Add->operands()) {
3192 const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
3194 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3197 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3198 // Split a non-zero base out of an addrec.
3199 if (AR->getStart()->isZero())
3202 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3203 C, Ops, L, SE, Depth+1);
3204 // Split the non-zero AddRec unless it is part of a nested recurrence that
3205 // does not pertain to this loop.
3206 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3207 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3208 Remainder = nullptr;
3210 if (Remainder != AR->getStart()) {
3212 Remainder = SE.getConstant(AR->getType(), 0);
3213 return SE.getAddRecExpr(Remainder,
3214 AR->getStepRecurrence(SE),
3216 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3219 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3220 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3221 if (Mul->getNumOperands() != 2)
3223 if (const SCEVConstant *Op0 =
3224 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3225 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3226 const SCEV *Remainder =
3227 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3229 Ops.push_back(SE.getMulExpr(C, Remainder));
3236 /// \brief Helper function for LSRInstance::GenerateReassociations.
3237 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3238 const Formula &Base,
3239 unsigned Depth, size_t Idx,
3241 const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3242 SmallVector<const SCEV *, 8> AddOps;
3243 const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3245 AddOps.push_back(Remainder);
3247 if (AddOps.size() == 1)
3250 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3254 // Loop-variant "unknown" values are uninteresting; we won't be able to
3255 // do anything meaningful with them.
3256 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3259 // Don't pull a constant into a register if the constant could be folded
3260 // into an immediate field.
3261 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3262 LU.AccessTy, *J, Base.getNumRegs() > 1))
3265 // Collect all operands except *J.
3266 SmallVector<const SCEV *, 8> InnerAddOps(
3267 ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3268 InnerAddOps.append(std::next(J),
3269 ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3271 // Don't leave just a constant behind in a register if the constant could
3272 // be folded into an immediate field.
3273 if (InnerAddOps.size() == 1 &&
3274 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3275 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3278 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3279 if (InnerSum->isZero())
3283 // Add the remaining pieces of the add back into the new formula.
3284 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3285 if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3286 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3287 InnerSumSC->getValue()->getZExtValue())) {
3289 (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3291 F.ScaledReg = nullptr;
3293 F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3294 } else if (IsScaledReg)
3295 F.ScaledReg = InnerSum;
3297 F.BaseRegs[Idx] = InnerSum;
3299 // Add J as its own register, or an unfolded immediate.
3300 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3301 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3302 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3303 SC->getValue()->getZExtValue()))
3305 (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3307 F.BaseRegs.push_back(*J);
3308 // We may have changed the number of register in base regs, adjust the
3309 // formula accordingly.
3312 if (InsertFormula(LU, LUIdx, F))
3313 // If that formula hadn't been seen before, recurse to find more like
3315 GenerateReassociations(LU, LUIdx, LU.Formulae.back(), Depth + 1);
3319 /// Split out subexpressions from adds and the bases of addrecs.
3320 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3321 Formula Base, unsigned Depth) {
3322 assert(Base.isCanonical() && "Input must be in the canonical form");
3323 // Arbitrarily cap recursion to protect compile time.
3327 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3328 GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3330 if (Base.Scale == 1)
3331 GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3332 /* Idx */ -1, /* IsScaledReg */ true);
3335 /// Generate a formula consisting of all of the loop-dominating registers added
3336 /// into a single register.
3337 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3339 // This method is only interesting on a plurality of registers.
3340 if (Base.BaseRegs.size() + (Base.Scale == 1) <= 1)
3343 // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3344 // processing the formula.
3348 SmallVector<const SCEV *, 4> Ops;
3349 for (const SCEV *BaseReg : Base.BaseRegs) {
3350 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3351 !SE.hasComputableLoopEvolution(BaseReg, L))
3352 Ops.push_back(BaseReg);
3354 F.BaseRegs.push_back(BaseReg);
3356 if (Ops.size() > 1) {
3357 const SCEV *Sum = SE.getAddExpr(Ops);
3358 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3359 // opportunity to fold something. For now, just ignore such cases
3360 // rather than proceed with zero in a register.
3361 if (!Sum->isZero()) {
3362 F.BaseRegs.push_back(Sum);
3364 (void)InsertFormula(LU, LUIdx, F);
3369 /// \brief Helper function for LSRInstance::GenerateSymbolicOffsets.
3370 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3371 const Formula &Base, size_t Idx,
3373 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3374 GlobalValue *GV = ExtractSymbol(G, SE);
3375 if (G->isZero() || !GV)
3379 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3384 F.BaseRegs[Idx] = G;
3385 (void)InsertFormula(LU, LUIdx, F);
3388 /// Generate reuse formulae using symbolic offsets.
3389 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3391 // We can't add a symbolic offset if the address already contains one.
3392 if (Base.BaseGV) return;
3394 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3395 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3396 if (Base.Scale == 1)
3397 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3398 /* IsScaledReg */ true);
3401 /// \brief Helper function for LSRInstance::GenerateConstantOffsets.
3402 void LSRInstance::GenerateConstantOffsetsImpl(
3403 LSRUse &LU, unsigned LUIdx, const Formula &Base,
3404 const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3405 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3406 for (int64_t Offset : Worklist) {
3408 F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
3409 if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
3411 // Add the offset to the base register.
3412 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
3413 // If it cancelled out, drop the base register, otherwise update it.
3414 if (NewG->isZero()) {
3417 F.ScaledReg = nullptr;
3419 F.deleteBaseReg(F.BaseRegs[Idx]);
3421 } else if (IsScaledReg)
3424 F.BaseRegs[Idx] = NewG;
3426 (void)InsertFormula(LU, LUIdx, F);
3430 int64_t Imm = ExtractImmediate(G, SE);
3431 if (G->isZero() || Imm == 0)
3434 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3435 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3440 F.BaseRegs[Idx] = G;
3441 (void)InsertFormula(LU, LUIdx, F);
3444 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3445 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3447 // TODO: For now, just add the min and max offset, because it usually isn't
3448 // worthwhile looking at everything inbetween.
3449 SmallVector<int64_t, 2> Worklist;
3450 Worklist.push_back(LU.MinOffset);
3451 if (LU.MaxOffset != LU.MinOffset)
3452 Worklist.push_back(LU.MaxOffset);
3454 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3455 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3456 if (Base.Scale == 1)
3457 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3458 /* IsScaledReg */ true);
3461 /// For ICmpZero, check to see if we can scale up the comparison. For example, x
3462 /// == y -> x*c == y*c.
3463 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3465 if (LU.Kind != LSRUse::ICmpZero) return;
3467 // Determine the integer type for the base formula.
3468 Type *IntTy = Base.getType();
3470 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3472 // Don't do this if there is more than one offset.
3473 if (LU.MinOffset != LU.MaxOffset) return;
3475 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3477 // Check each interesting stride.
3478 for (int64_t Factor : Factors) {
3479 // Check that the multiplication doesn't overflow.
3480 if (Base.BaseOffset == INT64_MIN && Factor == -1)
3482 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3483 if (NewBaseOffset / Factor != Base.BaseOffset)
3485 // If the offset will be truncated at this use, check that it is in bounds.
3486 if (!IntTy->isPointerTy() &&
3487 !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3490 // Check that multiplying with the use offset doesn't overflow.
3491 int64_t Offset = LU.MinOffset;
3492 if (Offset == INT64_MIN && Factor == -1)
3494 Offset = (uint64_t)Offset * Factor;
3495 if (Offset / Factor != LU.MinOffset)
3497 // If the offset will be truncated at this use, check that it is in bounds.
3498 if (!IntTy->isPointerTy() &&
3499 !ConstantInt::isValueValidForType(IntTy, Offset))
3503 F.BaseOffset = NewBaseOffset;
3505 // Check that this scale is legal.
3506 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3509 // Compensate for the use having MinOffset built into it.
3510 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3512 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3514 // Check that multiplying with each base register doesn't overflow.
3515 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3516 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3517 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3521 // Check that multiplying with the scaled register doesn't overflow.
3523 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3524 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3528 // Check that multiplying with the unfolded offset doesn't overflow.
3529 if (F.UnfoldedOffset != 0) {
3530 if (F.UnfoldedOffset == INT64_MIN && Factor == -1)
3532 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3533 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3535 // If the offset will be truncated, check that it is in bounds.
3536 if (!IntTy->isPointerTy() &&
3537 !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3541 // If we make it here and it's legal, add it.
3542 (void)InsertFormula(LU, LUIdx, F);
3547 /// Generate stride factor reuse formulae by making use of scaled-offset address
3548 /// modes, for example.
3549 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3550 // Determine the integer type for the base formula.
3551 Type *IntTy = Base.getType();
3554 // If this Formula already has a scaled register, we can't add another one.
3555 // Try to unscale the formula to generate a better scale.
3556 if (Base.Scale != 0 && !Base.unscale())
3559 assert(Base.Scale == 0 && "unscale did not did its job!");
3561 // Check each interesting stride.
3562 for (int64_t Factor : Factors) {
3563 Base.Scale = Factor;
3564 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3565 // Check whether this scale is going to be legal.
3566 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3568 // As a special-case, handle special out-of-loop Basic users specially.
3569 // TODO: Reconsider this special case.
3570 if (LU.Kind == LSRUse::Basic &&
3571 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3572 LU.AccessTy, Base) &&
3573 LU.AllFixupsOutsideLoop)
3574 LU.Kind = LSRUse::Special;
3578 // For an ICmpZero, negating a solitary base register won't lead to
3580 if (LU.Kind == LSRUse::ICmpZero &&
3581 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3583 // For each addrec base reg, apply the scale, if possible.
3584 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3585 if (const SCEVAddRecExpr *AR =
3586 dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i])) {
3587 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3588 if (FactorS->isZero())
3590 // Divide out the factor, ignoring high bits, since we'll be
3591 // scaling the value back up in the end.
3592 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3593 // TODO: This could be optimized to avoid all the copying.
3595 F.ScaledReg = Quotient;
3596 F.deleteBaseReg(F.BaseRegs[i]);
3597 // The canonical representation of 1*reg is reg, which is already in
3598 // Base. In that case, do not try to insert the formula, it will be
3600 if (F.Scale == 1 && F.BaseRegs.empty())
3602 (void)InsertFormula(LU, LUIdx, F);
3608 /// Generate reuse formulae from different IV types.
3609 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
3610 // Don't bother truncating symbolic values.
3611 if (Base.BaseGV) return;
3613 // Determine the integer type for the base formula.
3614 Type *DstTy = Base.getType();
3616 DstTy = SE.getEffectiveSCEVType(DstTy);
3618 for (Type *SrcTy : Types) {
3619 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
3622 if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
3623 for (const SCEV *&BaseReg : F.BaseRegs)
3624 BaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
3626 // TODO: This assumes we've done basic processing on all uses and
3627 // have an idea what the register usage is.
3628 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3631 (void)InsertFormula(LU, LUIdx, F);
3638 /// Helper class for GenerateCrossUseConstantOffsets. It's used to defer
3639 /// modifications so that the search phase doesn't have to worry about the data
3640 /// structures moving underneath it.
3644 const SCEV *OrigReg;
3646 WorkItem(size_t LI, int64_t I, const SCEV *R)
3647 : LUIdx(LI), Imm(I), OrigReg(R) {}
3649 void print(raw_ostream &OS) const;
3655 void WorkItem::print(raw_ostream &OS) const {
3656 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
3657 << " , add offset " << Imm;
3661 void WorkItem::dump() const {
3662 print(errs()); errs() << '\n';
3665 /// Look for registers which are a constant distance apart and try to form reuse
3666 /// opportunities between them.
3667 void LSRInstance::GenerateCrossUseConstantOffsets() {
3668 // Group the registers by their value without any added constant offset.
3669 typedef std::map<int64_t, const SCEV *> ImmMapTy;
3670 DenseMap<const SCEV *, ImmMapTy> Map;
3671 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
3672 SmallVector<const SCEV *, 8> Sequence;
3673 for (const SCEV *Use : RegUses) {
3674 const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
3675 int64_t Imm = ExtractImmediate(Reg, SE);
3676 auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
3678 Sequence.push_back(Reg);
3679 Pair.first->second.insert(std::make_pair(Imm, Use));
3680 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
3683 // Now examine each set of registers with the same base value. Build up
3684 // a list of work to do and do the work in a separate step so that we're
3685 // not adding formulae and register counts while we're searching.
3686 SmallVector<WorkItem, 32> WorkItems;
3687 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
3688 for (const SCEV *Reg : Sequence) {
3689 const ImmMapTy &Imms = Map.find(Reg)->second;
3691 // It's not worthwhile looking for reuse if there's only one offset.
3692 if (Imms.size() == 1)
3695 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3696 for (const auto &Entry : Imms)
3697 dbgs() << ' ' << Entry.first;
3700 // Examine each offset.
3701 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3703 const SCEV *OrigReg = J->second;
3705 int64_t JImm = J->first;
3706 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3708 if (!isa<SCEVConstant>(OrigReg) &&
3709 UsedByIndicesMap[Reg].count() == 1) {
3710 DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg << '\n');
3714 // Conservatively examine offsets between this orig reg a few selected
3716 ImmMapTy::const_iterator OtherImms[] = {
3717 Imms.begin(), std::prev(Imms.end()),
3718 Imms.lower_bound((Imms.begin()->first + std::prev(Imms.end())->first) /
3721 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
3722 ImmMapTy::const_iterator M = OtherImms[i];
3723 if (M == J || M == JE) continue;
3725 // Compute the difference between the two.
3726 int64_t Imm = (uint64_t)JImm - M->first;
3727 for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
3728 LUIdx = UsedByIndices.find_next(LUIdx))
3729 // Make a memo of this use, offset, and register tuple.
3730 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)).second)
3731 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
3738 UsedByIndicesMap.clear();
3739 UniqueItems.clear();
3741 // Now iterate through the worklist and add new formulae.
3742 for (const WorkItem &WI : WorkItems) {
3743 size_t LUIdx = WI.LUIdx;
3744 LSRUse &LU = Uses[LUIdx];
3745 int64_t Imm = WI.Imm;
3746 const SCEV *OrigReg = WI.OrigReg;
3748 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
3749 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
3750 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
3752 // TODO: Use a more targeted data structure.
3753 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
3754 Formula F = LU.Formulae[L];
3755 // FIXME: The code for the scaled and unscaled registers looks
3756 // very similar but slightly different. Investigate if they
3757 // could be merged. That way, we would not have to unscale the
3760 // Use the immediate in the scaled register.
3761 if (F.ScaledReg == OrigReg) {
3762 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
3763 // Don't create 50 + reg(-50).
3764 if (F.referencesReg(SE.getSCEV(
3765 ConstantInt::get(IntTy, -(uint64_t)Offset))))
3768 NewF.BaseOffset = Offset;
3769 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3772 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
3774 // If the new scale is a constant in a register, and adding the constant
3775 // value to the immediate would produce a value closer to zero than the
3776 // immediate itself, then the formula isn't worthwhile.
3777 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
3778 if (C->getValue()->isNegative() !=
3779 (NewF.BaseOffset < 0) &&
3780 (C->getValue()->getValue().abs() * APInt(BitWidth, F.Scale))
3781 .ule(std::abs(NewF.BaseOffset)))
3785 NewF.canonicalize();
3786 (void)InsertFormula(LU, LUIdx, NewF);
3788 // Use the immediate in a base register.
3789 for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
3790 const SCEV *BaseReg = F.BaseRegs[N];
3791 if (BaseReg != OrigReg)
3794 NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
3795 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
3796 LU.Kind, LU.AccessTy, NewF)) {
3797 if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
3800 NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
3802 NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
3804 // If the new formula has a constant in a register, and adding the
3805 // constant value to the immediate would produce a value closer to
3806 // zero than the immediate itself, then the formula isn't worthwhile.
3807 for (const SCEV *NewReg : NewF.BaseRegs)
3808 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewReg))
3809 if ((C->getValue()->getValue() + NewF.BaseOffset).abs().slt(
3810 std::abs(NewF.BaseOffset)) &&
3811 (C->getValue()->getValue() +
3812 NewF.BaseOffset).countTrailingZeros() >=
3813 countTrailingZeros<uint64_t>(NewF.BaseOffset))
3817 NewF.canonicalize();
3818 (void)InsertFormula(LU, LUIdx, NewF);
3827 /// Generate formulae for each use.
3829 LSRInstance::GenerateAllReuseFormulae() {
3830 // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
3831 // queries are more precise.
3832 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3833 LSRUse &LU = Uses[LUIdx];
3834 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3835 GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
3836 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3837 GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
3839 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3840 LSRUse &LU = Uses[LUIdx];
3841 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3842 GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
3843 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3844 GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
3845 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3846 GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
3847 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3848 GenerateScales(LU, LUIdx, LU.Formulae[i]);
3850 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3851 LSRUse &LU = Uses[LUIdx];
3852 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3853 GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
3856 GenerateCrossUseConstantOffsets();
3858 DEBUG(dbgs() << "\n"
3859 "After generating reuse formulae:\n";
3860 print_uses(dbgs()));
3863 /// If there are multiple formulae with the same set of registers used
3864 /// by other uses, pick the best one and delete the others.
3865 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
3866 DenseSet<const SCEV *> VisitedRegs;
3867 SmallPtrSet<const SCEV *, 16> Regs;
3868 SmallPtrSet<const SCEV *, 16> LoserRegs;
3870 bool ChangedFormulae = false;
3873 // Collect the best formula for each unique set of shared registers. This
3874 // is reset for each use.
3875 typedef DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>
3877 BestFormulaeTy BestFormulae;
3879 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3880 LSRUse &LU = Uses[LUIdx];
3881 DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs()); dbgs() << '\n');
3884 for (size_t FIdx = 0, NumForms = LU.Formulae.size();
3885 FIdx != NumForms; ++FIdx) {
3886 Formula &F = LU.Formulae[FIdx];
3888 // Some formulas are instant losers. For example, they may depend on
3889 // nonexistent AddRecs from other loops. These need to be filtered
3890 // immediately, otherwise heuristics could choose them over others leading
3891 // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
3892 // avoids the need to recompute this information across formulae using the
3893 // same bad AddRec. Passing LoserRegs is also essential unless we remove
3894 // the corresponding bad register from the Regs set.
3897 CostF.RateFormula(TTI, F, Regs, VisitedRegs, L, LU.Offsets, SE, DT, LU,
3899 if (CostF.isLoser()) {
3900 // During initial formula generation, undesirable formulae are generated
3901 // by uses within other loops that have some non-trivial address mode or
3902 // use the postinc form of the IV. LSR needs to provide these formulae
3903 // as the basis of rediscovering the desired formula that uses an AddRec
3904 // corresponding to the existing phi. Once all formulae have been
3905 // generated, these initial losers may be pruned.
3906 DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
3910 SmallVector<const SCEV *, 4> Key;
3911 for (const SCEV *Reg : F.BaseRegs) {
3912 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3916 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
3917 Key.push_back(F.ScaledReg);
3918 // Unstable sort by host order ok, because this is only used for
3920 std::sort(Key.begin(), Key.end());
3922 std::pair<BestFormulaeTy::const_iterator, bool> P =
3923 BestFormulae.insert(std::make_pair(Key, FIdx));
3927 Formula &Best = LU.Formulae[P.first->second];
3931 CostBest.RateFormula(TTI, Best, Regs, VisitedRegs, L, LU.Offsets, SE,
3933 if (CostF < CostBest)
3935 DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
3937 " in favor of formula "; Best.print(dbgs());
3941 ChangedFormulae = true;
3943 LU.DeleteFormula(F);
3949 // Now that we've filtered out some formulae, recompute the Regs set.
3951 LU.RecomputeRegs(LUIdx, RegUses);
3953 // Reset this to prepare for the next use.
3954 BestFormulae.clear();
3957 DEBUG(if (ChangedFormulae) {
3959 "After filtering out undesirable candidates:\n";
3964 // This is a rough guess that seems to work fairly well.
3965 static const size_t ComplexityLimit = UINT16_MAX;
3967 /// Estimate the worst-case number of solutions the solver might have to
3968 /// consider. It almost never considers this many solutions because it prune the
3969 /// search space, but the pruning isn't always sufficient.
3970 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
3972 for (const LSRUse &LU : Uses) {
3973 size_t FSize = LU.Formulae.size();
3974 if (FSize >= ComplexityLimit) {
3975 Power = ComplexityLimit;
3979 if (Power >= ComplexityLimit)
3985 /// When one formula uses a superset of the registers of another formula, it
3986 /// won't help reduce register pressure (though it may not necessarily hurt
3987 /// register pressure); remove it to simplify the system.
3988 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
3989 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
3990 DEBUG(dbgs() << "The search space is too complex.\n");
3992 DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
3993 "which use a superset of registers used by other "
3996 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3997 LSRUse &LU = Uses[LUIdx];
3999 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4000 Formula &F = LU.Formulae[i];
4001 // Look for a formula with a constant or GV in a register. If the use
4002 // also has a formula with that same value in an immediate field,
4003 // delete the one that uses a register.
4004 for (SmallVectorImpl<const SCEV *>::const_iterator
4005 I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
4006 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
4008 NewF.BaseOffset += C->getValue()->getSExtValue();
4009 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4010 (I - F.BaseRegs.begin()));
4011 if (LU.HasFormulaWithSameRegs(NewF)) {
4012 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4013 LU.DeleteFormula(F);
4019 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
4020 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
4024 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4025 (I - F.BaseRegs.begin()));
4026 if (LU.HasFormulaWithSameRegs(NewF)) {
4027 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4029 LU.DeleteFormula(F);
4040 LU.RecomputeRegs(LUIdx, RegUses);
4043 DEBUG(dbgs() << "After pre-selection:\n";
4044 print_uses(dbgs()));
4048 /// When there are many registers for expressions like A, A+1, A+2, etc.,
4049 /// allocate a single register for them.
4050 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
4051 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4054 DEBUG(dbgs() << "The search space is too complex.\n"
4055 "Narrowing the search space by assuming that uses separated "
4056 "by a constant offset will use the same registers.\n");
4058 // This is especially useful for unrolled loops.
4060 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4061 LSRUse &LU = Uses[LUIdx];
4062 for (const Formula &F : LU.Formulae) {
4063 if (F.BaseOffset == 0 || (F.Scale != 0 && F.Scale != 1))
4066 LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
4070 if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
4071 LU.Kind, LU.AccessTy))
4074 DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
4076 LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
4078 // Update the relocs to reference the new use.
4079 for (LSRFixup &Fixup : Fixups) {
4080 if (Fixup.LUIdx == LUIdx) {
4081 Fixup.LUIdx = LUThatHas - &Uses.front();
4082 Fixup.Offset += F.BaseOffset;
4083 // Add the new offset to LUThatHas' offset list.
4084 if (LUThatHas->Offsets.back() != Fixup.Offset) {
4085 LUThatHas->Offsets.push_back(Fixup.Offset);
4086 if (Fixup.Offset > LUThatHas->MaxOffset)
4087 LUThatHas->MaxOffset = Fixup.Offset;
4088 if (Fixup.Offset < LUThatHas->MinOffset)
4089 LUThatHas->MinOffset = Fixup.Offset;
4091 DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
4093 if (Fixup.LUIdx == NumUses-1)
4094 Fixup.LUIdx = LUIdx;
4097 // Delete formulae from the new use which are no longer legal.
4099 for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
4100 Formula &F = LUThatHas->Formulae[i];
4101 if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
4102 LUThatHas->Kind, LUThatHas->AccessTy, F)) {
4103 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4105 LUThatHas->DeleteFormula(F);
4113 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4115 // Delete the old use.
4116 DeleteUse(LU, LUIdx);
4123 DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4126 /// Call FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4127 /// we've done more filtering, as it may be able to find more formulae to
4129 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4130 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4131 DEBUG(dbgs() << "The search space is too complex.\n");
4133 DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4134 "undesirable dedicated registers.\n");
4136 FilterOutUndesirableDedicatedRegisters();
4138 DEBUG(dbgs() << "After pre-selection:\n";
4139 print_uses(dbgs()));
4143 /// Pick a register which seems likely to be profitable, and then in any use
4144 /// which has any reference to that register, delete all formulae which do not
4145 /// reference that register.
4146 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4147 // With all other options exhausted, loop until the system is simple
4148 // enough to handle.
4149 SmallPtrSet<const SCEV *, 4> Taken;
4150 while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4151 // Ok, we have too many of formulae on our hands to conveniently handle.
4152 // Use a rough heuristic to thin out the list.
4153 DEBUG(dbgs() << "The search space is too complex.\n");
4155 // Pick the register which is used by the most LSRUses, which is likely
4156 // to be a good reuse register candidate.
4157 const SCEV *Best = nullptr;
4158 unsigned BestNum = 0;
4159 for (const SCEV *Reg : RegUses) {
4160 if (Taken.count(Reg))
4165 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4166 if (Count > BestNum) {
4173 DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4174 << " will yield profitable reuse.\n");
4177 // In any use with formulae which references this register, delete formulae
4178 // which don't reference it.
4179 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4180 LSRUse &LU = Uses[LUIdx];
4181 if (!LU.Regs.count(Best)) continue;
4184 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4185 Formula &F = LU.Formulae[i];
4186 if (!F.referencesReg(Best)) {
4187 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4188 LU.DeleteFormula(F);
4192 assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4198 LU.RecomputeRegs(LUIdx, RegUses);
4201 DEBUG(dbgs() << "After pre-selection:\n";
4202 print_uses(dbgs()));
4206 /// If there are an extraordinary number of formulae to choose from, use some
4207 /// rough heuristics to prune down the number of formulae. This keeps the main
4208 /// solver from taking an extraordinary amount of time in some worst-case
4210 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4211 NarrowSearchSpaceByDetectingSupersets();
4212 NarrowSearchSpaceByCollapsingUnrolledCode();
4213 NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4214 NarrowSearchSpaceByPickingWinnerRegs();
4217 /// This is the recursive solver.
4218 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4220 SmallVectorImpl<const Formula *> &Workspace,
4221 const Cost &CurCost,
4222 const SmallPtrSet<const SCEV *, 16> &CurRegs,
4223 DenseSet<const SCEV *> &VisitedRegs) const {
4226 // - use more aggressive filtering
4227 // - sort the formula so that the most profitable solutions are found first
4228 // - sort the uses too
4230 // - don't compute a cost, and then compare. compare while computing a cost
4232 // - track register sets with SmallBitVector
4234 const LSRUse &LU = Uses[Workspace.size()];
4236 // If this use references any register that's already a part of the
4237 // in-progress solution, consider it a requirement that a formula must
4238 // reference that register in order to be considered. This prunes out
4239 // unprofitable searching.
4240 SmallSetVector<const SCEV *, 4> ReqRegs;
4241 for (const SCEV *S : CurRegs)
4242 if (LU.Regs.count(S))
4245 SmallPtrSet<const SCEV *, 16> NewRegs;
4247 for (const Formula &F : LU.Formulae) {
4248 // Ignore formulae which may not be ideal in terms of register reuse of
4249 // ReqRegs. The formula should use all required registers before
4250 // introducing new ones.
4251 int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
4252 for (const SCEV *Reg : ReqRegs) {
4253 if ((F.ScaledReg && F.ScaledReg == Reg) ||
4254 std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) !=
4257 if (NumReqRegsToFind == 0)
4261 if (NumReqRegsToFind != 0) {
4262 // If none of the formulae satisfied the required registers, then we could
4263 // clear ReqRegs and try again. Currently, we simply give up in this case.
4267 // Evaluate the cost of the current formula. If it's already worse than
4268 // the current best, prune the search at that point.
4271 NewCost.RateFormula(TTI, F, NewRegs, VisitedRegs, L, LU.Offsets, SE, DT,
4273 if (NewCost < SolutionCost) {
4274 Workspace.push_back(&F);
4275 if (Workspace.size() != Uses.size()) {
4276 SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4277 NewRegs, VisitedRegs);
4278 if (F.getNumRegs() == 1 && Workspace.size() == 1)
4279 VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4281 DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4282 dbgs() << ".\n Regs:";
4283 for (const SCEV *S : NewRegs)
4284 dbgs() << ' ' << *S;
4287 SolutionCost = NewCost;
4288 Solution = Workspace;
4290 Workspace.pop_back();
4295 /// Choose one formula from each use. Return the results in the given Solution
4297 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4298 SmallVector<const Formula *, 8> Workspace;
4300 SolutionCost.Lose();
4302 SmallPtrSet<const SCEV *, 16> CurRegs;
4303 DenseSet<const SCEV *> VisitedRegs;
4304 Workspace.reserve(Uses.size());
4306 // SolveRecurse does all the work.
4307 SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4308 CurRegs, VisitedRegs);
4309 if (Solution.empty()) {
4310 DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4314 // Ok, we've now made all our decisions.
4315 DEBUG(dbgs() << "\n"
4316 "The chosen solution requires "; SolutionCost.print(dbgs());
4318 for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4320 Uses[i].print(dbgs());
4323 Solution[i]->print(dbgs());
4327 assert(Solution.size() == Uses.size() && "Malformed solution!");
4330 /// Helper for AdjustInsertPositionForExpand. Climb up the dominator tree far as
4331 /// we can go while still being dominated by the input positions. This helps
4332 /// canonicalize the insert position, which encourages sharing.
4333 BasicBlock::iterator
4334 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
4335 const SmallVectorImpl<Instruction *> &Inputs)
4338 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
4339 unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
4342 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
4343 if (!Rung) return IP;
4344 Rung = Rung->getIDom();
4345 if (!Rung) return IP;
4346 IDom = Rung->getBlock();
4348 // Don't climb into a loop though.
4349 const Loop *IDomLoop = LI.getLoopFor(IDom);
4350 unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
4351 if (IDomDepth <= IPLoopDepth &&
4352 (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
4356 bool AllDominate = true;
4357 Instruction *BetterPos = nullptr;
4358 Instruction *Tentative = IDom->getTerminator();
4359 for (Instruction *Inst : Inputs) {
4360 if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
4361 AllDominate = false;
4364 // Attempt to find an insert position in the middle of the block,
4365 // instead of at the end, so that it can be used for other expansions.
4366 if (IDom == Inst->getParent() &&
4367 (!BetterPos || !DT.dominates(Inst, BetterPos)))
4368 BetterPos = &*std::next(BasicBlock::iterator(Inst));
4373 IP = BetterPos->getIterator();
4375 IP = Tentative->getIterator();
4381 /// Determine an input position which will be dominated by the operands and
4382 /// which will dominate the result.
4383 BasicBlock::iterator
4384 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
4387 SCEVExpander &Rewriter) const {
4388 // Collect some instructions which must be dominated by the
4389 // expanding replacement. These must be dominated by any operands that
4390 // will be required in the expansion.
4391 SmallVector<Instruction *, 4> Inputs;
4392 if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
4393 Inputs.push_back(I);
4394 if (LU.Kind == LSRUse::ICmpZero)
4395 if (Instruction *I =
4396 dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
4397 Inputs.push_back(I);
4398 if (LF.PostIncLoops.count(L)) {
4399 if (LF.isUseFullyOutsideLoop(L))
4400 Inputs.push_back(L->getLoopLatch()->getTerminator());
4402 Inputs.push_back(IVIncInsertPos);
4404 // The expansion must also be dominated by the increment positions of any
4405 // loops it for which it is using post-inc mode.
4406 for (const Loop *PIL : LF.PostIncLoops) {
4407 if (PIL == L) continue;
4409 // Be dominated by the loop exit.
4410 SmallVector<BasicBlock *, 4> ExitingBlocks;
4411 PIL->getExitingBlocks(ExitingBlocks);
4412 if (!ExitingBlocks.empty()) {
4413 BasicBlock *BB = ExitingBlocks[0];
4414 for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
4415 BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
4416 Inputs.push_back(BB->getTerminator());
4420 assert(!isa<PHINode>(LowestIP) && !LowestIP->isEHPad()
4421 && !isa<DbgInfoIntrinsic>(LowestIP) &&
4422 "Insertion point must be a normal instruction");
4424 // Then, climb up the immediate dominator tree as far as we can go while
4425 // still being dominated by the input positions.
4426 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
4428 // Don't insert instructions before PHI nodes.
4429 while (isa<PHINode>(IP)) ++IP;
4431 // Ignore landingpad instructions.
4432 while (!isa<TerminatorInst>(IP) && IP->isEHPad()) ++IP;
4434 // Ignore debug intrinsics.
4435 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
4437 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
4438 // IP consistent across expansions and allows the previously inserted
4439 // instructions to be reused by subsequent expansion.
4440 while (Rewriter.isInsertedInstruction(&*IP) && IP != LowestIP)
4446 /// Emit instructions for the leading candidate expression for this LSRUse (this
4447 /// is called "expanding").
4448 Value *LSRInstance::Expand(const LSRFixup &LF,
4450 BasicBlock::iterator IP,
4451 SCEVExpander &Rewriter,
4452 SmallVectorImpl<WeakVH> &DeadInsts) const {
4453 const LSRUse &LU = Uses[LF.LUIdx];
4454 if (LU.RigidFormula)
4455 return LF.OperandValToReplace;
4457 // Determine an input position which will be dominated by the operands and
4458 // which will dominate the result.
4459 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
4461 // Inform the Rewriter if we have a post-increment use, so that it can
4462 // perform an advantageous expansion.
4463 Rewriter.setPostInc(LF.PostIncLoops);
4465 // This is the type that the user actually needs.
4466 Type *OpTy = LF.OperandValToReplace->getType();
4467 // This will be the type that we'll initially expand to.
4468 Type *Ty = F.getType();
4470 // No type known; just expand directly to the ultimate type.
4472 else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
4473 // Expand directly to the ultimate type if it's the right size.
4475 // This is the type to do integer arithmetic in.
4476 Type *IntTy = SE.getEffectiveSCEVType(Ty);
4478 // Build up a list of operands to add together to form the full base.
4479 SmallVector<const SCEV *, 8> Ops;
4481 // Expand the BaseRegs portion.
4482 for (const SCEV *Reg : F.BaseRegs) {
4483 assert(!Reg->isZero() && "Zero allocated in a base register!");
4485 // If we're expanding for a post-inc user, make the post-inc adjustment.
4486 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4487 Reg = TransformForPostIncUse(Denormalize, Reg,
4488 LF.UserInst, LF.OperandValToReplace,
4491 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr, &*IP)));
4494 // Expand the ScaledReg portion.
4495 Value *ICmpScaledV = nullptr;
4497 const SCEV *ScaledS = F.ScaledReg;
4499 // If we're expanding for a post-inc user, make the post-inc adjustment.
4500 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4501 ScaledS = TransformForPostIncUse(Denormalize, ScaledS,
4502 LF.UserInst, LF.OperandValToReplace,
4505 if (LU.Kind == LSRUse::ICmpZero) {
4506 // Expand ScaleReg as if it was part of the base regs.
4509 SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, &*IP)));
4511 // An interesting way of "folding" with an icmp is to use a negated
4512 // scale, which we'll implement by inserting it into the other operand
4514 assert(F.Scale == -1 &&
4515 "The only scale supported by ICmpZero uses is -1!");
4516 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr, &*IP);
4519 // Otherwise just expand the scaled register and an explicit scale,
4520 // which is expected to be matched as part of the address.
4522 // Flush the operand list to suppress SCEVExpander hoisting address modes.
4523 // Unless the addressing mode will not be folded.
4524 if (!Ops.empty() && LU.Kind == LSRUse::Address &&
4525 isAMCompletelyFolded(TTI, LU, F)) {
4526 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4528 Ops.push_back(SE.getUnknown(FullV));
4530 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, &*IP));
4533 SE.getMulExpr(ScaledS, SE.getConstant(ScaledS->getType(), F.Scale));
4534 Ops.push_back(ScaledS);
4538 // Expand the GV portion.
4540 // Flush the operand list to suppress SCEVExpander hoisting.
4542 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4544 Ops.push_back(SE.getUnknown(FullV));
4546 Ops.push_back(SE.getUnknown(F.BaseGV));
4549 // Flush the operand list to suppress SCEVExpander hoisting of both folded and
4550 // unfolded offsets. LSR assumes they both live next to their uses.
4552 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4554 Ops.push_back(SE.getUnknown(FullV));
4557 // Expand the immediate portion.
4558 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
4560 if (LU.Kind == LSRUse::ICmpZero) {
4561 // The other interesting way of "folding" with an ICmpZero is to use a
4562 // negated immediate.
4564 ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
4566 Ops.push_back(SE.getUnknown(ICmpScaledV));
4567 ICmpScaledV = ConstantInt::get(IntTy, Offset);
4570 // Just add the immediate values. These again are expected to be matched
4571 // as part of the address.
4572 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
4576 // Expand the unfolded offset portion.
4577 int64_t UnfoldedOffset = F.UnfoldedOffset;
4578 if (UnfoldedOffset != 0) {
4579 // Just add the immediate values.
4580 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy,
4584 // Emit instructions summing all the operands.
4585 const SCEV *FullS = Ops.empty() ?
4586 SE.getConstant(IntTy, 0) :
4588 Value *FullV = Rewriter.expandCodeFor(FullS, Ty, &*IP);
4590 // We're done expanding now, so reset the rewriter.
4591 Rewriter.clearPostInc();
4593 // An ICmpZero Formula represents an ICmp which we're handling as a
4594 // comparison against zero. Now that we've expanded an expression for that
4595 // form, update the ICmp's other operand.
4596 if (LU.Kind == LSRUse::ICmpZero) {
4597 ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
4598 DeadInsts.emplace_back(CI->getOperand(1));
4599 assert(!F.BaseGV && "ICmp does not support folding a global value and "
4600 "a scale at the same time!");
4601 if (F.Scale == -1) {
4602 if (ICmpScaledV->getType() != OpTy) {
4604 CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
4606 ICmpScaledV, OpTy, "tmp", CI);
4609 CI->setOperand(1, ICmpScaledV);
4611 // A scale of 1 means that the scale has been expanded as part of the
4613 assert((F.Scale == 0 || F.Scale == 1) &&
4614 "ICmp does not support folding a global value and "
4615 "a scale at the same time!");
4616 Constant *C = ConstantInt::getSigned(SE.getEffectiveSCEVType(OpTy),
4618 if (C->getType() != OpTy)
4619 C = ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
4623 CI->setOperand(1, C);
4630 /// Helper for Rewrite. PHI nodes are special because the use of their operands
4631 /// effectively happens in their predecessor blocks, so the expression may need
4632 /// to be expanded in multiple places.
4633 void LSRInstance::RewriteForPHI(PHINode *PN,
4636 SCEVExpander &Rewriter,
4637 SmallVectorImpl<WeakVH> &DeadInsts,
4639 DenseMap<BasicBlock *, Value *> Inserted;
4640 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
4641 if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
4642 BasicBlock *BB = PN->getIncomingBlock(i);
4644 // If this is a critical edge, split the edge so that we do not insert
4645 // the code on all predecessor/successor paths. We do this unless this
4646 // is the canonical backedge for this loop, which complicates post-inc
4648 if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
4649 !isa<IndirectBrInst>(BB->getTerminator())) {
4650 BasicBlock *Parent = PN->getParent();
4651 Loop *PNLoop = LI.getLoopFor(Parent);
4652 if (!PNLoop || Parent != PNLoop->getHeader()) {
4653 // Split the critical edge.
4654 BasicBlock *NewBB = nullptr;
4655 if (!Parent->isLandingPad()) {
4656 NewBB = SplitCriticalEdge(BB, Parent,
4657 CriticalEdgeSplittingOptions(&DT, &LI)
4658 .setMergeIdenticalEdges()
4659 .setDontDeleteUselessPHIs());
4661 SmallVector<BasicBlock*, 2> NewBBs;
4662 SplitLandingPadPredecessors(Parent, BB, "", "", NewBBs, &DT, &LI);
4665 // If NewBB==NULL, then SplitCriticalEdge refused to split because all
4666 // phi predecessors are identical. The simple thing to do is skip
4667 // splitting in this case rather than complicate the API.
4669 // If PN is outside of the loop and BB is in the loop, we want to
4670 // move the block to be immediately before the PHI block, not
4671 // immediately after BB.
4672 if (L->contains(BB) && !L->contains(PN))
4673 NewBB->moveBefore(PN->getParent());
4675 // Splitting the edge can reduce the number of PHI entries we have.
4676 e = PN->getNumIncomingValues();
4678 i = PN->getBasicBlockIndex(BB);
4683 std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
4684 Inserted.insert(std::make_pair(BB, static_cast<Value *>(nullptr)));
4686 PN->setIncomingValue(i, Pair.first->second);
4688 Value *FullV = Expand(LF, F, BB->getTerminator()->getIterator(),
4689 Rewriter, DeadInsts);
4691 // If this is reuse-by-noop-cast, insert the noop cast.
4692 Type *OpTy = LF.OperandValToReplace->getType();
4693 if (FullV->getType() != OpTy)
4695 CastInst::Create(CastInst::getCastOpcode(FullV, false,
4697 FullV, LF.OperandValToReplace->getType(),
4698 "tmp", BB->getTerminator());
4700 PN->setIncomingValue(i, FullV);
4701 Pair.first->second = FullV;
4706 /// Emit instructions for the leading candidate expression for this LSRUse (this
4707 /// is called "expanding"), and update the UserInst to reference the newly
4709 void LSRInstance::Rewrite(const LSRFixup &LF,
4711 SCEVExpander &Rewriter,
4712 SmallVectorImpl<WeakVH> &DeadInsts,
4714 // First, find an insertion point that dominates UserInst. For PHI nodes,
4715 // find the nearest block which dominates all the relevant uses.
4716 if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
4717 RewriteForPHI(PN, LF, F, Rewriter, DeadInsts, P);
4720 Expand(LF, F, LF.UserInst->getIterator(), Rewriter, DeadInsts);
4722 // If this is reuse-by-noop-cast, insert the noop cast.
4723 Type *OpTy = LF.OperandValToReplace->getType();
4724 if (FullV->getType() != OpTy) {
4726 CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
4727 FullV, OpTy, "tmp", LF.UserInst);
4731 // Update the user. ICmpZero is handled specially here (for now) because
4732 // Expand may have updated one of the operands of the icmp already, and
4733 // its new value may happen to be equal to LF.OperandValToReplace, in
4734 // which case doing replaceUsesOfWith leads to replacing both operands
4735 // with the same value. TODO: Reorganize this.
4736 if (Uses[LF.LUIdx].Kind == LSRUse::ICmpZero)
4737 LF.UserInst->setOperand(0, FullV);
4739 LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
4742 DeadInsts.emplace_back(LF.OperandValToReplace);
4745 /// Rewrite all the fixup locations with new values, following the chosen
4748 LSRInstance::ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
4750 // Keep track of instructions we may have made dead, so that
4751 // we can remove them after we are done working.
4752 SmallVector<WeakVH, 16> DeadInsts;
4754 SCEVExpander Rewriter(SE, L->getHeader()->getModule()->getDataLayout(),
4757 Rewriter.setDebugType(DEBUG_TYPE);
4759 Rewriter.disableCanonicalMode();
4760 Rewriter.enableLSRMode();
4761 Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
4763 // Mark phi nodes that terminate chains so the expander tries to reuse them.
4764 for (const IVChain &Chain : IVChainVec) {
4765 if (PHINode *PN = dyn_cast<PHINode>(Chain.tailUserInst()))
4766 Rewriter.setChainedPhi(PN);
4769 // Expand the new value definitions and update the users.
4770 for (const LSRFixup &Fixup : Fixups) {
4771 Rewrite(Fixup, *Solution[Fixup.LUIdx], Rewriter, DeadInsts, P);
4776 for (const IVChain &Chain : IVChainVec) {
4777 GenerateIVChain(Chain, Rewriter, DeadInsts);
4780 // Clean up after ourselves. This must be done before deleting any
4784 Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
4787 LSRInstance::LSRInstance(Loop *L, Pass *P)
4788 : IU(P->getAnalysis<IVUsers>()),
4789 SE(P->getAnalysis<ScalarEvolutionWrapperPass>().getSE()),
4790 DT(P->getAnalysis<DominatorTreeWrapperPass>().getDomTree()),
4791 LI(P->getAnalysis<LoopInfoWrapperPass>().getLoopInfo()),
4792 TTI(P->getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
4793 *L->getHeader()->getParent())),
4794 L(L), Changed(false), IVIncInsertPos(nullptr) {
4795 // If LoopSimplify form is not available, stay out of trouble.
4796 if (!L->isLoopSimplifyForm())
4799 // If there's no interesting work to be done, bail early.
4800 if (IU.empty()) return;
4802 // If there's too much analysis to be done, bail early. We won't be able to
4803 // model the problem anyway.
4804 unsigned NumUsers = 0;
4805 for (const IVStrideUse &U : IU) {
4806 if (++NumUsers > MaxIVUsers) {
4808 DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << U << "\n");
4814 // All dominating loops must have preheaders, or SCEVExpander may not be able
4815 // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
4817 // IVUsers analysis should only create users that are dominated by simple loop
4818 // headers. Since this loop should dominate all of its users, its user list
4819 // should be empty if this loop itself is not within a simple loop nest.
4820 for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
4821 Rung; Rung = Rung->getIDom()) {
4822 BasicBlock *BB = Rung->getBlock();
4823 const Loop *DomLoop = LI.getLoopFor(BB);
4824 if (DomLoop && DomLoop->getHeader() == BB) {
4825 assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
4830 DEBUG(dbgs() << "\nLSR on loop ";
4831 L->getHeader()->printAsOperand(dbgs(), /*PrintType=*/false);
4834 // First, perform some low-level loop optimizations.
4836 OptimizeLoopTermCond();
4838 // If loop preparation eliminates all interesting IV users, bail.
4839 if (IU.empty()) return;
4841 // Skip nested loops until we can model them better with formulae.
4843 DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
4847 // Start collecting data and preparing for the solver.
4849 CollectInterestingTypesAndFactors();
4850 CollectFixupsAndInitialFormulae();
4851 CollectLoopInvariantFixupsAndFormulae();
4853 assert(!Uses.empty() && "IVUsers reported at least one use");
4854 DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
4855 print_uses(dbgs()));
4857 // Now use the reuse data to generate a bunch of interesting ways
4858 // to formulate the values needed for the uses.
4859 GenerateAllReuseFormulae();
4861 FilterOutUndesirableDedicatedRegisters();
4862 NarrowSearchSpaceUsingHeuristics();
4864 SmallVector<const Formula *, 8> Solution;
4867 // Release memory that is no longer needed.
4872 if (Solution.empty())
4876 // Formulae should be legal.
4877 for (const LSRUse &LU : Uses) {
4878 for (const Formula &F : LU.Formulae)
4879 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4880 F) && "Illegal formula generated!");
4884 // Now that we've decided what we want, make it so.
4885 ImplementSolution(Solution, P);
4888 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
4889 if (Factors.empty() && Types.empty()) return;
4891 OS << "LSR has identified the following interesting factors and types: ";
4894 for (int64_t Factor : Factors) {
4895 if (!First) OS << ", ";
4897 OS << '*' << Factor;
4900 for (Type *Ty : Types) {
4901 if (!First) OS << ", ";
4903 OS << '(' << *Ty << ')';
4908 void LSRInstance::print_fixups(raw_ostream &OS) const {
4909 OS << "LSR is examining the following fixup sites:\n";
4910 for (const LSRFixup &LF : Fixups) {
4917 void LSRInstance::print_uses(raw_ostream &OS) const {
4918 OS << "LSR is examining the following uses:\n";
4919 for (const LSRUse &LU : Uses) {
4923 for (const Formula &F : LU.Formulae) {
4931 void LSRInstance::print(raw_ostream &OS) const {
4932 print_factors_and_types(OS);
4938 void LSRInstance::dump() const {
4939 print(errs()); errs() << '\n';
4944 class LoopStrengthReduce : public LoopPass {
4946 static char ID; // Pass ID, replacement for typeid
4947 LoopStrengthReduce();
4950 bool runOnLoop(Loop *L, LPPassManager &LPM) override;
4951 void getAnalysisUsage(AnalysisUsage &AU) const override;
4956 char LoopStrengthReduce::ID = 0;
4957 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
4958 "Loop Strength Reduction", false, false)
4959 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
4960 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
4961 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
4962 INITIALIZE_PASS_DEPENDENCY(IVUsers)
4963 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
4964 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
4965 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
4966 "Loop Strength Reduction", false, false)
4969 Pass *llvm::createLoopStrengthReducePass() {
4970 return new LoopStrengthReduce();
4973 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
4974 initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
4977 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
4978 // We split critical edges, so we change the CFG. However, we do update
4979 // many analyses if they are around.
4980 AU.addPreservedID(LoopSimplifyID);
4982 AU.addRequired<LoopInfoWrapperPass>();
4983 AU.addPreserved<LoopInfoWrapperPass>();
4984 AU.addRequiredID(LoopSimplifyID);
4985 AU.addRequired<DominatorTreeWrapperPass>();
4986 AU.addPreserved<DominatorTreeWrapperPass>();
4987 AU.addRequired<ScalarEvolutionWrapperPass>();
4988 AU.addPreserved<ScalarEvolutionWrapperPass>();
4989 // Requiring LoopSimplify a second time here prevents IVUsers from running
4990 // twice, since LoopSimplify was invalidated by running ScalarEvolution.
4991 AU.addRequiredID(LoopSimplifyID);
4992 AU.addRequired<IVUsers>();
4993 AU.addPreserved<IVUsers>();
4994 AU.addRequired<TargetTransformInfoWrapperPass>();
4997 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
4998 if (skipOptnoneFunction(L))
5001 bool Changed = false;
5003 // Run the main LSR transformation.
5004 Changed |= LSRInstance(L, this).getChanged();
5006 // Remove any extra phis created by processing inner loops.
5007 Changed |= DeleteDeadPHIs(L->getHeader());
5008 if (EnablePhiElim && L->isLoopSimplifyForm()) {
5009 SmallVector<WeakVH, 16> DeadInsts;
5010 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
5011 SCEVExpander Rewriter(getAnalysis<ScalarEvolutionWrapperPass>().getSE(), DL,
5014 Rewriter.setDebugType(DEBUG_TYPE);
5016 unsigned numFolded = Rewriter.replaceCongruentIVs(
5017 L, &getAnalysis<DominatorTreeWrapperPass>().getDomTree(), DeadInsts,
5018 &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
5019 *L->getHeader()->getParent()));
5022 DeleteTriviallyDeadInstructions(DeadInsts);
5023 DeleteDeadPHIs(L->getHeader());