1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass munges the code in the input function to better prepare it for
11 // SelectionDAG-based code generation. This works around limitations in it's
12 // basic-block-at-a-time approach. It should eventually be removed.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "codegenprepare"
17 #include "llvm/Transforms/Scalar.h"
18 #include "llvm/Constants.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Function.h"
21 #include "llvm/InlineAsm.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Pass.h"
24 #include "llvm/Target/TargetAsmInfo.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Target/TargetLowering.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
29 #include "llvm/Transforms/Utils/Local.h"
30 #include "llvm/ADT/DenseMap.h"
31 #include "llvm/ADT/SmallSet.h"
32 #include "llvm/Support/CallSite.h"
33 #include "llvm/Support/Compiler.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/GetElementPtrTypeIterator.h"
36 #include "llvm/Support/PatternMatch.h"
38 using namespace llvm::PatternMatch;
41 class VISIBILITY_HIDDEN CodeGenPrepare : public FunctionPass {
42 /// TLI - Keep a pointer of a TargetLowering to consult for determining
43 /// transformation profitability.
44 const TargetLowering *TLI;
46 static char ID; // Pass identification, replacement for typeid
47 explicit CodeGenPrepare(const TargetLowering *tli = 0)
48 : FunctionPass(&ID), TLI(tli) {}
49 bool runOnFunction(Function &F);
52 bool EliminateMostlyEmptyBlocks(Function &F);
53 bool CanMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
54 void EliminateMostlyEmptyBlock(BasicBlock *BB);
55 bool OptimizeBlock(BasicBlock &BB);
56 bool OptimizeMemoryInst(Instruction *I, Value *Addr, const Type *AccessTy,
57 DenseMap<Value*,Value*> &SunkAddrs);
58 bool OptimizeInlineAsmInst(Instruction *I, CallSite CS,
59 DenseMap<Value*,Value*> &SunkAddrs);
60 bool OptimizeExtUses(Instruction *I);
64 char CodeGenPrepare::ID = 0;
65 static RegisterPass<CodeGenPrepare> X("codegenprepare",
66 "Optimize for code generation");
68 FunctionPass *llvm::createCodeGenPreparePass(const TargetLowering *TLI) {
69 return new CodeGenPrepare(TLI);
73 bool CodeGenPrepare::runOnFunction(Function &F) {
74 bool EverMadeChange = false;
76 // First pass, eliminate blocks that contain only PHI nodes and an
77 // unconditional branch.
78 EverMadeChange |= EliminateMostlyEmptyBlocks(F);
80 bool MadeChange = true;
83 for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
84 MadeChange |= OptimizeBlock(*BB);
85 EverMadeChange |= MadeChange;
87 return EverMadeChange;
90 /// EliminateMostlyEmptyBlocks - eliminate blocks that contain only PHI nodes
91 /// and an unconditional branch. Passes before isel (e.g. LSR/loopsimplify)
92 /// often split edges in ways that are non-optimal for isel. Start by
93 /// eliminating these blocks so we can split them the way we want them.
94 bool CodeGenPrepare::EliminateMostlyEmptyBlocks(Function &F) {
95 bool MadeChange = false;
96 // Note that this intentionally skips the entry block.
97 for (Function::iterator I = ++F.begin(), E = F.end(); I != E; ) {
100 // If this block doesn't end with an uncond branch, ignore it.
101 BranchInst *BI = dyn_cast<BranchInst>(BB->getTerminator());
102 if (!BI || !BI->isUnconditional())
105 // If the instruction before the branch isn't a phi node, then other stuff
106 // is happening here.
107 BasicBlock::iterator BBI = BI;
108 if (BBI != BB->begin()) {
110 if (!isa<PHINode>(BBI)) continue;
113 // Do not break infinite loops.
114 BasicBlock *DestBB = BI->getSuccessor(0);
118 if (!CanMergeBlocks(BB, DestBB))
121 EliminateMostlyEmptyBlock(BB);
127 /// CanMergeBlocks - Return true if we can merge BB into DestBB if there is a
128 /// single uncond branch between them, and BB contains no other non-phi
130 bool CodeGenPrepare::CanMergeBlocks(const BasicBlock *BB,
131 const BasicBlock *DestBB) const {
132 // We only want to eliminate blocks whose phi nodes are used by phi nodes in
133 // the successor. If there are more complex condition (e.g. preheaders),
134 // don't mess around with them.
135 BasicBlock::const_iterator BBI = BB->begin();
136 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
137 for (Value::use_const_iterator UI = PN->use_begin(), E = PN->use_end();
139 const Instruction *User = cast<Instruction>(*UI);
140 if (User->getParent() != DestBB || !isa<PHINode>(User))
142 // If User is inside DestBB block and it is a PHINode then check
143 // incoming value. If incoming value is not from BB then this is
144 // a complex condition (e.g. preheaders) we want to avoid here.
145 if (User->getParent() == DestBB) {
146 if (const PHINode *UPN = dyn_cast<PHINode>(User))
147 for (unsigned I = 0, E = UPN->getNumIncomingValues(); I != E; ++I) {
148 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I));
149 if (Insn && Insn->getParent() == BB &&
150 Insn->getParent() != UPN->getIncomingBlock(I))
157 // If BB and DestBB contain any common predecessors, then the phi nodes in BB
158 // and DestBB may have conflicting incoming values for the block. If so, we
159 // can't merge the block.
160 const PHINode *DestBBPN = dyn_cast<PHINode>(DestBB->begin());
161 if (!DestBBPN) return true; // no conflict.
163 // Collect the preds of BB.
164 SmallPtrSet<const BasicBlock*, 16> BBPreds;
165 if (const PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
166 // It is faster to get preds from a PHI than with pred_iterator.
167 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
168 BBPreds.insert(BBPN->getIncomingBlock(i));
170 BBPreds.insert(pred_begin(BB), pred_end(BB));
173 // Walk the preds of DestBB.
174 for (unsigned i = 0, e = DestBBPN->getNumIncomingValues(); i != e; ++i) {
175 BasicBlock *Pred = DestBBPN->getIncomingBlock(i);
176 if (BBPreds.count(Pred)) { // Common predecessor?
177 BBI = DestBB->begin();
178 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
179 const Value *V1 = PN->getIncomingValueForBlock(Pred);
180 const Value *V2 = PN->getIncomingValueForBlock(BB);
182 // If V2 is a phi node in BB, look up what the mapped value will be.
183 if (const PHINode *V2PN = dyn_cast<PHINode>(V2))
184 if (V2PN->getParent() == BB)
185 V2 = V2PN->getIncomingValueForBlock(Pred);
187 // If there is a conflict, bail out.
188 if (V1 != V2) return false;
197 /// EliminateMostlyEmptyBlock - Eliminate a basic block that have only phi's and
198 /// an unconditional branch in it.
199 void CodeGenPrepare::EliminateMostlyEmptyBlock(BasicBlock *BB) {
200 BranchInst *BI = cast<BranchInst>(BB->getTerminator());
201 BasicBlock *DestBB = BI->getSuccessor(0);
203 DOUT << "MERGING MOSTLY EMPTY BLOCKS - BEFORE:\n" << *BB << *DestBB;
205 // If the destination block has a single pred, then this is a trivial edge,
207 if (BasicBlock *SinglePred = DestBB->getSinglePredecessor()) {
208 // Remember if SinglePred was the entry block of the function. If so, we
209 // will need to move BB back to the entry position.
210 bool isEntry = SinglePred == &SinglePred->getParent()->getEntryBlock();
211 MergeBasicBlockIntoOnlyPred(DestBB);
213 if (isEntry && BB != &BB->getParent()->getEntryBlock())
214 BB->moveBefore(&BB->getParent()->getEntryBlock());
216 DOUT << "AFTER:\n" << *DestBB << "\n\n\n";
220 // Otherwise, we have multiple predecessors of BB. Update the PHIs in DestBB
221 // to handle the new incoming edges it is about to have.
223 for (BasicBlock::iterator BBI = DestBB->begin();
224 (PN = dyn_cast<PHINode>(BBI)); ++BBI) {
225 // Remove the incoming value for BB, and remember it.
226 Value *InVal = PN->removeIncomingValue(BB, false);
228 // Two options: either the InVal is a phi node defined in BB or it is some
229 // value that dominates BB.
230 PHINode *InValPhi = dyn_cast<PHINode>(InVal);
231 if (InValPhi && InValPhi->getParent() == BB) {
232 // Add all of the input values of the input PHI as inputs of this phi.
233 for (unsigned i = 0, e = InValPhi->getNumIncomingValues(); i != e; ++i)
234 PN->addIncoming(InValPhi->getIncomingValue(i),
235 InValPhi->getIncomingBlock(i));
237 // Otherwise, add one instance of the dominating value for each edge that
238 // we will be adding.
239 if (PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
240 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
241 PN->addIncoming(InVal, BBPN->getIncomingBlock(i));
243 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
244 PN->addIncoming(InVal, *PI);
249 // The PHIs are now updated, change everything that refers to BB to use
250 // DestBB and remove BB.
251 BB->replaceAllUsesWith(DestBB);
252 BB->eraseFromParent();
254 DOUT << "AFTER:\n" << *DestBB << "\n\n\n";
258 /// SplitEdgeNicely - Split the critical edge from TI to its specified
259 /// successor if it will improve codegen. We only do this if the successor has
260 /// phi nodes (otherwise critical edges are ok). If there is already another
261 /// predecessor of the succ that is empty (and thus has no phi nodes), use it
262 /// instead of introducing a new block.
263 static void SplitEdgeNicely(TerminatorInst *TI, unsigned SuccNum, Pass *P) {
264 BasicBlock *TIBB = TI->getParent();
265 BasicBlock *Dest = TI->getSuccessor(SuccNum);
266 assert(isa<PHINode>(Dest->begin()) &&
267 "This should only be called if Dest has a PHI!");
269 // As a hack, never split backedges of loops. Even though the copy for any
270 // PHIs inserted on the backedge would be dead for exits from the loop, we
271 // assume that the cost of *splitting* the backedge would be too high.
275 /// TIPHIValues - This array is lazily computed to determine the values of
276 /// PHIs in Dest that TI would provide.
277 SmallVector<Value*, 32> TIPHIValues;
279 // Check to see if Dest has any blocks that can be used as a split edge for
281 for (pred_iterator PI = pred_begin(Dest), E = pred_end(Dest); PI != E; ++PI) {
282 BasicBlock *Pred = *PI;
283 // To be usable, the pred has to end with an uncond branch to the dest.
284 BranchInst *PredBr = dyn_cast<BranchInst>(Pred->getTerminator());
285 if (!PredBr || !PredBr->isUnconditional() ||
286 // Must be empty other than the branch.
287 &Pred->front() != PredBr ||
288 // Cannot be the entry block; its label does not get emitted.
289 Pred == &(Dest->getParent()->getEntryBlock()))
292 // Finally, since we know that Dest has phi nodes in it, we have to make
293 // sure that jumping to Pred will have the same affect as going to Dest in
294 // terms of PHI values.
297 bool FoundMatch = true;
298 for (BasicBlock::iterator I = Dest->begin();
299 (PN = dyn_cast<PHINode>(I)); ++I, ++PHINo) {
300 if (PHINo == TIPHIValues.size())
301 TIPHIValues.push_back(PN->getIncomingValueForBlock(TIBB));
303 // If the PHI entry doesn't work, we can't use this pred.
304 if (TIPHIValues[PHINo] != PN->getIncomingValueForBlock(Pred)) {
310 // If we found a workable predecessor, change TI to branch to Succ.
312 Dest->removePredecessor(TIBB);
313 TI->setSuccessor(SuccNum, Pred);
318 SplitCriticalEdge(TI, SuccNum, P, true);
321 /// OptimizeNoopCopyExpression - If the specified cast instruction is a noop
322 /// copy (e.g. it's casting from one pointer type to another, int->uint, or
323 /// int->sbyte on PPC), sink it into user blocks to reduce the number of virtual
324 /// registers that must be created and coalesced.
326 /// Return true if any changes are made.
328 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI){
329 // If this is a noop copy,
330 MVT SrcVT = TLI.getValueType(CI->getOperand(0)->getType());
331 MVT DstVT = TLI.getValueType(CI->getType());
333 // This is an fp<->int conversion?
334 if (SrcVT.isInteger() != DstVT.isInteger())
337 // If this is an extension, it will be a zero or sign extension, which
339 if (SrcVT.bitsLT(DstVT)) return false;
341 // If these values will be promoted, find out what they will be promoted
342 // to. This helps us consider truncates on PPC as noop copies when they
344 if (TLI.getTypeAction(SrcVT) == TargetLowering::Promote)
345 SrcVT = TLI.getTypeToTransformTo(SrcVT);
346 if (TLI.getTypeAction(DstVT) == TargetLowering::Promote)
347 DstVT = TLI.getTypeToTransformTo(DstVT);
349 // If, after promotion, these are the same types, this is a noop copy.
353 BasicBlock *DefBB = CI->getParent();
355 /// InsertedCasts - Only insert a cast in each block once.
356 DenseMap<BasicBlock*, CastInst*> InsertedCasts;
358 bool MadeChange = false;
359 for (Value::use_iterator UI = CI->use_begin(), E = CI->use_end();
361 Use &TheUse = UI.getUse();
362 Instruction *User = cast<Instruction>(*UI);
364 // Figure out which BB this cast is used in. For PHI's this is the
365 // appropriate predecessor block.
366 BasicBlock *UserBB = User->getParent();
367 if (PHINode *PN = dyn_cast<PHINode>(User)) {
368 unsigned OpVal = UI.getOperandNo()/2;
369 UserBB = PN->getIncomingBlock(OpVal);
372 // Preincrement use iterator so we don't invalidate it.
375 // If this user is in the same block as the cast, don't change the cast.
376 if (UserBB == DefBB) continue;
378 // If we have already inserted a cast into this block, use it.
379 CastInst *&InsertedCast = InsertedCasts[UserBB];
382 BasicBlock::iterator InsertPt = UserBB->getFirstNonPHI();
385 CastInst::Create(CI->getOpcode(), CI->getOperand(0), CI->getType(), "",
390 // Replace a use of the cast with a use of the new cast.
391 TheUse = InsertedCast;
394 // If we removed all uses, nuke the cast.
395 if (CI->use_empty()) {
396 CI->eraseFromParent();
403 /// OptimizeCmpExpression - sink the given CmpInst into user blocks to reduce
404 /// the number of virtual registers that must be created and coalesced. This is
405 /// a clear win except on targets with multiple condition code registers
406 /// (PowerPC), where it might lose; some adjustment may be wanted there.
408 /// Return true if any changes are made.
409 static bool OptimizeCmpExpression(CmpInst *CI) {
410 BasicBlock *DefBB = CI->getParent();
412 /// InsertedCmp - Only insert a cmp in each block once.
413 DenseMap<BasicBlock*, CmpInst*> InsertedCmps;
415 bool MadeChange = false;
416 for (Value::use_iterator UI = CI->use_begin(), E = CI->use_end();
418 Use &TheUse = UI.getUse();
419 Instruction *User = cast<Instruction>(*UI);
421 // Preincrement use iterator so we don't invalidate it.
424 // Don't bother for PHI nodes.
425 if (isa<PHINode>(User))
428 // Figure out which BB this cmp is used in.
429 BasicBlock *UserBB = User->getParent();
431 // If this user is in the same block as the cmp, don't change the cmp.
432 if (UserBB == DefBB) continue;
434 // If we have already inserted a cmp into this block, use it.
435 CmpInst *&InsertedCmp = InsertedCmps[UserBB];
438 BasicBlock::iterator InsertPt = UserBB->getFirstNonPHI();
441 CmpInst::Create(CI->getOpcode(), CI->getPredicate(), CI->getOperand(0),
442 CI->getOperand(1), "", InsertPt);
446 // Replace a use of the cmp with a use of the new cmp.
447 TheUse = InsertedCmp;
450 // If we removed all uses, nuke the cmp.
452 CI->eraseFromParent();
457 //===----------------------------------------------------------------------===//
458 // Addressing Mode Analysis and Optimization
459 //===----------------------------------------------------------------------===//
462 /// ExtAddrMode - This is an extended version of TargetLowering::AddrMode
463 /// which holds actual Value*'s for register values.
464 struct ExtAddrMode : public TargetLowering::AddrMode {
467 ExtAddrMode() : BaseReg(0), ScaledReg(0) {}
468 void print(OStream &OS) const;
474 } // end anonymous namespace
476 static inline OStream &operator<<(OStream &OS, const ExtAddrMode &AM) {
481 void ExtAddrMode::print(OStream &OS) const {
482 bool NeedPlus = false;
485 OS << (NeedPlus ? " + " : "")
486 << "GV:%" << BaseGV->getName(), NeedPlus = true;
489 OS << (NeedPlus ? " + " : "") << BaseOffs, NeedPlus = true;
492 OS << (NeedPlus ? " + " : "")
493 << "Base:%" << BaseReg->getName(), NeedPlus = true;
495 OS << (NeedPlus ? " + " : "")
496 << Scale << "*%" << ScaledReg->getName(), NeedPlus = true;
502 /// AddressingModeMatcher - This class exposes a single public method, which is
503 /// used to construct a "maximal munch" of the addressing mode for the target
504 /// specified by TLI for an access to "V" with an access type of AccessTy. This
505 /// returns the addressing mode that is actually matched by value, but also
506 /// returns the list of instructions involved in that addressing computation in
508 class AddressingModeMatcher {
509 SmallVectorImpl<Instruction*> &AddrModeInsts;
510 const TargetLowering &TLI;
512 /// AccessTy/MemoryInst - This is the type for the access (e.g. double) and
513 /// the memory instruction that we're computing this address for.
514 const Type *AccessTy;
515 Instruction *MemoryInst;
517 /// AddrMode - This is the addressing mode that we're building up. This is
518 /// part of the return value of this addressing mode matching stuff.
519 ExtAddrMode &AddrMode;
521 /// IgnoreProfitability - This is set to true when we should not do
522 /// profitability checks. When true, IsProfitableToFoldIntoAddressingMode
523 /// always returns true.
524 bool IgnoreProfitability;
526 AddressingModeMatcher(SmallVectorImpl<Instruction*> &AMI,
527 const TargetLowering &T, const Type *AT,
528 Instruction *MI, ExtAddrMode &AM)
529 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) {
530 IgnoreProfitability = false;
534 /// Match - Find the maximal addressing mode that a load/store of V can fold,
535 /// give an access type of AccessTy. This returns a list of involved
536 /// instructions in AddrModeInsts.
537 static ExtAddrMode Match(Value *V, const Type *AccessTy,
538 Instruction *MemoryInst,
539 SmallVectorImpl<Instruction*> &AddrModeInsts,
540 const TargetLowering &TLI) {
544 AddressingModeMatcher(AddrModeInsts, TLI, AccessTy,
545 MemoryInst, Result).MatchAddr(V, 0);
546 Success = Success; assert(Success && "Couldn't select *anything*?");
550 bool MatchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
551 bool MatchAddr(Value *V, unsigned Depth);
552 bool MatchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth);
553 bool IsProfitableToFoldIntoAddressingMode(Instruction *I,
554 ExtAddrMode &AMBefore,
555 ExtAddrMode &AMAfter);
556 bool ValueAlreadyLiveAtInst(Value *Val, Value *KnownLive1, Value *KnownLive2);
558 } // end anonymous namespace
560 /// MatchScaledValue - Try adding ScaleReg*Scale to the current addressing mode.
561 /// Return true and update AddrMode if this addr mode is legal for the target,
563 bool AddressingModeMatcher::MatchScaledValue(Value *ScaleReg, int64_t Scale,
565 // If Scale is 1, then this is the same as adding ScaleReg to the addressing
566 // mode. Just process that directly.
568 return MatchAddr(ScaleReg, Depth);
570 // If the scale is 0, it takes nothing to add this.
574 // If we already have a scale of this value, we can add to it, otherwise, we
575 // need an available scale field.
576 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
579 ExtAddrMode TestAddrMode = AddrMode;
581 // Add scale to turn X*4+X*3 -> X*7. This could also do things like
582 // [A+B + A*7] -> [B+A*8].
583 TestAddrMode.Scale += Scale;
584 TestAddrMode.ScaledReg = ScaleReg;
586 // If the new address isn't legal, bail out.
587 if (!TLI.isLegalAddressingMode(TestAddrMode, AccessTy))
590 // It was legal, so commit it.
591 AddrMode = TestAddrMode;
593 // Okay, we decided that we can add ScaleReg+Scale to AddrMode. Check now
594 // to see if ScaleReg is actually X+C. If so, we can turn this into adding
595 // X*Scale + C*Scale to addr mode.
596 ConstantInt *CI; Value *AddLHS;
597 if (match(ScaleReg, m_Add(m_Value(AddLHS), m_ConstantInt(CI)))) {
598 TestAddrMode.ScaledReg = AddLHS;
599 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
601 // If this addressing mode is legal, commit it and remember that we folded
603 if (TLI.isLegalAddressingMode(TestAddrMode, AccessTy)) {
604 AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
605 AddrMode = TestAddrMode;
610 // Otherwise, not (x+c)*scale, just return what we have.
614 /// MightBeFoldableInst - This is a little filter, which returns true if an
615 /// addressing computation involving I might be folded into a load/store
616 /// accessing it. This doesn't need to be perfect, but needs to accept at least
617 /// the set of instructions that MatchOperationAddr can.
618 static bool MightBeFoldableInst(Instruction *I) {
619 switch (I->getOpcode()) {
620 case Instruction::BitCast:
621 // Don't touch identity bitcasts.
622 if (I->getType() == I->getOperand(0)->getType())
624 return isa<PointerType>(I->getType()) || isa<IntegerType>(I->getType());
625 case Instruction::PtrToInt:
626 // PtrToInt is always a noop, as we know that the int type is pointer sized.
628 case Instruction::IntToPtr:
629 // We know the input is intptr_t, so this is foldable.
631 case Instruction::Add:
633 case Instruction::Mul:
634 case Instruction::Shl:
635 // Can only handle X*C and X << C.
636 return isa<ConstantInt>(I->getOperand(1));
637 case Instruction::GetElementPtr:
645 /// MatchOperationAddr - Given an instruction or constant expr, see if we can
646 /// fold the operation into the addressing mode. If so, update the addressing
647 /// mode and return true, otherwise return false without modifying AddrMode.
648 bool AddressingModeMatcher::MatchOperationAddr(User *AddrInst, unsigned Opcode,
650 // Avoid exponential behavior on extremely deep expression trees.
651 if (Depth >= 5) return false;
654 case Instruction::PtrToInt:
655 // PtrToInt is always a noop, as we know that the int type is pointer sized.
656 return MatchAddr(AddrInst->getOperand(0), Depth);
657 case Instruction::IntToPtr:
658 // This inttoptr is a no-op if the integer type is pointer sized.
659 if (TLI.getValueType(AddrInst->getOperand(0)->getType()) ==
661 return MatchAddr(AddrInst->getOperand(0), Depth);
663 case Instruction::BitCast:
664 // BitCast is always a noop, and we can handle it as long as it is
665 // int->int or pointer->pointer (we don't want int<->fp or something).
666 if ((isa<PointerType>(AddrInst->getOperand(0)->getType()) ||
667 isa<IntegerType>(AddrInst->getOperand(0)->getType())) &&
668 // Don't touch identity bitcasts. These were probably put here by LSR,
669 // and we don't want to mess around with them. Assume it knows what it
671 AddrInst->getOperand(0)->getType() != AddrInst->getType())
672 return MatchAddr(AddrInst->getOperand(0), Depth);
674 case Instruction::Add: {
675 // Check to see if we can merge in the RHS then the LHS. If so, we win.
676 ExtAddrMode BackupAddrMode = AddrMode;
677 unsigned OldSize = AddrModeInsts.size();
678 if (MatchAddr(AddrInst->getOperand(1), Depth+1) &&
679 MatchAddr(AddrInst->getOperand(0), Depth+1))
682 // Restore the old addr mode info.
683 AddrMode = BackupAddrMode;
684 AddrModeInsts.resize(OldSize);
686 // Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
687 if (MatchAddr(AddrInst->getOperand(0), Depth+1) &&
688 MatchAddr(AddrInst->getOperand(1), Depth+1))
691 // Otherwise we definitely can't merge the ADD in.
692 AddrMode = BackupAddrMode;
693 AddrModeInsts.resize(OldSize);
696 //case Instruction::Or:
697 // TODO: We can handle "Or Val, Imm" iff this OR is equivalent to an ADD.
699 case Instruction::Mul:
700 case Instruction::Shl: {
701 // Can only handle X*C and X << C.
702 ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
703 if (!RHS) return false;
704 int64_t Scale = RHS->getSExtValue();
705 if (Opcode == Instruction::Shl)
708 return MatchScaledValue(AddrInst->getOperand(0), Scale, Depth);
710 case Instruction::GetElementPtr: {
711 // Scan the GEP. We check it if it contains constant offsets and at most
712 // one variable offset.
713 int VariableOperand = -1;
714 unsigned VariableScale = 0;
716 int64_t ConstantOffset = 0;
717 const TargetData *TD = TLI.getTargetData();
718 gep_type_iterator GTI = gep_type_begin(AddrInst);
719 for (unsigned i = 1, e = AddrInst->getNumOperands(); i != e; ++i, ++GTI) {
720 if (const StructType *STy = dyn_cast<StructType>(*GTI)) {
721 const StructLayout *SL = TD->getStructLayout(STy);
723 cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
724 ConstantOffset += SL->getElementOffset(Idx);
726 uint64_t TypeSize = TD->getABITypeSize(GTI.getIndexedType());
727 if (ConstantInt *CI = dyn_cast<ConstantInt>(AddrInst->getOperand(i))) {
728 ConstantOffset += CI->getSExtValue()*TypeSize;
729 } else if (TypeSize) { // Scales of zero don't do anything.
730 // We only allow one variable index at the moment.
731 if (VariableOperand != -1)
734 // Remember the variable index.
736 VariableScale = TypeSize;
741 // A common case is for the GEP to only do a constant offset. In this case,
742 // just add it to the disp field and check validity.
743 if (VariableOperand == -1) {
744 AddrMode.BaseOffs += ConstantOffset;
745 if (ConstantOffset == 0 || TLI.isLegalAddressingMode(AddrMode, AccessTy)){
746 // Check to see if we can fold the base pointer in too.
747 if (MatchAddr(AddrInst->getOperand(0), Depth+1))
750 AddrMode.BaseOffs -= ConstantOffset;
754 // Save the valid addressing mode in case we can't match.
755 ExtAddrMode BackupAddrMode = AddrMode;
757 // Check that this has no base reg yet. If so, we won't have a place to
758 // put the base of the GEP (assuming it is not a null ptr).
759 bool SetBaseReg = true;
760 if (isa<ConstantPointerNull>(AddrInst->getOperand(0)))
761 SetBaseReg = false; // null pointer base doesn't need representation.
762 else if (AddrMode.HasBaseReg)
763 return false; // Base register already specified, can't match GEP.
765 // Otherwise, we'll use the GEP base as the BaseReg.
766 AddrMode.HasBaseReg = true;
767 AddrMode.BaseReg = AddrInst->getOperand(0);
770 // See if the scale and offset amount is valid for this target.
771 AddrMode.BaseOffs += ConstantOffset;
773 if (!MatchScaledValue(AddrInst->getOperand(VariableOperand), VariableScale,
775 AddrMode = BackupAddrMode;
779 // If we have a null as the base of the GEP, folding in the constant offset
780 // plus variable scale is all we can do.
781 if (!SetBaseReg) return true;
783 // If this match succeeded, we know that we can form an address with the
784 // GepBase as the basereg. Match the base pointer of the GEP more
785 // aggressively by zeroing out BaseReg and rematching. If the base is
786 // (for example) another GEP, this allows merging in that other GEP into
787 // the addressing mode we're forming.
788 AddrMode.HasBaseReg = false;
789 AddrMode.BaseReg = 0;
790 bool Success = MatchAddr(AddrInst->getOperand(0), Depth+1);
791 assert(Success && "MatchAddr should be able to fill in BaseReg!");
799 /// MatchAddr - If we can, try to add the value of 'Addr' into the current
800 /// addressing mode. If Addr can't be added to AddrMode this returns false and
801 /// leaves AddrMode unmodified. This assumes that Addr is either a pointer type
802 /// or intptr_t for the target.
804 bool AddressingModeMatcher::MatchAddr(Value *Addr, unsigned Depth) {
805 if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
806 // Fold in immediates if legal for the target.
807 AddrMode.BaseOffs += CI->getSExtValue();
808 if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
810 AddrMode.BaseOffs -= CI->getSExtValue();
811 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
812 // If this is a global variable, try to fold it into the addressing mode.
813 if (AddrMode.BaseGV == 0) {
814 AddrMode.BaseGV = GV;
815 if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
819 } else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
820 ExtAddrMode BackupAddrMode = AddrMode;
821 unsigned OldSize = AddrModeInsts.size();
823 // Check to see if it is possible to fold this operation.
824 if (MatchOperationAddr(I, I->getOpcode(), Depth)) {
825 // Okay, it's possible to fold this. Check to see if it is actually
826 // *profitable* to do so. We use a simple cost model to avoid increasing
827 // register pressure too much.
828 if (I->hasOneUse() ||
829 IsProfitableToFoldIntoAddressingMode(I, BackupAddrMode, AddrMode)) {
830 AddrModeInsts.push_back(I);
834 // It isn't profitable to do this, roll back.
835 //cerr << "NOT FOLDING: " << *I;
836 AddrMode = BackupAddrMode;
837 AddrModeInsts.resize(OldSize);
839 } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
840 if (MatchOperationAddr(CE, CE->getOpcode(), Depth))
842 } else if (isa<ConstantPointerNull>(Addr)) {
843 // Null pointer gets folded without affecting the addressing mode.
847 // Worse case, the target should support [reg] addressing modes. :)
848 if (!AddrMode.HasBaseReg) {
849 AddrMode.HasBaseReg = true;
850 AddrMode.BaseReg = Addr;
851 // Still check for legality in case the target supports [imm] but not [i+r].
852 if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
854 AddrMode.HasBaseReg = false;
855 AddrMode.BaseReg = 0;
858 // If the base register is already taken, see if we can do [r+r].
859 if (AddrMode.Scale == 0) {
861 AddrMode.ScaledReg = Addr;
862 if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
865 AddrMode.ScaledReg = 0;
872 /// IsOperandAMemoryOperand - Check to see if all uses of OpVal by the specified
873 /// inline asm call are due to memory operands. If so, return true, otherwise
875 static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
876 const TargetLowering &TLI) {
877 std::vector<InlineAsm::ConstraintInfo>
878 Constraints = IA->ParseConstraints();
880 unsigned ArgNo = 1; // ArgNo - The operand of the CallInst.
881 for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
882 TargetLowering::AsmOperandInfo OpInfo(Constraints[i]);
884 // Compute the value type for each operand.
885 switch (OpInfo.Type) {
886 case InlineAsm::isOutput:
887 if (OpInfo.isIndirect)
888 OpInfo.CallOperandVal = CI->getOperand(ArgNo++);
890 case InlineAsm::isInput:
891 OpInfo.CallOperandVal = CI->getOperand(ArgNo++);
893 case InlineAsm::isClobber:
898 // Compute the constraint code and ConstraintType to use.
899 TLI.ComputeConstraintToUse(OpInfo, SDValue(),
900 OpInfo.ConstraintType == TargetLowering::C_Memory);
902 // If this asm operand is our Value*, and if it isn't an indirect memory
903 // operand, we can't fold it!
904 if (OpInfo.CallOperandVal == OpVal &&
905 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
914 /// FindAllMemoryUses - Recursively walk all the uses of I until we find a
915 /// memory use. If we find an obviously non-foldable instruction, return true.
916 /// Add the ultimately found memory instructions to MemoryUses.
917 static bool FindAllMemoryUses(Instruction *I,
918 SmallVectorImpl<std::pair<Instruction*,unsigned> > &MemoryUses,
919 SmallPtrSet<Instruction*, 16> &ConsideredInsts,
920 const TargetLowering &TLI) {
921 // If we already considered this instruction, we're done.
922 if (!ConsideredInsts.insert(I))
925 // If this is an obviously unfoldable instruction, bail out.
926 if (!MightBeFoldableInst(I))
929 // Loop over all the uses, recursively processing them.
930 for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
932 if (LoadInst *LI = dyn_cast<LoadInst>(*UI)) {
933 MemoryUses.push_back(std::make_pair(LI, UI.getOperandNo()));
937 if (StoreInst *SI = dyn_cast<StoreInst>(*UI)) {
938 if (UI.getOperandNo() == 0) return true; // Storing addr, not into addr.
939 MemoryUses.push_back(std::make_pair(SI, UI.getOperandNo()));
943 if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
944 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
945 if (IA == 0) return true;
947 // If this is a memory operand, we're cool, otherwise bail out.
948 if (!IsOperandAMemoryOperand(CI, IA, I, TLI))
953 if (FindAllMemoryUses(cast<Instruction>(*UI), MemoryUses, ConsideredInsts,
962 /// ValueAlreadyLiveAtInst - Retrn true if Val is already known to be live at
963 /// the use site that we're folding it into. If so, there is no cost to
964 /// include it in the addressing mode. KnownLive1 and KnownLive2 are two values
965 /// that we know are live at the instruction already.
966 bool AddressingModeMatcher::ValueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
968 // If Val is either of the known-live values, we know it is live!
969 if (Val == 0 || Val == KnownLive1 || Val == KnownLive2)
972 // All values other than instructions and arguments (e.g. constants) are live.
973 if (!isa<Instruction>(Val) && !isa<Argument>(Val)) return true;
975 // If Val is a constant sized alloca in the entry block, it is live, this is
976 // true because it is just a reference to the stack/frame pointer, which is
977 // live for the whole function.
978 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val))
979 if (AI->isStaticAlloca())
982 // Check to see if this value is already used in the memory instruction's
983 // block. If so, it's already live into the block at the very least, so we
984 // can reasonably fold it.
985 BasicBlock *MemBB = MemoryInst->getParent();
986 for (Value::use_iterator UI = Val->use_begin(), E = Val->use_end();
988 // We know that uses of arguments and instructions have to be instructions.
989 if (cast<Instruction>(*UI)->getParent() == MemBB)
997 /// IsProfitableToFoldIntoAddressingMode - It is possible for the addressing
998 /// mode of the machine to fold the specified instruction into a load or store
999 /// that ultimately uses it. However, the specified instruction has multiple
1000 /// uses. Given this, it may actually increase register pressure to fold it
1001 /// into the load. For example, consider this code:
1005 /// use(Y) -> nonload/store
1009 /// In this case, Y has multiple uses, and can be folded into the load of Z
1010 /// (yielding load [X+2]). However, doing this will cause both "X" and "X+1" to
1011 /// be live at the use(Y) line. If we don't fold Y into load Z, we use one
1012 /// fewer register. Since Y can't be folded into "use(Y)" we don't increase the
1013 /// number of computations either.
1015 /// Note that this (like most of CodeGenPrepare) is just a rough heuristic. If
1016 /// X was live across 'load Z' for other reasons, we actually *would* want to
1017 /// fold the addressing mode in the Z case. This would make Y die earlier.
1018 bool AddressingModeMatcher::
1019 IsProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
1020 ExtAddrMode &AMAfter) {
1021 if (IgnoreProfitability) return true;
1023 // AMBefore is the addressing mode before this instruction was folded into it,
1024 // and AMAfter is the addressing mode after the instruction was folded. Get
1025 // the set of registers referenced by AMAfter and subtract out those
1026 // referenced by AMBefore: this is the set of values which folding in this
1027 // address extends the lifetime of.
1029 // Note that there are only two potential values being referenced here,
1030 // BaseReg and ScaleReg (global addresses are always available, as are any
1031 // folded immediates).
1032 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg;
1034 // If the BaseReg or ScaledReg was referenced by the previous addrmode, their
1035 // lifetime wasn't extended by adding this instruction.
1036 if (ValueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg))
1038 if (ValueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg))
1041 // If folding this instruction (and it's subexprs) didn't extend any live
1042 // ranges, we're ok with it.
1043 if (BaseReg == 0 && ScaledReg == 0)
1046 // If all uses of this instruction are ultimately load/store/inlineasm's,
1047 // check to see if their addressing modes will include this instruction. If
1048 // so, we can fold it into all uses, so it doesn't matter if it has multiple
1050 SmallVector<std::pair<Instruction*,unsigned>, 16> MemoryUses;
1051 SmallPtrSet<Instruction*, 16> ConsideredInsts;
1052 if (FindAllMemoryUses(I, MemoryUses, ConsideredInsts, TLI))
1053 return false; // Has a non-memory, non-foldable use!
1055 // Now that we know that all uses of this instruction are part of a chain of
1056 // computation involving only operations that could theoretically be folded
1057 // into a memory use, loop over each of these uses and see if they could
1058 // *actually* fold the instruction.
1059 SmallVector<Instruction*, 32> MatchedAddrModeInsts;
1060 for (unsigned i = 0, e = MemoryUses.size(); i != e; ++i) {
1061 Instruction *User = MemoryUses[i].first;
1062 unsigned OpNo = MemoryUses[i].second;
1064 // Get the access type of this use. If the use isn't a pointer, we don't
1065 // know what it accesses.
1066 Value *Address = User->getOperand(OpNo);
1067 if (!isa<PointerType>(Address->getType()))
1069 const Type *AddressAccessTy =
1070 cast<PointerType>(Address->getType())->getElementType();
1072 // Do a match against the root of this address, ignoring profitability. This
1073 // will tell us if the addressing mode for the memory operation will
1074 // *actually* cover the shared instruction.
1076 AddressingModeMatcher Matcher(MatchedAddrModeInsts, TLI, AddressAccessTy,
1077 MemoryInst, Result);
1078 Matcher.IgnoreProfitability = true;
1079 bool Success = Matcher.MatchAddr(Address, 0);
1080 Success = Success; assert(Success && "Couldn't select *anything*?");
1082 // If the match didn't cover I, then it won't be shared by it.
1083 if (std::find(MatchedAddrModeInsts.begin(), MatchedAddrModeInsts.end(),
1084 I) == MatchedAddrModeInsts.end())
1087 MatchedAddrModeInsts.clear();
1094 //===----------------------------------------------------------------------===//
1095 // Memory Optimization
1096 //===----------------------------------------------------------------------===//
1098 /// IsNonLocalValue - Return true if the specified values are defined in a
1099 /// different basic block than BB.
1100 static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
1101 if (Instruction *I = dyn_cast<Instruction>(V))
1102 return I->getParent() != BB;
1106 /// OptimizeMemoryInst - Load and Store Instructions have often have
1107 /// addressing modes that can do significant amounts of computation. As such,
1108 /// instruction selection will try to get the load or store to do as much
1109 /// computation as possible for the program. The problem is that isel can only
1110 /// see within a single block. As such, we sink as much legal addressing mode
1111 /// stuff into the block as possible.
1113 /// This method is used to optimize both load/store and inline asms with memory
1115 bool CodeGenPrepare::OptimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
1116 const Type *AccessTy,
1117 DenseMap<Value*,Value*> &SunkAddrs) {
1118 // Figure out what addressing mode will be built up for this operation.
1119 SmallVector<Instruction*, 16> AddrModeInsts;
1120 ExtAddrMode AddrMode = AddressingModeMatcher::Match(Addr, AccessTy,MemoryInst,
1121 AddrModeInsts, *TLI);
1123 // Check to see if any of the instructions supersumed by this addr mode are
1124 // non-local to I's BB.
1125 bool AnyNonLocal = false;
1126 for (unsigned i = 0, e = AddrModeInsts.size(); i != e; ++i) {
1127 if (IsNonLocalValue(AddrModeInsts[i], MemoryInst->getParent())) {
1133 // If all the instructions matched are already in this BB, don't do anything.
1135 DEBUG(cerr << "CGP: Found local addrmode: " << AddrMode << "\n");
1139 // Insert this computation right after this user. Since our caller is
1140 // scanning from the top of the BB to the bottom, reuse of the expr are
1141 // guaranteed to happen later.
1142 BasicBlock::iterator InsertPt = MemoryInst;
1144 // Now that we determined the addressing expression we want to use and know
1145 // that we have to sink it into this block. Check to see if we have already
1146 // done this for some other load/store instr in this block. If so, reuse the
1148 Value *&SunkAddr = SunkAddrs[Addr];
1150 DEBUG(cerr << "CGP: Reusing nonlocal addrmode: " << AddrMode << "\n");
1151 if (SunkAddr->getType() != Addr->getType())
1152 SunkAddr = new BitCastInst(SunkAddr, Addr->getType(), "tmp", InsertPt);
1154 DEBUG(cerr << "CGP: SINKING nonlocal addrmode: " << AddrMode << "\n");
1155 const Type *IntPtrTy = TLI->getTargetData()->getIntPtrType();
1158 // Start with the scale value.
1159 if (AddrMode.Scale) {
1160 Value *V = AddrMode.ScaledReg;
1161 if (V->getType() == IntPtrTy) {
1163 } else if (isa<PointerType>(V->getType())) {
1164 V = new PtrToIntInst(V, IntPtrTy, "sunkaddr", InsertPt);
1165 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
1166 cast<IntegerType>(V->getType())->getBitWidth()) {
1167 V = new TruncInst(V, IntPtrTy, "sunkaddr", InsertPt);
1169 V = new SExtInst(V, IntPtrTy, "sunkaddr", InsertPt);
1171 if (AddrMode.Scale != 1)
1172 V = BinaryOperator::CreateMul(V, ConstantInt::get(IntPtrTy,
1174 "sunkaddr", InsertPt);
1178 // Add in the base register.
1179 if (AddrMode.BaseReg) {
1180 Value *V = AddrMode.BaseReg;
1181 if (V->getType() != IntPtrTy)
1182 V = new PtrToIntInst(V, IntPtrTy, "sunkaddr", InsertPt);
1184 Result = BinaryOperator::CreateAdd(Result, V, "sunkaddr", InsertPt);
1189 // Add in the BaseGV if present.
1190 if (AddrMode.BaseGV) {
1191 Value *V = new PtrToIntInst(AddrMode.BaseGV, IntPtrTy, "sunkaddr",
1194 Result = BinaryOperator::CreateAdd(Result, V, "sunkaddr", InsertPt);
1199 // Add in the Base Offset if present.
1200 if (AddrMode.BaseOffs) {
1201 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
1203 Result = BinaryOperator::CreateAdd(Result, V, "sunkaddr", InsertPt);
1209 SunkAddr = Constant::getNullValue(Addr->getType());
1211 SunkAddr = new IntToPtrInst(Result, Addr->getType(), "sunkaddr",InsertPt);
1214 MemoryInst->replaceUsesOfWith(Addr, SunkAddr);
1216 if (Addr->use_empty())
1217 RecursivelyDeleteTriviallyDeadInstructions(Addr);
1221 /// OptimizeInlineAsmInst - If there are any memory operands, use
1222 /// OptimizeMemoryInst to sink their address computing into the block when
1223 /// possible / profitable.
1224 bool CodeGenPrepare::OptimizeInlineAsmInst(Instruction *I, CallSite CS,
1225 DenseMap<Value*,Value*> &SunkAddrs) {
1226 bool MadeChange = false;
1227 InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
1229 // Do a prepass over the constraints, canonicalizing them, and building up the
1230 // ConstraintOperands list.
1231 std::vector<InlineAsm::ConstraintInfo>
1232 ConstraintInfos = IA->ParseConstraints();
1234 /// ConstraintOperands - Information about all of the constraints.
1235 std::vector<TargetLowering::AsmOperandInfo> ConstraintOperands;
1236 unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
1237 for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
1239 push_back(TargetLowering::AsmOperandInfo(ConstraintInfos[i]));
1240 TargetLowering::AsmOperandInfo &OpInfo = ConstraintOperands.back();
1242 // Compute the value type for each operand.
1243 switch (OpInfo.Type) {
1244 case InlineAsm::isOutput:
1245 if (OpInfo.isIndirect)
1246 OpInfo.CallOperandVal = CS.getArgument(ArgNo++);
1248 case InlineAsm::isInput:
1249 OpInfo.CallOperandVal = CS.getArgument(ArgNo++);
1251 case InlineAsm::isClobber:
1256 // Compute the constraint code and ConstraintType to use.
1257 TLI->ComputeConstraintToUse(OpInfo, SDValue(),
1258 OpInfo.ConstraintType == TargetLowering::C_Memory);
1260 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
1261 OpInfo.isIndirect) {
1262 Value *OpVal = OpInfo.CallOperandVal;
1263 MadeChange |= OptimizeMemoryInst(I, OpVal, OpVal->getType(), SunkAddrs);
1270 bool CodeGenPrepare::OptimizeExtUses(Instruction *I) {
1271 BasicBlock *DefBB = I->getParent();
1273 // If both result of the {s|z}xt and its source are live out, rewrite all
1274 // other uses of the source with result of extension.
1275 Value *Src = I->getOperand(0);
1276 if (Src->hasOneUse())
1279 // Only do this xform if truncating is free.
1280 if (TLI && !TLI->isTruncateFree(I->getType(), Src->getType()))
1283 // Only safe to perform the optimization if the source is also defined in
1285 if (!isa<Instruction>(Src) || DefBB != cast<Instruction>(Src)->getParent())
1288 bool DefIsLiveOut = false;
1289 for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
1291 Instruction *User = cast<Instruction>(*UI);
1293 // Figure out which BB this ext is used in.
1294 BasicBlock *UserBB = User->getParent();
1295 if (UserBB == DefBB) continue;
1296 DefIsLiveOut = true;
1302 // Make sure non of the uses are PHI nodes.
1303 for (Value::use_iterator UI = Src->use_begin(), E = Src->use_end();
1305 Instruction *User = cast<Instruction>(*UI);
1306 BasicBlock *UserBB = User->getParent();
1307 if (UserBB == DefBB) continue;
1308 // Be conservative. We don't want this xform to end up introducing
1309 // reloads just before load / store instructions.
1310 if (isa<PHINode>(User) || isa<LoadInst>(User) || isa<StoreInst>(User))
1314 // InsertedTruncs - Only insert one trunc in each block once.
1315 DenseMap<BasicBlock*, Instruction*> InsertedTruncs;
1317 bool MadeChange = false;
1318 for (Value::use_iterator UI = Src->use_begin(), E = Src->use_end();
1320 Use &TheUse = UI.getUse();
1321 Instruction *User = cast<Instruction>(*UI);
1323 // Figure out which BB this ext is used in.
1324 BasicBlock *UserBB = User->getParent();
1325 if (UserBB == DefBB) continue;
1327 // Both src and def are live in this block. Rewrite the use.
1328 Instruction *&InsertedTrunc = InsertedTruncs[UserBB];
1330 if (!InsertedTrunc) {
1331 BasicBlock::iterator InsertPt = UserBB->getFirstNonPHI();
1333 InsertedTrunc = new TruncInst(I, Src->getType(), "", InsertPt);
1336 // Replace a use of the {s|z}ext source with a use of the result.
1337 TheUse = InsertedTrunc;
1345 // In this pass we look for GEP and cast instructions that are used
1346 // across basic blocks and rewrite them to improve basic-block-at-a-time
1348 bool CodeGenPrepare::OptimizeBlock(BasicBlock &BB) {
1349 bool MadeChange = false;
1351 // Split all critical edges where the dest block has a PHI and where the phi
1352 // has shared immediate operands.
1353 TerminatorInst *BBTI = BB.getTerminator();
1354 if (BBTI->getNumSuccessors() > 1) {
1355 for (unsigned i = 0, e = BBTI->getNumSuccessors(); i != e; ++i)
1356 if (isa<PHINode>(BBTI->getSuccessor(i)->begin()) &&
1357 isCriticalEdge(BBTI, i, true))
1358 SplitEdgeNicely(BBTI, i, this);
1362 // Keep track of non-local addresses that have been sunk into this block.
1363 // This allows us to avoid inserting duplicate code for blocks with multiple
1364 // load/stores of the same address.
1365 DenseMap<Value*, Value*> SunkAddrs;
1367 for (BasicBlock::iterator BBI = BB.begin(), E = BB.end(); BBI != E; ) {
1368 Instruction *I = BBI++;
1370 if (CastInst *CI = dyn_cast<CastInst>(I)) {
1371 // If the source of the cast is a constant, then this should have
1372 // already been constant folded. The only reason NOT to constant fold
1373 // it is if something (e.g. LSR) was careful to place the constant
1374 // evaluation in a block other than then one that uses it (e.g. to hoist
1375 // the address of globals out of a loop). If this is the case, we don't
1376 // want to forward-subst the cast.
1377 if (isa<Constant>(CI->getOperand(0)))
1380 bool Change = false;
1382 Change = OptimizeNoopCopyExpression(CI, *TLI);
1383 MadeChange |= Change;
1386 if (!Change && (isa<ZExtInst>(I) || isa<SExtInst>(I)))
1387 MadeChange |= OptimizeExtUses(I);
1388 } else if (CmpInst *CI = dyn_cast<CmpInst>(I)) {
1389 MadeChange |= OptimizeCmpExpression(CI);
1390 } else if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
1392 MadeChange |= OptimizeMemoryInst(I, I->getOperand(0), LI->getType(),
1394 } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
1396 MadeChange |= OptimizeMemoryInst(I, SI->getOperand(1),
1397 SI->getOperand(0)->getType(),
1399 } else if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I)) {
1400 if (GEPI->hasAllZeroIndices()) {
1401 /// The GEP operand must be a pointer, so must its result -> BitCast
1402 Instruction *NC = new BitCastInst(GEPI->getOperand(0), GEPI->getType(),
1403 GEPI->getName(), GEPI);
1404 GEPI->replaceAllUsesWith(NC);
1405 GEPI->eraseFromParent();
1409 } else if (CallInst *CI = dyn_cast<CallInst>(I)) {
1410 // If we found an inline asm expession, and if the target knows how to
1411 // lower it to normal LLVM code, do so now.
1412 if (TLI && isa<InlineAsm>(CI->getCalledValue()))
1413 if (const TargetAsmInfo *TAI =
1414 TLI->getTargetMachine().getTargetAsmInfo()) {
1415 if (TAI->ExpandInlineAsm(CI))
1418 // Sink address computing for memory operands into the block.
1419 MadeChange |= OptimizeInlineAsmInst(I, &(*CI), SunkAddrs);