lib/Target/X86/X86TargetMachine.cpp

   1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the X86 specific subclass of TargetMachine.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "X86MCAsmInfo.h"
  15 #include "X86TargetMachine.h"
  16 #include "X86.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/MachineFunction.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/MC/MCCodeEmitter.h"
  21 #include "llvm/MC/MCStreamer.h"
  22 #include "llvm/Support/FormattedStream.h"
  23 #include "llvm/Target/TargetOptions.h"
  24 #include "llvm/Target/TargetRegistry.h"
  25 using namespace llvm;
  26
  27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
  28   Triple TheTriple(TT);
  29   switch (TheTriple.getOS()) {
  30   case Triple::Darwin:
  31     return new X86MCAsmInfoDarwin(TheTriple);
  32   case Triple::MinGW32:
  33   case Triple::MinGW64:
  34   case Triple::Cygwin:
  35   case Triple::Win32:
  36     return new X86MCAsmInfoCOFF(TheTriple);
  37   default:
  38     return new X86ELFMCAsmInfo(TheTriple);
  39   }
  40 }
  41
  42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
  43                                     MCContext &Ctx, TargetAsmBackend &TAB,
  44                                     raw_ostream &_OS,
  45                                     MCCodeEmitter *_Emitter,
  46                                     bool RelaxAll) {
  47   Triple TheTriple(TT);
  48   switch (TheTriple.getOS()) {
  49   default:
  50     return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
  51   }
  52 }
  53
  54 extern "C" void LLVMInitializeX86Target() {
  55   // Register the target.
  56   RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
  57   RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
  58
  59   // Register the target asm info.
  60   RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
  61   RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
  62
  63   // Register the code emitter.
  64   TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
  65                                       createX86_32MCCodeEmitter);
  66   TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
  67                                       createX86_64MCCodeEmitter);
  68
  69   // Register the asm backend.
  70   TargetRegistry::RegisterAsmBackend(TheX86_32Target,
  71                                      createX86_32AsmBackend);
  72   TargetRegistry::RegisterAsmBackend(TheX86_64Target,
  73                                      createX86_64AsmBackend);
  74
  75   // Register the object streamer.
  76   TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
  77                                          createMCStreamer);
  78   TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
  79                                          createMCStreamer);
  80 }
  81
  82
  83 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
  84                                          const std::string &FS)
  85   : X86TargetMachine(T, TT, FS, false) {
  86 }
  87
  88
  89 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
  90                                          const std::string &FS)
  91   : X86TargetMachine(T, TT, FS, true) {
  92 }
  93
  94 /// X86TargetMachine ctor - Create an X86 target.
  95 ///
  96 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
  97                                    const std::string &FS, bool is64Bit)
  98   : LLVMTargetMachine(T, TT),
  99     Subtarget(TT, FS, is64Bit),
 100     DataLayout(Subtarget.getDataLayout()),
 101     FrameInfo(TargetFrameInfo::StackGrowsDown,
 102               Subtarget.getStackAlignment(),
 103               (Subtarget.isTargetWin64() ? -40 :
 104                (Subtarget.is64Bit() ? -8 : -4))),
 105     InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this),
 106     ELFWriterInfo(*this) {
 107   DefRelocModel = getRelocationModel();
 108
 109   // If no relocation model was picked, default as appropriate for the target.
 110   if (getRelocationModel() == Reloc::Default) {
 111     if (!Subtarget.isTargetDarwin())
 112       setRelocationModel(Reloc::Static);
 113     else if (Subtarget.is64Bit())
 114       setRelocationModel(Reloc::PIC_);
 115     else
 116       setRelocationModel(Reloc::DynamicNoPIC);
 117   }
 118
 119   assert(getRelocationModel() != Reloc::Default &&
 120          "Relocation mode not picked");
 121
 122   // ELF and X86-64 don't have a distinct DynamicNoPIC model.  DynamicNoPIC
 123   // is defined as a model for code which may be used in static or dynamic
 124   // executables but not necessarily a shared library. On X86-32 we just
 125   // compile in -static mode, in x86-64 we use PIC.
 126   if (getRelocationModel() == Reloc::DynamicNoPIC) {
 127     if (is64Bit)
 128       setRelocationModel(Reloc::PIC_);
 129     else if (!Subtarget.isTargetDarwin())
 130       setRelocationModel(Reloc::Static);
 131   }
 132
 133   // If we are on Darwin, disallow static relocation model in X86-64 mode, since
 134   // the Mach-O file format doesn't support it.
 135   if (getRelocationModel() == Reloc::Static &&
 136       Subtarget.isTargetDarwin() &&
 137       is64Bit)
 138     setRelocationModel(Reloc::PIC_);
 139
 140   // Determine the PICStyle based on the target selected.
 141   if (getRelocationModel() == Reloc::Static) {
 142     // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
 143     Subtarget.setPICStyle(PICStyles::None);
 144   } else if (Subtarget.isTargetCygMing()) {
 145     Subtarget.setPICStyle(PICStyles::None);
 146   } else if (Subtarget.isTargetDarwin()) {
 147     if (Subtarget.is64Bit())
 148       Subtarget.setPICStyle(PICStyles::RIPRel);
 149     else if (getRelocationModel() == Reloc::PIC_)
 150       Subtarget.setPICStyle(PICStyles::StubPIC);
 151     else {
 152       assert(getRelocationModel() == Reloc::DynamicNoPIC);
 153       Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
 154     }
 155   } else if (Subtarget.isTargetELF()) {
 156     if (Subtarget.is64Bit())
 157       Subtarget.setPICStyle(PICStyles::RIPRel);
 158     else
 159       Subtarget.setPICStyle(PICStyles::GOT);
 160   }
 161
 162   // Finally, if we have "none" as our PIC style, force to static mode.
 163   if (Subtarget.getPICStyle() == PICStyles::None)
 164     setRelocationModel(Reloc::Static);
 165 }
 166
 167 //===----------------------------------------------------------------------===//
 168 // Pass Pipeline Configuration
 169 //===----------------------------------------------------------------------===//
 170
 171 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
 172                                        CodeGenOpt::Level OptLevel) {
 173   // Install an instruction selector.
 174   PM.add(createX86ISelDag(*this, OptLevel));
 175
 176   return false;
 177 }
 178
 179 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
 180                                       CodeGenOpt::Level OptLevel) {
 181   // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
 182   PM.add(createX87FPRegKillInserterPass());
 183
 184   PM.add(createX86MaxStackAlignmentHeuristicPass());
 185   return false;  // -print-machineinstr shouldn't print after this.
 186 }
 187
 188 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
 189                                        CodeGenOpt::Level OptLevel) {
 190   PM.add(createX86FloatingPointStackifierPass());
 191   return true;  // -print-machineinstr should print after this.
 192 }
 193
 194 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
 195                                       CodeGenOpt::Level OptLevel) {
 196   if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
 197     PM.add(createSSEDomainFixPass());
 198     return true;
 199   }
 200   return false;
 201 }
 202
 203 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
 204                                       CodeGenOpt::Level OptLevel,
 205                                       JITCodeEmitter &JCE) {
 206   // FIXME: Move this to TargetJITInfo!
 207   // On Darwin, do not override 64-bit setting made in X86TargetMachine().
 208   if (DefRelocModel == Reloc::Default &&
 209       (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
 210     setRelocationModel(Reloc::Static);
 211     Subtarget.setPICStyle(PICStyles::None);
 212   }
 213
 214
 215   PM.add(createX86JITCodeEmitterPass(*this, JCE));
 216
 217   return false;
 218 }
 219
 220 void X86TargetMachine::setCodeModelForStatic() {
 221
 222     if (getCodeModel() != CodeModel::Default) return;
 223
 224     // For static codegen, if we're not already set, use Small codegen.
 225     setCodeModel(CodeModel::Small);
 226 }
 227
 228
 229 void X86TargetMachine::setCodeModelForJIT() {
 230
 231   if (getCodeModel() != CodeModel::Default) return;
 232
 233   // 64-bit JIT places everything in the same buffer except external functions.
 234   if (Subtarget.is64Bit())
 235     setCodeModel(CodeModel::Large);
 236   else
 237     setCodeModel(CodeModel::Small);
 238 }