1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Target/TargetOptions.h"
23 #include "llvm/Target/TargetMachineRegistry.h"
26 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
27 /// in a library unless there are references into the library. In particular,
28 /// it seems that it is not possible to get things to work on Win32 without
29 /// this. Though it is unused, do not remove it.
30 extern "C" int X86TargetMachineModule;
31 int X86TargetMachineModule = 0;
33 // Register the target.
34 extern Target TheX86_32Target;
35 static RegisterTarget<X86_32TargetMachine>
36 X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above");
38 extern Target TheX86_64Target;
39 static RegisterTarget<X86_64TargetMachine>
40 Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64");
42 // Force static initialization.
43 extern "C" void LLVMInitializeX86Target() {
47 // No assembler printer by default
48 X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
50 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
51 if (Subtarget.isFlavorIntel())
52 return new X86WinTargetAsmInfo(*this);
54 switch (Subtarget.TargetType) {
55 case X86Subtarget::isDarwin:
56 return new X86DarwinTargetAsmInfo(*this);
57 case X86Subtarget::isELF:
58 return new X86ELFTargetAsmInfo(*this);
59 case X86Subtarget::isMingw:
60 case X86Subtarget::isCygwin:
61 return new X86COFFTargetAsmInfo(*this);
62 case X86Subtarget::isWindows:
63 return new X86WinTargetAsmInfo(*this);
65 return new X86GenericTargetAsmInfo(*this);
69 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const Module &M,
70 const std::string &FS)
71 : X86TargetMachine(T, M, FS, false) {
75 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const Module &M,
76 const std::string &FS)
77 : X86TargetMachine(T, M, FS, true) {
80 /// X86TargetMachine ctor - Create an X86 target.
82 X86TargetMachine::X86TargetMachine(const Target &T, const Module &M,
83 const std::string &FS, bool is64Bit)
84 : LLVMTargetMachine(T),
85 Subtarget(M, FS, is64Bit),
86 DataLayout(Subtarget.getDataLayout()),
87 FrameInfo(TargetFrameInfo::StackGrowsDown,
88 Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
89 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
90 DefRelocModel = getRelocationModel();
92 // If no relocation model was picked, default as appropriate for the target.
93 if (getRelocationModel() == Reloc::Default) {
94 if (!Subtarget.isTargetDarwin())
95 setRelocationModel(Reloc::Static);
96 else if (Subtarget.is64Bit())
97 setRelocationModel(Reloc::PIC_);
99 setRelocationModel(Reloc::DynamicNoPIC);
102 assert(getRelocationModel() != Reloc::Default &&
103 "Relocation mode not picked");
105 // If no code model is picked, default to small.
106 if (getCodeModel() == CodeModel::Default)
107 setCodeModel(CodeModel::Small);
109 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
110 // is defined as a model for code which may be used in static or dynamic
111 // executables but not necessarily a shared library. On X86-32 we just
112 // compile in -static mode, in x86-64 we use PIC.
113 if (getRelocationModel() == Reloc::DynamicNoPIC) {
115 setRelocationModel(Reloc::PIC_);
116 else if (!Subtarget.isTargetDarwin())
117 setRelocationModel(Reloc::Static);
120 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
121 // the Mach-O file format doesn't support it.
122 if (getRelocationModel() == Reloc::Static &&
123 Subtarget.isTargetDarwin() &&
125 setRelocationModel(Reloc::PIC_);
127 // Determine the PICStyle based on the target selected.
128 if (getRelocationModel() == Reloc::Static) {
129 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
130 Subtarget.setPICStyle(PICStyles::None);
131 } else if (Subtarget.isTargetCygMing()) {
132 Subtarget.setPICStyle(PICStyles::None);
133 } else if (Subtarget.isTargetDarwin()) {
134 if (Subtarget.is64Bit())
135 Subtarget.setPICStyle(PICStyles::RIPRel);
136 else if (getRelocationModel() == Reloc::PIC_)
137 Subtarget.setPICStyle(PICStyles::StubPIC);
139 assert(getRelocationModel() == Reloc::DynamicNoPIC);
140 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
142 } else if (Subtarget.isTargetELF()) {
143 if (Subtarget.is64Bit())
144 Subtarget.setPICStyle(PICStyles::RIPRel);
146 Subtarget.setPICStyle(PICStyles::GOT);
149 // Finally, if we have "none" as our PIC style, force to static mode.
150 if (Subtarget.getPICStyle() == PICStyles::None)
151 setRelocationModel(Reloc::Static);
154 //===----------------------------------------------------------------------===//
155 // Pass Pipeline Configuration
156 //===----------------------------------------------------------------------===//
158 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
159 CodeGenOpt::Level OptLevel) {
160 // Install an instruction selector.
161 PM.add(createX86ISelDag(*this, OptLevel));
163 // If we're using Fast-ISel, clean up the mess.
165 PM.add(createDeadMachineInstructionElimPass());
167 // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
168 PM.add(createX87FPRegKillInserterPass());
173 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
174 CodeGenOpt::Level OptLevel) {
175 // Calculate and set max stack object alignment early, so we can decide
176 // whether we will need stack realignment (and thus FP).
177 PM.add(createX86MaxStackAlignmentCalculatorPass());
178 return false; // -print-machineinstr shouldn't print after this.
181 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
182 CodeGenOpt::Level OptLevel) {
183 PM.add(createX86FloatingPointStackifierPass());
184 return true; // -print-machineinstr should print after this.
187 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
188 CodeGenOpt::Level OptLevel,
190 formatted_raw_ostream &Out) {
191 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
193 PM.add(AsmPrinterCtor(Out, *this, Verbose));
197 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
198 CodeGenOpt::Level OptLevel,
200 MachineCodeEmitter &MCE) {
201 // FIXME: Move this to TargetJITInfo!
202 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
203 if (DefRelocModel == Reloc::Default &&
204 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
205 setRelocationModel(Reloc::Static);
206 Subtarget.setPICStyle(PICStyles::None);
209 // 64-bit JIT places everything in the same buffer except external functions.
210 // On Darwin, use small code model but hack the call instruction for
211 // externals. Elsewhere, do not assume globals are in the lower 4G.
212 if (Subtarget.is64Bit()) {
213 if (Subtarget.isTargetDarwin())
214 setCodeModel(CodeModel::Small);
216 setCodeModel(CodeModel::Large);
219 PM.add(createX86CodeEmitterPass(*this, MCE));
221 addAssemblyEmitter(PM, OptLevel, true, ferrs());
226 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
227 CodeGenOpt::Level OptLevel,
229 JITCodeEmitter &JCE) {
230 // FIXME: Move this to TargetJITInfo!
231 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
232 if (DefRelocModel == Reloc::Default &&
233 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
234 setRelocationModel(Reloc::Static);
235 Subtarget.setPICStyle(PICStyles::None);
238 // 64-bit JIT places everything in the same buffer except external functions.
239 // On Darwin, use small code model but hack the call instruction for
240 // externals. Elsewhere, do not assume globals are in the lower 4G.
241 if (Subtarget.is64Bit()) {
242 if (Subtarget.isTargetDarwin())
243 setCodeModel(CodeModel::Small);
245 setCodeModel(CodeModel::Large);
248 PM.add(createX86JITCodeEmitterPass(*this, JCE));
250 addAssemblyEmitter(PM, OptLevel, true, ferrs());
255 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
256 CodeGenOpt::Level OptLevel,
258 ObjectCodeEmitter &OCE) {
259 PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
261 addAssemblyEmitter(PM, OptLevel, true, ferrs());
266 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
267 CodeGenOpt::Level OptLevel,
269 MachineCodeEmitter &MCE) {
270 PM.add(createX86CodeEmitterPass(*this, MCE));
272 addAssemblyEmitter(PM, OptLevel, true, ferrs());
277 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
278 CodeGenOpt::Level OptLevel,
280 JITCodeEmitter &JCE) {
281 PM.add(createX86JITCodeEmitterPass(*this, JCE));
283 addAssemblyEmitter(PM, OptLevel, true, ferrs());
288 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
289 CodeGenOpt::Level OptLevel,
291 ObjectCodeEmitter &OCE) {
292 PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
294 addAssemblyEmitter(PM, OptLevel, true, ferrs());