1 //===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to Intel format assembly language.
12 // This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86IntelAsmPrinter.h"
17 #include "X86TargetAsmInfo.h"
19 #include "llvm/Constants.h"
20 #include "llvm/Module.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/Support/Mangler.h"
23 #include "llvm/Target/TargetAsmInfo.h"
24 #include "llvm/Target/TargetOptions.h"
27 /// runOnMachineFunction - This uses the printMachineInstruction()
28 /// method to print assembly for each instruction.
30 bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
31 SetupMachineFunction(MF);
34 // Print out constants referenced by the function
35 EmitConstantPool(MF.getConstantPool());
37 // Print out labels for the function.
38 const Function* F = MF.getFunction();
39 switch (F->getLinkage()) {
40 default: assert(0 && "Unsupported linkage type!");
41 case Function::InternalLinkage:
42 SwitchToTextSection("_text", F);
45 case Function::DLLExportLinkage:
46 DLLExportedFns.insert(CurrentFnName);
48 case Function::ExternalLinkage:
49 O << "\tpublic " << CurrentFnName << "\n";
50 SwitchToTextSection("_text", F);
55 O << CurrentFnName << "\tproc near\n";
57 // Print out code for the function.
58 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
60 // Print a label for the basic block if there are any predecessors.
61 if (I->pred_begin() != I->pred_end()) {
62 printBasicBlockLabel(I, true);
65 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
67 // Print the assembly for the instruction.
69 printMachineInstruction(II);
73 O << CurrentFnName << "\tendp\n";
75 // We didn't modify anything.
79 void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
80 unsigned char value = MI->getOperand(Op).getImmedValue();
81 assert(value <= 7 && "Invalid ssecc argument!");
83 case 0: O << "eq"; break;
84 case 1: O << "lt"; break;
85 case 2: O << "le"; break;
86 case 3: O << "unord"; break;
87 case 4: O << "neq"; break;
88 case 5: O << "nlt"; break;
89 case 6: O << "nle"; break;
90 case 7: O << "ord"; break;
94 void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
95 const char *Modifier) {
96 const MRegisterInfo &RI = *TM.getRegisterInfo();
97 switch (MO.getType()) {
98 case MachineOperand::MO_Register:
99 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
100 unsigned Reg = MO.getReg();
101 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
102 MVT::ValueType VT = (strcmp(Modifier,"subreg64") == 0) ?
103 MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
104 ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
105 Reg = getX86SubSuperRegister(Reg, VT);
107 O << RI.get(Reg).Name;
109 O << "reg" << MO.getReg();
112 case MachineOperand::MO_Immediate:
113 O << MO.getImmedValue();
115 case MachineOperand::MO_MachineBasicBlock:
116 printBasicBlockLabel(MO.getMachineBasicBlock());
118 case MachineOperand::MO_ConstantPoolIndex: {
119 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
120 if (!isMemOp) O << "OFFSET ";
121 O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
122 << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
123 int Offset = MO.getOffset();
125 O << " + " << Offset;
131 case MachineOperand::MO_GlobalAddress: {
132 bool isCallOp = Modifier && !strcmp(Modifier, "call");
133 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
134 GlobalValue *GV = MO.getGlobal();
136 if (!isMemOp && !isCallOp) O << "OFFSET ";
137 if (GV->hasDLLImportLinkage()) {
138 // FIXME: This should be fixed with full support of stdcall & fastcall
142 O << Mang->getValueName(GV);
143 int Offset = MO.getOffset();
145 O << " + " << Offset;
150 case MachineOperand::MO_ExternalSymbol: {
151 bool isCallOp = Modifier && !strcmp(Modifier, "call");
152 if (!isCallOp) O << "OFFSET ";
153 O << TAI->getGlobalPrefix() << MO.getSymbolName();
157 O << "<unknown operand type>"; return;
161 void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
162 const char *Modifier) {
163 assert(isMem(MI, Op) && "Invalid memory reference!");
165 const MachineOperand &BaseReg = MI->getOperand(Op);
166 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
167 const MachineOperand &IndexReg = MI->getOperand(Op+2);
168 const MachineOperand &DispSpec = MI->getOperand(Op+3);
170 if (BaseReg.isFrameIndex()) {
171 O << "[frame slot #" << BaseReg.getFrameIndex();
172 if (DispSpec.getImmedValue())
173 O << " + " << DispSpec.getImmedValue();
179 bool NeedPlus = false;
180 if (BaseReg.getReg()) {
181 printOp(BaseReg, Modifier);
185 if (IndexReg.getReg()) {
186 if (NeedPlus) O << " + ";
188 O << ScaleVal << "*";
189 printOp(IndexReg, Modifier);
193 if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
196 printOp(DispSpec, "mem");
198 int DispVal = DispSpec.getImmedValue();
199 if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
213 void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
214 O << "\"L" << getFunctionNumber() << "$pb\"\n";
215 O << "\"L" << getFunctionNumber() << "$pb\":";
218 bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
220 const MRegisterInfo &RI = *TM.getRegisterInfo();
221 unsigned Reg = MO.getReg();
223 default: return true; // Unknown mode.
224 case 'b': // Print QImode register
225 Reg = getX86SubSuperRegister(Reg, MVT::i8);
227 case 'h': // Print QImode high register
228 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
230 case 'w': // Print HImode register
231 Reg = getX86SubSuperRegister(Reg, MVT::i16);
233 case 'k': // Print SImode register
234 Reg = getX86SubSuperRegister(Reg, MVT::i32);
238 O << '%' << RI.get(Reg).Name;
242 /// PrintAsmOperand - Print out an operand for an inline asm expression.
244 bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
246 const char *ExtraCode) {
247 // Does this asm operand have a single letter operand modifier?
248 if (ExtraCode && ExtraCode[0]) {
249 if (ExtraCode[1] != 0) return true; // Unknown modifier.
251 switch (ExtraCode[0]) {
252 default: return true; // Unknown modifier.
253 case 'b': // Print QImode register
254 case 'h': // Print QImode high register
255 case 'w': // Print HImode register
256 case 'k': // Print SImode register
257 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
261 printOperand(MI, OpNo);
265 bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
268 const char *ExtraCode) {
269 if (ExtraCode && ExtraCode[0])
270 return true; // Unknown modifier.
271 printMemReference(MI, OpNo);
275 /// printMachineInstruction -- Print out a single X86 LLVM instruction
276 /// MI in Intel syntax to the current output stream.
278 void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
281 // See if a truncate instruction can be turned into a nop.
282 switch (MI->getOpcode()) {
284 case X86::TRUNC_64to32:
285 case X86::TRUNC_64to16:
286 case X86::TRUNC_32to16:
287 case X86::TRUNC_32to8:
288 case X86::TRUNC_16to8:
289 case X86::TRUNC_32_to8:
290 case X86::TRUNC_16_to8: {
291 const MachineOperand &MO0 = MI->getOperand(0);
292 const MachineOperand &MO1 = MI->getOperand(1);
293 unsigned Reg0 = MO0.getReg();
294 unsigned Reg1 = MO1.getReg();
295 unsigned Opc = MI->getOpcode();
296 if (Opc == X86::TRUNC_64to32)
297 Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
298 else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
299 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
301 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
302 O << TAI->getCommentString() << " TRUNCATE ";
307 case X86::PsMOVZX64rr32:
308 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
312 // Call the autogenerated instruction printer routines.
313 printInstruction(MI);
316 bool X86IntelAsmPrinter::doInitialization(Module &M) {
317 X86SharedAsmPrinter::doInitialization(M);
319 Mang->markCharUnacceptable('.');
321 O << "\t.686\n\t.model flat\n\n";
323 // Emit declarations for external functions.
324 for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
326 O << "\textern " << Mang->getValueName(I) << ":near\n";
328 // Emit declarations for external globals. Note that VC++ always declares
329 // external globals to have type byte, and if that's good enough for VC++...
330 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
333 O << "\textern " << Mang->getValueName(I) << ":byte\n";
339 bool X86IntelAsmPrinter::doFinalization(Module &M) {
340 const TargetData *TD = TM.getTargetData();
342 // Print out module-level global variables here.
343 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
345 if (I->isExternal()) continue; // External global require no code
347 // Check to see if this is a special global used by LLVM, if so, emit it.
348 if (EmitSpecialLLVMGlobal(I))
351 std::string name = Mang->getValueName(I);
352 Constant *C = I->getInitializer();
353 unsigned Size = TD->getTypeSize(C->getType());
354 unsigned Align = getPreferredAlignmentLog(I);
355 bool bCustomSegment = false;
357 switch (I->getLinkage()) {
358 case GlobalValue::LinkOnceLinkage:
359 case GlobalValue::WeakLinkage:
360 SwitchToDataSection("", 0);
361 O << name << "?\tsegment common 'COMMON'\n";
362 bCustomSegment = true;
363 // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
364 // are also available.
366 case GlobalValue::AppendingLinkage:
367 SwitchToDataSection("", 0);
368 O << name << "?\tsegment public 'DATA'\n";
369 bCustomSegment = true;
370 // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
371 // are also available.
373 case GlobalValue::DLLExportLinkage:
374 DLLExportedGVs.insert(name);
376 case GlobalValue::ExternalLinkage:
377 O << "\tpublic " << name << "\n";
379 case GlobalValue::InternalLinkage:
380 SwitchToDataSection(TAI->getDataSection(), I);
383 assert(0 && "Unknown linkage type!");
387 EmitAlignment(Align, I);
389 O << name << ":\t\t\t\t" << TAI->getCommentString()
390 << " " << I->getName() << '\n';
392 EmitGlobalConstant(C);
395 O << name << "?\tends\n";
398 // Output linker support code for dllexported globals
399 if ((DLLExportedGVs.begin() != DLLExportedGVs.end()) ||
400 (DLLExportedFns.begin() != DLLExportedFns.end())) {
401 SwitchToDataSection("", 0);
402 O << "; WARNING: The following code is valid only with MASM v8.x and (possible) higher\n"
403 << "; This version of MASM is usually shipped with Microsoft Visual Studio 2005\n"
404 << "; or (possible) further versions. Unfortunately, there is no way to support\n"
405 << "; dllexported symbols in the earlier versions of MASM in fully automatic way\n\n";
406 O << "_drectve\t segment info alias('.drectve')\n";
409 for (std::set<std::string>::iterator i = DLLExportedGVs.begin(),
410 e = DLLExportedGVs.end();
412 O << "\t db ' /EXPORT:" << *i << ",data'\n";
415 for (std::set<std::string>::iterator i = DLLExportedFns.begin(),
416 e = DLLExportedFns.end();
418 O << "\t db ' /EXPORT:" << *i << "'\n";
421 if ((DLLExportedGVs.begin() != DLLExportedGVs.end()) ||
422 (DLLExportedFns.begin() != DLLExportedFns.end())) {
423 O << "_drectve\t ends\n";
426 // Bypass X86SharedAsmPrinter::doFinalization().
427 AsmPrinter::doFinalization(M);
428 SwitchToDataSection("", 0);
430 return false; // success
433 void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {
434 unsigned NumElts = CVA->getNumOperands();
436 // ML does not have escape sequences except '' for '. It also has a maximum
437 // string length of 255.
439 bool inString = false;
440 for (unsigned i = 0; i < NumElts; i++) {
441 int n = cast<ConstantInt>(CVA->getOperand(i))->getRawValue() & 255;
445 if (n >= 32 && n <= 127) {
472 len += 1 + (n > 9) + (n > 99);
493 // Include the auto-generated portion of the assembly writer.
494 #include "X86GenAsmWriter1.inc"