1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCSectionELF.h"
16 #include "llvm/MC/MCSectionMachO.h"
17 #include "llvm/MC/MachObjectWriter.h"
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Support/raw_ostream.h"
20 #include "llvm/Target/TargetRegistry.h"
21 #include "llvm/Target/TargetAsmBackend.h"
26 static unsigned getFixupKindLog2Size(unsigned Kind) {
28 default: assert(0 && "invalid fixup kind!");
29 case X86::reloc_pcrel_1byte:
30 case FK_Data_1: return 0;
31 case FK_Data_2: return 1;
32 case X86::reloc_pcrel_4byte:
33 case X86::reloc_riprel_4byte:
34 case X86::reloc_riprel_4byte_movq_load:
35 case FK_Data_4: return 2;
36 case FK_Data_8: return 3;
40 class X86AsmBackend : public TargetAsmBackend {
42 X86AsmBackend(const Target &T)
43 : TargetAsmBackend(T) {}
45 void ApplyFixup(const MCAsmFixup &Fixup, MCDataFragment &DF,
46 uint64_t Value) const {
47 unsigned Size = 1 << getFixupKindLog2Size(Fixup.Kind);
49 assert(Fixup.Offset + Size <= DF.getContents().size() &&
50 "Invalid fixup offset!");
51 for (unsigned i = 0; i != Size; ++i)
52 DF.getContents()[Fixup.Offset + i] = uint8_t(Value >> (i * 8));
55 void RelaxInstruction(const MCInstFragment *IF, MCInst &Res) const;
58 static unsigned getRelaxedOpcode(unsigned Op) {
63 case X86::JAE_1: return X86::JAE_4;
64 case X86::JA_1: return X86::JA_4;
65 case X86::JBE_1: return X86::JBE_4;
66 case X86::JB_1: return X86::JB_4;
67 case X86::JE_1: return X86::JE_4;
68 case X86::JGE_1: return X86::JGE_4;
69 case X86::JG_1: return X86::JG_4;
70 case X86::JLE_1: return X86::JLE_4;
71 case X86::JL_1: return X86::JL_4;
72 case X86::JMP_1: return X86::JMP_4;
73 case X86::JNE_1: return X86::JNE_4;
74 case X86::JNO_1: return X86::JNO_4;
75 case X86::JNP_1: return X86::JNP_4;
76 case X86::JNS_1: return X86::JNS_4;
77 case X86::JO_1: return X86::JO_4;
78 case X86::JP_1: return X86::JP_4;
79 case X86::JS_1: return X86::JS_4;
83 // FIXME: Can tblgen help at all here to verify there aren't other instructions
85 void X86AsmBackend::RelaxInstruction(const MCInstFragment *IF,
87 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
88 unsigned RelaxedOp = getRelaxedOpcode(IF->getInst().getOpcode());
90 if (RelaxedOp == IF->getInst().getOpcode()) {
92 raw_svector_ostream OS(Tmp);
93 IF->getInst().dump_pretty(OS);
94 llvm_report_error("unexpected instruction to relax: " + OS.str());
98 Res.setOpcode(RelaxedOp);
103 class ELFX86AsmBackend : public X86AsmBackend {
105 ELFX86AsmBackend(const Target &T)
107 HasAbsolutizedSet = true;
108 HasScatteredSymbols = true;
111 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
115 bool isVirtualSection(const MCSection &Section) const {
116 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
117 return SE.getType() == MCSectionELF::SHT_NOBITS;;
121 class DarwinX86AsmBackend : public X86AsmBackend {
123 DarwinX86AsmBackend(const Target &T)
125 HasAbsolutizedSet = true;
126 HasScatteredSymbols = true;
129 bool isVirtualSection(const MCSection &Section) const {
130 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
131 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
132 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL);
136 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
138 DarwinX86_32AsmBackend(const Target &T)
139 : DarwinX86AsmBackend(T) {}
141 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
142 return new MachObjectWriter(OS, /*Is64Bit=*/false);
146 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
148 DarwinX86_64AsmBackend(const Target &T)
149 : DarwinX86AsmBackend(T) {
150 HasReliableSymbolDifference = true;
153 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
154 return new MachObjectWriter(OS, /*Is64Bit=*/true);
157 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
158 // Temporary labels in the string literals sections require symbols. The
159 // issue is that the x86_64 relocation format does not allow symbol +
160 // offset, and so the linker does not have enough information to resolve the
161 // access to the appropriate atom unless an external relocation is used. For
162 // non-cstring sections, we expect the compiler to use a non-temporary label
163 // for anything that could have an addend pointing outside the symbol.
165 // See <rdar://problem/4765733>.
166 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
167 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
173 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
174 const std::string &TT) {
175 switch (Triple(TT).getOS()) {
177 return new DarwinX86_32AsmBackend(T);
179 return new ELFX86AsmBackend(T);
183 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
184 const std::string &TT) {
185 switch (Triple(TT).getOS()) {
187 return new DarwinX86_64AsmBackend(T);
189 return new ELFX86AsmBackend(T);