1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This defines functionality used to emit comments about X86 instructions to
11 // an output stream for -fverbose-asm.
13 //===----------------------------------------------------------------------===//
15 #include "X86InstComments.h"
16 #include "MCTargetDesc/X86MCTargetDesc.h"
17 #include "Utils/X86ShuffleDecode.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/Support/raw_ostream.h"
22 //===----------------------------------------------------------------------===//
23 // Top Level Entrypoint
24 //===----------------------------------------------------------------------===//
26 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
27 /// newline terminated strings to the specified string if desired. This
28 /// information is shown in disassembly dumps when verbose assembly is enabled.
29 void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
30 const char *(*getRegName)(unsigned)) {
31 // If this is a shuffle operation, the switch should fill in this state.
32 SmallVector<unsigned, 8> ShuffleMask;
33 const char *DestName = 0, *Src1Name = 0, *Src2Name = 0;
35 switch (MI->getOpcode()) {
37 Src1Name = getRegName(MI->getOperand(1).getReg());
38 Src2Name = getRegName(MI->getOperand(2).getReg());
39 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask);
43 Src2Name = getRegName(MI->getOperand(2).getReg());
44 Src1Name = getRegName(MI->getOperand(0).getReg());
45 DecodeMOVLHPSMask(2, ShuffleMask);
49 Src2Name = getRegName(MI->getOperand(2).getReg());
50 Src1Name = getRegName(MI->getOperand(0).getReg());
51 DecodeMOVHLPSMask(2, ShuffleMask);
55 Src1Name = getRegName(MI->getOperand(1).getReg());
58 DestName = getRegName(MI->getOperand(0).getReg());
59 DecodePSHUFMask(4, MI->getOperand(MI->getNumOperands()-1).getImm(),
64 Src1Name = getRegName(MI->getOperand(1).getReg());
67 DestName = getRegName(MI->getOperand(0).getReg());
68 DecodePSHUFHWMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
72 Src1Name = getRegName(MI->getOperand(1).getReg());
75 DestName = getRegName(MI->getOperand(0).getReg());
76 DecodePSHUFLWMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
80 case X86::PUNPCKHBWrr:
81 Src2Name = getRegName(MI->getOperand(2).getReg());
83 case X86::PUNPCKHBWrm:
84 Src1Name = getRegName(MI->getOperand(0).getReg());
85 DecodePUNPCKHMask(16, ShuffleMask);
87 case X86::PUNPCKHWDrr:
88 Src2Name = getRegName(MI->getOperand(2).getReg());
90 case X86::PUNPCKHWDrm:
91 Src1Name = getRegName(MI->getOperand(0).getReg());
92 DecodePUNPCKHMask(8, ShuffleMask);
94 case X86::PUNPCKHDQrr:
95 Src2Name = getRegName(MI->getOperand(2).getReg());
97 case X86::PUNPCKHDQrm:
98 Src1Name = getRegName(MI->getOperand(0).getReg());
99 DecodePUNPCKHMask(4, ShuffleMask);
101 case X86::PUNPCKHQDQrr:
102 Src2Name = getRegName(MI->getOperand(2).getReg());
104 case X86::PUNPCKHQDQrm:
105 Src1Name = getRegName(MI->getOperand(0).getReg());
106 DecodePUNPCKHMask(2, ShuffleMask);
109 case X86::PUNPCKLBWrr:
110 Src2Name = getRegName(MI->getOperand(2).getReg());
112 case X86::PUNPCKLBWrm:
113 Src1Name = getRegName(MI->getOperand(0).getReg());
114 DecodePUNPCKLBWMask(16, ShuffleMask);
116 case X86::PUNPCKLWDrr:
117 Src2Name = getRegName(MI->getOperand(2).getReg());
119 case X86::PUNPCKLWDrm:
120 Src1Name = getRegName(MI->getOperand(0).getReg());
121 DecodePUNPCKLWDMask(8, ShuffleMask);
123 case X86::PUNPCKLDQrr:
124 Src2Name = getRegName(MI->getOperand(2).getReg());
126 case X86::PUNPCKLDQrm:
127 Src1Name = getRegName(MI->getOperand(0).getReg());
128 DecodePUNPCKLDQMask(4, ShuffleMask);
130 case X86::PUNPCKLQDQrr:
131 Src2Name = getRegName(MI->getOperand(2).getReg());
133 case X86::PUNPCKLQDQrm:
134 Src1Name = getRegName(MI->getOperand(0).getReg());
135 DecodePUNPCKLQDQMask(2, ShuffleMask);
139 Src2Name = getRegName(MI->getOperand(2).getReg());
142 DecodeSHUFPSMask(2, MI->getOperand(3).getImm(), ShuffleMask);
143 Src1Name = getRegName(MI->getOperand(0).getReg());
147 Src2Name = getRegName(MI->getOperand(2).getReg());
150 DecodeSHUFPSMask(4, MI->getOperand(3).getImm(), ShuffleMask);
151 Src1Name = getRegName(MI->getOperand(0).getReg());
154 case X86::UNPCKLPDrr:
155 Src2Name = getRegName(MI->getOperand(2).getReg());
157 case X86::UNPCKLPDrm:
158 DecodeUNPCKLPDMask(2, ShuffleMask);
159 Src1Name = getRegName(MI->getOperand(0).getReg());
161 case X86::VUNPCKLPDrr:
162 Src2Name = getRegName(MI->getOperand(2).getReg());
164 case X86::VUNPCKLPDrm:
165 DecodeUNPCKLPDMask(2, ShuffleMask);
166 Src1Name = getRegName(MI->getOperand(1).getReg());
168 case X86::VUNPCKLPDYrr:
169 Src2Name = getRegName(MI->getOperand(2).getReg());
171 case X86::VUNPCKLPDYrm:
172 DecodeUNPCKLPDMask(4, ShuffleMask);
173 Src1Name = getRegName(MI->getOperand(1).getReg());
175 case X86::UNPCKLPSrr:
176 Src2Name = getRegName(MI->getOperand(2).getReg());
178 case X86::UNPCKLPSrm:
179 DecodeUNPCKLPSMask(4, ShuffleMask);
180 Src1Name = getRegName(MI->getOperand(0).getReg());
182 case X86::VUNPCKLPSrr:
183 Src2Name = getRegName(MI->getOperand(2).getReg());
185 case X86::VUNPCKLPSrm:
186 DecodeUNPCKLPSMask(4, ShuffleMask);
187 Src1Name = getRegName(MI->getOperand(1).getReg());
189 case X86::VUNPCKLPSYrr:
190 Src2Name = getRegName(MI->getOperand(2).getReg());
192 case X86::VUNPCKLPSYrm:
193 DecodeUNPCKLPSMask(8, ShuffleMask);
194 Src1Name = getRegName(MI->getOperand(1).getReg());
196 case X86::UNPCKHPDrr:
197 Src2Name = getRegName(MI->getOperand(2).getReg());
199 case X86::UNPCKHPDrm:
200 DecodeUNPCKHPMask(2, ShuffleMask);
201 Src1Name = getRegName(MI->getOperand(0).getReg());
203 case X86::UNPCKHPSrr:
204 Src2Name = getRegName(MI->getOperand(2).getReg());
206 case X86::UNPCKHPSrm:
207 DecodeUNPCKHPMask(4, ShuffleMask);
208 Src1Name = getRegName(MI->getOperand(0).getReg());
210 case X86::VPERMILPSri:
211 DecodeVPERMILPSMask(4, MI->getOperand(2).getImm(),
213 Src1Name = getRegName(MI->getOperand(0).getReg());
215 case X86::VPERMILPSYri:
216 DecodeVPERMILPSMask(8, MI->getOperand(2).getImm(),
218 Src1Name = getRegName(MI->getOperand(0).getReg());
220 case X86::VPERMILPDri:
221 DecodeVPERMILPDMask(2, MI->getOperand(2).getImm(),
223 Src1Name = getRegName(MI->getOperand(0).getReg());
225 case X86::VPERMILPDYri:
226 DecodeVPERMILPDMask(4, MI->getOperand(2).getImm(),
228 Src1Name = getRegName(MI->getOperand(0).getReg());
230 case X86::VPERM2F128rr:
231 DecodeVPERM2F128Mask(MI->getOperand(3).getImm(), ShuffleMask);
232 Src1Name = getRegName(MI->getOperand(1).getReg());
233 Src2Name = getRegName(MI->getOperand(2).getReg());
238 // If this was a shuffle operation, print the shuffle mask.
239 if (!ShuffleMask.empty()) {
240 if (DestName == 0) DestName = Src1Name;
241 OS << (DestName ? DestName : "mem") << " = ";
243 // If the two sources are the same, canonicalize the input elements to be
244 // from the first src so that we get larger element spans.
245 if (Src1Name == Src2Name) {
246 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
247 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
248 ShuffleMask[i] >= e) // From second mask.
253 // The shuffle mask specifies which elements of the src1/src2 fill in the
254 // destination, with a few sentinel values. Loop through and print them
256 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
259 if (ShuffleMask[i] == SM_SentinelZero) {
264 // Otherwise, it must come from src1 or src2. Print the span of elements
265 // that comes from this src.
266 bool isSrc1 = ShuffleMask[i] < ShuffleMask.size();
267 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
268 OS << (SrcName ? SrcName : "mem") << '[';
271 (int)ShuffleMask[i] >= 0 &&
272 (ShuffleMask[i] < ShuffleMask.size()) == isSrc1) {
277 OS << ShuffleMask[i] % ShuffleMask.size();
281 --i; // For loop increments element #.