1 //===-- SystemZDisassembler.cpp - Disassembler for SystemZ ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "llvm/MC/MCDisassembler.h"
12 #include "llvm/MC/MCFixedLenDisassembler.h"
13 #include "llvm/MC/MCInst.h"
14 #include "llvm/MC/MCSubtargetInfo.h"
15 #include "llvm/Support/MemoryObject.h"
16 #include "llvm/Support/TargetRegistry.h"
20 #define DEBUG_TYPE "systemz-disassembler"
22 typedef MCDisassembler::DecodeStatus DecodeStatus;
25 class SystemZDisassembler : public MCDisassembler {
27 SystemZDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
28 : MCDisassembler(STI, Ctx) {}
29 virtual ~SystemZDisassembler() {}
31 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
32 const MemoryObject &Region, uint64_t Address,
34 raw_ostream &CStream) const override;
36 } // end anonymous namespace
38 static MCDisassembler *createSystemZDisassembler(const Target &T,
39 const MCSubtargetInfo &STI,
41 return new SystemZDisassembler(STI, Ctx);
44 extern "C" void LLVMInitializeSystemZDisassembler() {
45 // Register the disassembler.
46 TargetRegistry::RegisterMCDisassembler(TheSystemZTarget,
47 createSystemZDisassembler);
50 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
51 const unsigned *Regs) {
52 assert(RegNo < 16 && "Invalid register");
55 return MCDisassembler::Fail;
56 Inst.addOperand(MCOperand::CreateReg(RegNo));
57 return MCDisassembler::Success;
60 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
62 const void *Decoder) {
63 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
66 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
68 const void *Decoder) {
69 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs);
72 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
74 const void *Decoder) {
75 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs);
78 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
80 const void *Decoder) {
81 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR128Regs);
84 static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
86 const void *Decoder) {
87 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs);
90 static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
92 const void *Decoder) {
93 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP32Regs);
96 static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
98 const void *Decoder) {
99 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP64Regs);
102 static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
104 const void *Decoder) {
105 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP128Regs);
109 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) {
110 assert(isUInt<N>(Imm) && "Invalid immediate");
111 Inst.addOperand(MCOperand::CreateImm(Imm));
112 return MCDisassembler::Success;
116 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm) {
117 assert(isUInt<N>(Imm) && "Invalid immediate");
118 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm)));
119 return MCDisassembler::Success;
122 static DecodeStatus decodeAccessRegOperand(MCInst &Inst, uint64_t Imm,
124 const void *Decoder) {
125 return decodeUImmOperand<4>(Inst, Imm);
128 static DecodeStatus decodeU4ImmOperand(MCInst &Inst, uint64_t Imm,
129 uint64_t Address, const void *Decoder) {
130 return decodeUImmOperand<4>(Inst, Imm);
133 static DecodeStatus decodeU6ImmOperand(MCInst &Inst, uint64_t Imm,
134 uint64_t Address, const void *Decoder) {
135 return decodeUImmOperand<6>(Inst, Imm);
138 static DecodeStatus decodeU8ImmOperand(MCInst &Inst, uint64_t Imm,
139 uint64_t Address, const void *Decoder) {
140 return decodeUImmOperand<8>(Inst, Imm);
143 static DecodeStatus decodeU16ImmOperand(MCInst &Inst, uint64_t Imm,
144 uint64_t Address, const void *Decoder) {
145 return decodeUImmOperand<16>(Inst, Imm);
148 static DecodeStatus decodeU32ImmOperand(MCInst &Inst, uint64_t Imm,
149 uint64_t Address, const void *Decoder) {
150 return decodeUImmOperand<32>(Inst, Imm);
153 static DecodeStatus decodeS8ImmOperand(MCInst &Inst, uint64_t Imm,
154 uint64_t Address, const void *Decoder) {
155 return decodeSImmOperand<8>(Inst, Imm);
158 static DecodeStatus decodeS16ImmOperand(MCInst &Inst, uint64_t Imm,
159 uint64_t Address, const void *Decoder) {
160 return decodeSImmOperand<16>(Inst, Imm);
163 static DecodeStatus decodeS32ImmOperand(MCInst &Inst, uint64_t Imm,
164 uint64_t Address, const void *Decoder) {
165 return decodeSImmOperand<32>(Inst, Imm);
169 static DecodeStatus decodePCDBLOperand(MCInst &Inst, uint64_t Imm,
171 assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
172 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address));
173 return MCDisassembler::Success;
176 static DecodeStatus decodePC16DBLOperand(MCInst &Inst, uint64_t Imm,
178 const void *Decoder) {
179 return decodePCDBLOperand<16>(Inst, Imm, Address);
182 static DecodeStatus decodePC32DBLOperand(MCInst &Inst, uint64_t Imm,
184 const void *Decoder) {
185 return decodePCDBLOperand<32>(Inst, Imm, Address);
188 static DecodeStatus decodeBDAddr12Operand(MCInst &Inst, uint64_t Field,
189 const unsigned *Regs) {
190 uint64_t Base = Field >> 12;
191 uint64_t Disp = Field & 0xfff;
192 assert(Base < 16 && "Invalid BDAddr12");
193 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
194 Inst.addOperand(MCOperand::CreateImm(Disp));
195 return MCDisassembler::Success;
198 static DecodeStatus decodeBDAddr20Operand(MCInst &Inst, uint64_t Field,
199 const unsigned *Regs) {
200 uint64_t Base = Field >> 20;
201 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff);
202 assert(Base < 16 && "Invalid BDAddr20");
203 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
204 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
205 return MCDisassembler::Success;
208 static DecodeStatus decodeBDXAddr12Operand(MCInst &Inst, uint64_t Field,
209 const unsigned *Regs) {
210 uint64_t Index = Field >> 16;
211 uint64_t Base = (Field >> 12) & 0xf;
212 uint64_t Disp = Field & 0xfff;
213 assert(Index < 16 && "Invalid BDXAddr12");
214 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
215 Inst.addOperand(MCOperand::CreateImm(Disp));
216 Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
217 return MCDisassembler::Success;
220 static DecodeStatus decodeBDXAddr20Operand(MCInst &Inst, uint64_t Field,
221 const unsigned *Regs) {
222 uint64_t Index = Field >> 24;
223 uint64_t Base = (Field >> 20) & 0xf;
224 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12);
225 assert(Index < 16 && "Invalid BDXAddr20");
226 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
227 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
228 Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
229 return MCDisassembler::Success;
232 static DecodeStatus decodeBDLAddr12Len8Operand(MCInst &Inst, uint64_t Field,
233 const unsigned *Regs) {
234 uint64_t Length = Field >> 16;
235 uint64_t Base = (Field >> 12) & 0xf;
236 uint64_t Disp = Field & 0xfff;
237 assert(Length < 256 && "Invalid BDLAddr12Len8");
238 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
239 Inst.addOperand(MCOperand::CreateImm(Disp));
240 Inst.addOperand(MCOperand::CreateImm(Length + 1));
241 return MCDisassembler::Success;
244 static DecodeStatus decodeBDAddr32Disp12Operand(MCInst &Inst, uint64_t Field,
246 const void *Decoder) {
247 return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR32Regs);
250 static DecodeStatus decodeBDAddr32Disp20Operand(MCInst &Inst, uint64_t Field,
252 const void *Decoder) {
253 return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR32Regs);
256 static DecodeStatus decodeBDAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
258 const void *Decoder) {
259 return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
262 static DecodeStatus decodeBDAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
264 const void *Decoder) {
265 return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
268 static DecodeStatus decodeBDXAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
270 const void *Decoder) {
271 return decodeBDXAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
274 static DecodeStatus decodeBDXAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
276 const void *Decoder) {
277 return decodeBDXAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
280 static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst &Inst,
283 const void *Decoder) {
284 return decodeBDLAddr12Len8Operand(Inst, Field, SystemZMC::GR64Regs);
287 #include "SystemZGenDisassemblerTables.inc"
289 DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
290 const MemoryObject &Region,
293 raw_ostream &CS) const {
294 // Get the first two bytes of the instruction.
297 if (Region.readBytes(Address, 2, Bytes) == -1)
298 return MCDisassembler::Fail;
300 // The top 2 bits of the first byte specify the size.
301 const uint8_t *Table;
302 if (Bytes[0] < 0x40) {
304 Table = DecoderTable16;
305 } else if (Bytes[0] < 0xc0) {
307 Table = DecoderTable32;
310 Table = DecoderTable48;
313 // Read any remaining bytes.
314 if (Size > 2 && Region.readBytes(Address + 2, Size - 2, Bytes + 2) == -1)
315 return MCDisassembler::Fail;
317 // Construct the instruction.
319 for (uint64_t I = 0; I < Size; ++I)
320 Inst = (Inst << 8) | Bytes[I];
322 return decodeInstruction(Table, MI, Inst, Address, this, STI);