2 //***************************************************************************
7 // Machine-independent driver file for instruction selection.
8 // This file constructs a forest of BURG instruction trees and then
9 // uses the BURG-generated tree grammar (BURM) to find the optimal
10 // instruction sequences for a given machine.
13 // 7/02/01 - Vikram Adve - Created
14 //**************************************************************************/
17 #include "llvm/CodeGen/InstrSelection.h"
18 #include "llvm/CodeGen/InstrSelectionSupport.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/Instruction.h"
21 #include "llvm/BasicBlock.h"
22 #include "llvm/Method.h"
23 #include "llvm/iPHINode.h"
24 #include "llvm/Target/MachineRegInfo.h"
25 #include "Support/CommandLine.h"
29 //******************** Internal Data Declarations ************************/
31 // Use a static vector to avoid allocating a new one per VM instruction
32 static MachineInstr* minstrVec[MAX_INSTR_PER_VMINSTR];
35 enum SelectDebugLevel_t {
37 Select_PrintMachineCode,
38 Select_DebugInstTrees,
39 Select_DebugBurgTrees,
42 // Enable Debug Options to be specified on the command line
43 cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::NoFlags,
44 "enable instruction selection debugging information",
45 clEnumValN(Select_NoDebugInfo, "n", "disable debug output"),
46 clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"),
47 clEnumValN(Select_DebugInstTrees, "i", "print debugging info for instruction selection "),
48 clEnumValN(Select_DebugBurgTrees, "b", "print burg trees"), 0);
51 //******************** Forward Function Declarations ***********************/
54 static bool SelectInstructionsForTree (InstrTreeNode* treeRoot,
56 TargetMachine &target);
58 static void PostprocessMachineCodeForTree(InstructionNode* instrNode,
61 TargetMachine &target);
63 static void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target);
67 //******************* Externally Visible Functions *************************/
70 //---------------------------------------------------------------------------
71 // Entry point for instruction selection using BURG.
72 // Returns true if instruction selection failed, false otherwise.
73 //---------------------------------------------------------------------------
76 SelectInstructionsForMethod(Method* method, TargetMachine &target)
81 // Build the instruction trees to be given as inputs to BURG.
83 InstrForest instrForest(method);
85 if (SelectDebugLevel >= Select_DebugInstTrees)
87 cout << "\n\n*** Instruction trees for method "
88 << (method->hasName()? method->getName() : "")
94 // Invoke BURG instruction selection for each tree
96 const hash_set<InstructionNode*> &treeRoots = instrForest.getRootSet();
97 for (hash_set<InstructionNode*>::const_iterator
98 treeRootIter = treeRoots.begin(); treeRootIter != treeRoots.end();
101 InstrTreeNode* basicNode = *treeRootIter;
103 // Invoke BURM to label each tree node with a state
104 burm_label(basicNode);
106 if (SelectDebugLevel >= Select_DebugBurgTrees)
108 printcover(basicNode, 1, 0);
109 cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
110 printMatches(basicNode);
113 // Then recursively walk the tree to select instructions
114 if (SelectInstructionsForTree(basicNode, /*goalnt*/1, target))
122 // Record instructions in the vector for each basic block
124 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI)
126 MachineCodeForBasicBlock& bbMvec = (*BI)->getMachineInstrVec();
127 for (BasicBlock::iterator II = (*BI)->begin(); II != (*BI)->end(); ++II)
129 MachineCodeForVMInstr& mvec = (*II)->getMachineInstrVec();
130 for (unsigned i=0; i < mvec.size(); i++)
131 bbMvec.push_back(mvec[i]);
135 // Insert phi elimination code -- added by Ruchira
136 InsertCode4AllPhisInMeth(method, target);
139 if (SelectDebugLevel >= Select_PrintMachineCode)
142 << "*** Machine instructions after INSTRUCTION SELECTION" << endl;
143 MachineCodeForMethod::get(method).dump();
150 //*********************** Private Functions *****************************/
153 //-------------------------------------------------------------------------
154 // Thid method inserts a copy instruction to a predecessor BB as a result
155 // of phi elimination.
156 //-------------------------------------------------------------------------
158 void InsertPhiElimInst(BasicBlock *BB, MachineInstr *CpMI) {
160 TerminatorInst *TermInst = BB->getTerminator();
161 MachineCodeForVMInstr &MC4Term = TermInst->getMachineInstrVec();
162 MachineInstr *FirstMIOfTerm = *( MC4Term.begin() );
164 assert( FirstMIOfTerm && "No Machine Instrs for terminator" );
166 // get an iterator to machine instructions in the BB
167 MachineCodeForBasicBlock& bbMvec = BB->getMachineInstrVec();
168 MachineCodeForBasicBlock::iterator MCIt = bbMvec.begin();
170 // find the position of first machine instruction generated by the
171 // terminator of this BB
172 for( ; (MCIt != bbMvec.end()) && (*MCIt != FirstMIOfTerm) ; ++MCIt ) ;
174 assert( MCIt != bbMvec.end() && "Start inst of terminator not found");
176 // insert the copy instruction just before the first machine instruction
177 // generated for the terminator
178 bbMvec.insert( MCIt , CpMI );
180 //cerr << "\nPhiElimination copy inst: " << *CopyInstVec[0];
185 //-------------------------------------------------------------------------
186 // This method inserts phi elimination code for all BBs in a method
187 //-------------------------------------------------------------------------
188 void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target) {
191 // for all basic blocks in method
193 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI) {
195 BasicBlock *BB = *BI;
196 const BasicBlock::InstListType &InstList = BB->getInstList();
197 BasicBlock::InstListType::const_iterator IIt = InstList.begin();
199 // for all instructions in the basic block
201 for( ; IIt != InstList.end(); ++IIt ) {
203 if( (*IIt)->getOpcode() == Instruction::PHINode ) {
205 PHINode *PN = (PHINode *) (*IIt);
207 // for each incoming value of the phi, insert phi elimination
209 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
211 // insert the copy instruction to the predecessor BB
213 vector<MachineInstr*> CopyInstVec;
216 target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PN);
218 InsertPhiElimInst( PN->getIncomingBlock(i), CpMI);
221 else break; // since PHI nodes can only be at the top
223 } // for each Phi Instr in BB
225 } // for all BBs in method
231 //-------------------------------------------------------------------------
232 // This method inserts phi elimination code for all BBs in a method
233 //-------------------------------------------------------------------------
234 void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target) {
237 // for all basic blocks in method
239 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI) {
241 BasicBlock *BB = *BI;
242 const BasicBlock::InstListType &InstList = BB->getInstList();
243 BasicBlock::InstListType::const_iterator IIt = InstList.begin();
245 // for all instructions in the basic block
247 for( ; IIt != InstList.end(); ++IIt ) {
249 if( (*IIt)->getOpcode() == Instruction::PHINode ) {
251 PHINode *PN = (PHINode *) (*IIt);
254 new Value(PN->getType(), PN->getValueType() );
256 string *Name = new string("PhiCp:");
257 (*Name) += (int) PhiCpRes;
258 PhiCpRes->setName( *Name );
261 // for each incoming value of the phi, insert phi elimination
263 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
265 // insert the copy instruction to the predecessor BB
268 target.getRegInfo().cpValue2Value(PN->getIncomingValue(i),
271 InsertPhiElimInst(PN->getIncomingBlock(i), CpMI);
276 MachineInstr *CpMI2 =
277 target.getRegInfo().cpValue2Value(PhiCpRes, PN);
279 // get an iterator to machine instructions in the BB
280 MachineCodeForBasicBlock& bbMvec = BB->getMachineInstrVec();
282 bbMvec.insert( bbMvec.begin(), CpMI2);
286 else break; // since PHI nodes can only be at the top
288 } // for each Phi Instr in BB
290 } // for all BBs in method
302 //---------------------------------------------------------------------------
303 // Function AppendMachineCodeForVMInstr
305 // Append machine instr sequence to the machine code vec for a VM instr
306 //---------------------------------------------------------------------------
309 AppendMachineCodeForVMInstr(MachineInstr** minstrVec,
311 Instruction* vmInstr)
315 MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
316 mvec.insert(mvec.end(), minstrVec, minstrVec+N);
321 //---------------------------------------------------------------------------
322 // Function PostprocessMachineCodeForTree
324 // Apply any final cleanups to machine code for the root of a subtree
325 // after selection for all its children has been completed.
326 //---------------------------------------------------------------------------
329 PostprocessMachineCodeForTree(InstructionNode* instrNode,
332 TargetMachine &target)
334 // Fix up any constant operands in the machine instructions to either
335 // use an immediate field or to load the constant into a register
336 // Walk backwards and use direct indexes to allow insertion before current
338 Instruction* vmInstr = instrNode->getInstruction();
339 MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
340 for (int i = (int) mvec.size()-1; i >= 0; i--)
342 vector<MachineInstr*> loadConstVec =
343 FixConstantOperandsForInstr(vmInstr, mvec[i], target);
345 if (loadConstVec.size() > 0)
346 mvec.insert(mvec.begin()+i, loadConstVec.begin(), loadConstVec.end());
350 //---------------------------------------------------------------------------
351 // Function SelectInstructionsForTree
353 // Recursively walk the tree to select instructions.
354 // Do this top-down so that child instructions can exploit decisions
355 // made at the child instructions.
357 // E.g., if br(setle(reg,const)) decides the constant is 0 and uses
358 // a branch-on-integer-register instruction, then the setle node
359 // can use that information to avoid generating the SUBcc instruction.
361 // Note that this cannot be done bottom-up because setle must do this
362 // only if it is a child of the branch (otherwise, the result of setle
363 // may be used by multiple instructions).
364 //---------------------------------------------------------------------------
367 SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt,
368 TargetMachine &target)
370 // Get the rule that matches this node.
372 int ruleForNode = burm_rule(treeRoot->state, goalnt);
374 if (ruleForNode == 0)
376 cerr << "Could not match instruction tree for instr selection" << endl;
381 // Get this rule's non-terminals and the corresponding child nodes (if any)
383 short *nts = burm_nts[ruleForNode];
385 // First, select instructions for the current node and rule.
386 // (If this is a list node, not an instruction, then skip this step).
387 // This function is specific to the target architecture.
389 if (treeRoot->opLabel != VRegListOp)
391 InstructionNode* instrNode = (InstructionNode*)treeRoot;
392 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
394 unsigned N = GetInstructionsByRule(instrNode, ruleForNode, nts, target,
398 assert(N <= MAX_INSTR_PER_VMINSTR);
399 AppendMachineCodeForVMInstr(minstrVec,N,instrNode->getInstruction());
403 // Then, recursively compile the child nodes, if any.
406 { // i.e., there is at least one kid
407 InstrTreeNode* kids[2];
408 int currentRule = ruleForNode;
409 burm_kids(treeRoot, currentRule, kids);
411 // First skip over any chain rules so that we don't visit
412 // the current node again.
414 while (ThisIsAChainRule(currentRule))
416 currentRule = burm_rule(treeRoot->state, nts[0]);
417 nts = burm_nts[currentRule];
418 burm_kids(treeRoot, currentRule, kids);
421 // Now we have the first non-chain rule so we have found
422 // the actual child nodes. Recursively compile them.
424 for (int i = 0; nts[i]; i++)
427 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
428 if (nodeType == InstrTreeNode::NTVRegListNode ||
429 nodeType == InstrTreeNode::NTInstructionNode)
431 if (SelectInstructionsForTree(kids[i], nts[i], target))
432 return true; // failure
437 // Finally, do any postprocessing on this node after its children
438 // have been translated
440 if (treeRoot->opLabel != VRegListOp)
442 InstructionNode* instrNode = (InstructionNode*)treeRoot;
443 PostprocessMachineCodeForTree(instrNode, ruleForNode, nts, target);
446 return false; // success