1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
27 // Register the target.
28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
31 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
33 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
34 IntrinsicLowering *IL)
35 : TargetMachine("SparcV8", IL, false, 4, 4),
36 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
39 unsigned SparcV8TargetMachine::getJITMatchQuality() {
40 return 0; // No JIT yet.
43 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
44 if (M.getEndianness() == Module::BigEndian &&
45 M.getPointerSize() == Module::Pointer32)
47 return 20; // BE/32 ==> Prefer sparcv8 on sparc
49 return 5; // BE/32 ==> Prefer ppc elsewhere
51 else if (M.getEndianness() != Module::AnyEndianness ||
52 M.getPointerSize() != Module::AnyPointerSize)
53 return 0; // Match for some other target
55 return getJITMatchQuality()/2;
58 /// addPassesToEmitAssembly - Add passes to the specified pass manager
59 /// to implement a static compiler for this target.
61 bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
63 // FIXME: Implement efficient support for garbage collection intrinsics.
64 PM.add(createLowerGCPass());
66 // Replace malloc and free instructions with library calls.
67 PM.add(createLowerAllocationsPass());
69 // FIXME: implement the switch instruction in the instruction selector.
70 PM.add(createLowerSwitchPass());
72 // FIXME: implement the invoke/unwind instructions!
73 PM.add(createLowerInvokePass());
75 PM.add(createLowerConstantExpressionsPass());
77 // Make sure that no unreachable blocks are instruction selected.
78 PM.add(createUnreachableBlockEliminationPass());
80 // FIXME: implement the select instruction in the instruction selector.
81 PM.add(createLowerSelectPass());
83 // Print LLVM code input to instruction selector:
85 PM.add(new PrintModulePass());
87 PM.add(createSparcV8SimpleInstructionSelector(*this));
89 // Print machine instructions as they were initially generated.
91 PM.add(createMachineFunctionPrinterPass(&std::cerr));
93 PM.add(createRegisterAllocator());
94 PM.add(createPrologEpilogCodeInserter());
96 // Print machine instructions after register allocation and prolog/epilog
99 PM.add(createMachineFunctionPrinterPass(&std::cerr));
101 PM.add(createSparcV8FPMoverPass(*this));
102 PM.add(createSparcV8DelaySlotFillerPass(*this));
104 // Print machine instructions after filling delay slots.
105 if (PrintMachineCode)
106 PM.add(createMachineFunctionPrinterPass(&std::cerr));
108 // Output assembly language.
109 PM.add(createSparcV8CodePrinterPass(Out, *this));
111 // Delete the MachineInstrs we generated, since they're no longer needed.
112 PM.add(createMachineCodeDeleter());
116 /// addPassesToJITCompile - Add passes to the specified pass manager to
117 /// implement a fast dynamic compiler for this target.
119 void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
120 // FIXME: Implement efficient support for garbage collection intrinsics.
121 PM.add(createLowerGCPass());
123 // Replace malloc and free instructions with library calls.
124 PM.add(createLowerAllocationsPass());
126 // FIXME: implement the switch instruction in the instruction selector.
127 PM.add(createLowerSwitchPass());
129 // FIXME: implement the invoke/unwind instructions!
130 PM.add(createLowerInvokePass());
132 PM.add(createLowerConstantExpressionsPass());
134 // Make sure that no unreachable blocks are instruction selected.
135 PM.add(createUnreachableBlockEliminationPass());
137 // FIXME: implement the select instruction in the instruction selector.
138 PM.add(createLowerSelectPass());
140 // Print LLVM code input to instruction selector:
141 if (PrintMachineCode)
142 PM.add(new PrintFunctionPass());
144 PM.add(createSparcV8SimpleInstructionSelector(TM));
146 // Print machine instructions as they were initially generated.
147 if (PrintMachineCode)
148 PM.add(createMachineFunctionPrinterPass(&std::cerr));
150 PM.add(createRegisterAllocator());
151 PM.add(createPrologEpilogCodeInserter());
153 // Print machine instructions after register allocation and prolog/epilog
155 if (PrintMachineCode)
156 PM.add(createMachineFunctionPrinterPass(&std::cerr));
158 PM.add(createSparcV8FPMoverPass(TM));
159 PM.add(createSparcV8DelaySlotFillerPass(TM));
161 // Print machine instructions after filling delay slots.
162 if (PrintMachineCode)
163 PM.add(createMachineFunctionPrinterPass(&std::cerr));