1 //===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format SPARC assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "SparcInstrInfo.h"
18 #include "SparcTargetMachine.h"
19 #include "llvm/CodeGen/AsmPrinter.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCStreamer.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Target/TargetRegistry.h"
25 #include "llvm/ADT/StringExtras.h"
26 #include "llvm/Support/FormattedStream.h"
30 class SparcAsmPrinter : public AsmPrinter {
32 explicit SparcAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
33 MCContext &Ctx, MCStreamer &Streamer,
35 : AsmPrinter(O, TM, Ctx, Streamer, T) {}
37 virtual const char *getPassName() const {
38 return "Sparc Assembly Printer";
41 void printOperand(const MachineInstr *MI, int opNum);
42 void printMemOperand(const MachineInstr *MI, int opNum,
43 const char *Modifier = 0);
44 void printCCOperand(const MachineInstr *MI, int opNum);
46 virtual void EmitInstruction(const MachineInstr *MI) {
48 OutStreamer.AddBlankLine();
50 void printInstruction(const MachineInstr *MI); // autogenerated.
51 static const char *getRegisterName(unsigned RegNo);
53 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
54 unsigned AsmVariant, const char *ExtraCode);
55 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
56 unsigned AsmVariant, const char *ExtraCode);
58 bool printGetPCX(const MachineInstr *MI, unsigned OpNo);
60 } // end of anonymous namespace
62 #include "SparcGenAsmWriter.inc"
64 void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
65 const MachineOperand &MO = MI->getOperand (opNum);
66 bool CloseParen = false;
67 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
70 } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
71 !MO.isReg() && !MO.isImm()) {
75 switch (MO.getType()) {
76 case MachineOperand::MO_Register:
77 O << "%" << LowercaseString(getRegisterName(MO.getReg()));
80 case MachineOperand::MO_Immediate:
81 O << (int)MO.getImm();
83 case MachineOperand::MO_MachineBasicBlock:
84 O << *MO.getMBB()->getSymbol(OutContext);
86 case MachineOperand::MO_GlobalAddress:
87 O << *GetGlobalValueSymbol(MO.getGlobal());
89 case MachineOperand::MO_ExternalSymbol:
90 O << MO.getSymbolName();
92 case MachineOperand::MO_ConstantPoolIndex:
93 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
97 llvm_unreachable("<unknown operand type>");
99 if (CloseParen) O << ")";
102 void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
103 const char *Modifier) {
104 printOperand(MI, opNum);
106 // If this is an ADD operand, emit it like normal operands.
107 if (Modifier && !strcmp(Modifier, "arith")) {
109 printOperand(MI, opNum+1);
113 if (MI->getOperand(opNum+1).isReg() &&
114 MI->getOperand(opNum+1).getReg() == SP::G0)
115 return; // don't print "+%g0"
116 if (MI->getOperand(opNum+1).isImm() &&
117 MI->getOperand(opNum+1).getImm() == 0)
118 return; // don't print "+0"
121 if (MI->getOperand(opNum+1).isGlobal() ||
122 MI->getOperand(opNum+1).isCPI()) {
124 printOperand(MI, opNum+1);
127 printOperand(MI, opNum+1);
131 bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum) {
132 std::string operand = "";
133 const MachineOperand &MO = MI->getOperand(opNum);
134 switch (MO.getType()) {
135 default: assert(0 && "Operand is not a register ");
136 case MachineOperand::MO_Register:
137 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
138 "Operand is not a physical register ");
139 operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
143 unsigned bbNum = MI->getParent()->getNumber();
145 O << '\n' << ".LLGETPCH" << bbNum << ":\n";
146 O << "\tcall\t.LLGETPC" << bbNum << '\n' ;
149 << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << bbNum << ")), "
152 O << ".LLGETPC" << bbNum << ":\n" ;
153 O << "\tor\t" << operand
154 << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << bbNum << ")), "
156 O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
161 void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
162 int CC = (int)MI->getOperand(opNum).getImm();
163 O << SPARCCondCodeToString((SPCC::CondCodes)CC);
166 /// PrintAsmOperand - Print out an operand for an inline asm expression.
168 bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
170 const char *ExtraCode) {
171 if (ExtraCode && ExtraCode[0]) {
172 if (ExtraCode[1] != 0) return true; // Unknown modifier.
174 switch (ExtraCode[0]) {
175 default: return true; // Unknown modifier.
181 printOperand(MI, OpNo);
186 bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
189 const char *ExtraCode) {
190 if (ExtraCode && ExtraCode[0])
191 return true; // Unknown modifier
194 printMemOperand(MI, OpNo);
200 // Force static initialization.
201 extern "C" void LLVMInitializeSparcAsmPrinter() {
202 RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
203 RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);