1 Target Independent Opportunities:
3 //===---------------------------------------------------------------------===//
5 With the recent changes to make the implicit def/use set explicit in
6 machineinstrs, we should change the target descriptions for 'call' instructions
7 so that the .td files don't list all the call-clobbered registers as implicit
8 defs. Instead, these should be added by the code generator (e.g. on the dag).
10 This has a number of uses:
12 1. PPC32/64 and X86 32/64 can avoid having multiple copies of call instructions
13 for their different impdef sets.
14 2. Targets with multiple calling convs (e.g. x86) which have different clobber
15 sets don't need copies of call instructions.
16 3. 'Interprocedural register allocation' can be done to reduce the clobber sets
19 //===---------------------------------------------------------------------===//
21 We should recognized various "overflow detection" idioms and translate them into
22 llvm.uadd.with.overflow and similar intrinsics. Here is a multiply idiom:
24 unsigned int mul(unsigned int a,unsigned int b) {
25 if ((unsigned long long)a*b>0xffffffff)
30 The legalization code for mul-with-overflow needs to be made more robust before
31 this can be implemented though.
33 //===---------------------------------------------------------------------===//
35 Get the C front-end to expand hypot(x,y) -> llvm.sqrt(x*x+y*y) when errno and
36 precision don't matter (ffastmath). Misc/mandel will like this. :) This isn't
37 safe in general, even on darwin. See the libm implementation of hypot for
38 examples (which special case when x/y are exactly zero to get signed zeros etc
41 //===---------------------------------------------------------------------===//
43 On targets with expensive 64-bit multiply, we could LSR this:
50 for (i = ...; ++i, tmp+=tmp)
53 This would be a win on ppc32, but not x86 or ppc64.
55 //===---------------------------------------------------------------------===//
57 Shrink: (setlt (loadi32 P), 0) -> (setlt (loadi8 Phi), 0)
59 //===---------------------------------------------------------------------===//
61 Reassociate should turn things like:
63 int factorial(int X) {
64 return X*X*X*X*X*X*X*X;
67 into llvm.powi calls, allowing the code generator to produce balanced
70 First, the intrinsic needs to be extended to support integers, and second the
71 code generator needs to be enhanced to lower these to multiplication trees.
73 //===---------------------------------------------------------------------===//
75 Interesting? testcase for add/shift/mul reassoc:
77 int bar(int x, int y) {
78 return x*x*x+y+x*x*x*x*x*y*y*y*y;
80 int foo(int z, int n) {
81 return bar(z, n) + bar(2*z, 2*n);
84 This is blocked on not handling X*X*X -> powi(X, 3) (see note above). The issue
85 is that we end up getting t = 2*X s = t*t and don't turn this into 4*X*X,
86 which is the same number of multiplies and is canonical, because the 2*X has
87 multiple uses. Here's a simple example:
89 define i32 @test15(i32 %X1) {
90 %B = mul i32 %X1, 47 ; X1*47
96 //===---------------------------------------------------------------------===//
98 Reassociate should handle the example in GCC PR16157:
100 extern int a0, a1, a2, a3, a4; extern int b0, b1, b2, b3, b4;
101 void f () { /* this can be optimized to four additions... */
102 b4 = a4 + a3 + a2 + a1 + a0;
103 b3 = a3 + a2 + a1 + a0;
108 This requires reassociating to forms of expressions that are already available,
109 something that reassoc doesn't think about yet.
112 //===---------------------------------------------------------------------===//
114 This function: (derived from GCC PR19988)
115 double foo(double x, double y) {
116 return ((x + 0.1234 * y) * (x + -0.1234 * y));
122 mulsd LCPI1_1(%rip), %xmm1
123 mulsd LCPI1_0(%rip), %xmm2
130 Reassociate should be able to turn it into:
132 double foo(double x, double y) {
133 return ((x + 0.1234 * y) * (x - 0.1234 * y));
136 Which allows the multiply by constant to be CSE'd, producing:
139 mulsd LCPI1_0(%rip), %xmm1
146 This doesn't need -ffast-math support at all. This is particularly bad because
147 the llvm-gcc frontend is canonicalizing the later into the former, but clang
148 doesn't have this problem.
150 //===---------------------------------------------------------------------===//
152 These two functions should generate the same code on big-endian systems:
154 int g(int *j,int *l) { return memcmp(j,l,4); }
155 int h(int *j, int *l) { return *j - *l; }
157 this could be done in SelectionDAGISel.cpp, along with other special cases,
160 //===---------------------------------------------------------------------===//
162 It would be nice to revert this patch:
163 http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20060213/031986.html
165 And teach the dag combiner enough to simplify the code expanded before
166 legalize. It seems plausible that this knowledge would let it simplify other
169 //===---------------------------------------------------------------------===//
171 For vector types, TargetData.cpp::getTypeInfo() returns alignment that is equal
172 to the type size. It works but can be overly conservative as the alignment of
173 specific vector types are target dependent.
175 //===---------------------------------------------------------------------===//
177 We should produce an unaligned load from code like this:
179 v4sf example(float *P) {
180 return (v4sf){P[0], P[1], P[2], P[3] };
183 //===---------------------------------------------------------------------===//
185 Add support for conditional increments, and other related patterns. Instead
190 je LBB16_2 #cond_next
201 //===---------------------------------------------------------------------===//
203 Combine: a = sin(x), b = cos(x) into a,b = sincos(x).
205 Expand these to calls of sin/cos and stores:
206 double sincos(double x, double *sin, double *cos);
207 float sincosf(float x, float *sin, float *cos);
208 long double sincosl(long double x, long double *sin, long double *cos);
210 Doing so could allow SROA of the destination pointers. See also:
211 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17687
213 This is now easily doable with MRVs. We could even make an intrinsic for this
214 if anyone cared enough about sincos.
216 //===---------------------------------------------------------------------===//
218 quantum_sigma_x in 462.libquantum contains the following loop:
220 for(i=0; i<reg->size; i++)
222 /* Flip the target bit of each basis state */
223 reg->node[i].state ^= ((MAX_UNSIGNED) 1 << target);
226 Where MAX_UNSIGNED/state is a 64-bit int. On a 32-bit platform it would be just
227 so cool to turn it into something like:
229 long long Res = ((MAX_UNSIGNED) 1 << target);
231 for(i=0; i<reg->size; i++)
232 reg->node[i].state ^= Res & 0xFFFFFFFFULL;
234 for(i=0; i<reg->size; i++)
235 reg->node[i].state ^= Res & 0xFFFFFFFF00000000ULL
238 ... which would only do one 32-bit XOR per loop iteration instead of two.
240 It would also be nice to recognize the reg->size doesn't alias reg->node[i], but
243 //===---------------------------------------------------------------------===//
245 This isn't recognized as bswap by instcombine (yes, it really is bswap):
247 unsigned long reverse(unsigned v) {
249 t = v ^ ((v << 16) | (v >> 16));
251 v = (v << 24) | (v >> 8);
255 //===---------------------------------------------------------------------===//
259 These idioms should be recognized as popcount (see PR1488):
261 unsigned countbits_slow(unsigned v) {
263 for (c = 0; v; v >>= 1)
267 unsigned countbits_fast(unsigned v){
270 v &= v - 1; // clear the least significant bit set
274 BITBOARD = unsigned long long
275 int PopCnt(register BITBOARD a) {
283 unsigned int popcount(unsigned int input) {
284 unsigned int count = 0;
285 for (unsigned int i = 0; i < 4 * 8; i++)
286 count += (input >> i) & i;
290 This sort of thing should be added to the loop idiom pass.
292 //===---------------------------------------------------------------------===//
294 These should turn into single 16-bit (unaligned?) loads on little/big endian
297 unsigned short read_16_le(const unsigned char *adr) {
298 return adr[0] | (adr[1] << 8);
300 unsigned short read_16_be(const unsigned char *adr) {
301 return (adr[0] << 8) | adr[1];
304 //===---------------------------------------------------------------------===//
306 -instcombine should handle this transform:
307 icmp pred (sdiv X / C1 ), C2
308 when X, C1, and C2 are unsigned. Similarly for udiv and signed operands.
310 Currently InstCombine avoids this transform but will do it when the signs of
311 the operands and the sign of the divide match. See the FIXME in
312 InstructionCombining.cpp in the visitSetCondInst method after the switch case
313 for Instruction::UDiv (around line 4447) for more details.
315 The SingleSource/Benchmarks/Shootout-C++/hash and hash2 tests have examples of
318 //===---------------------------------------------------------------------===//
322 SingleSource/Benchmarks/Misc/dt.c shows several interesting optimization
323 opportunities in its double_array_divs_variable function: it needs loop
324 interchange, memory promotion (which LICM already does), vectorization and
325 variable trip count loop unrolling (since it has a constant trip count). ICC
326 apparently produces this very nice code with -ffast-math:
328 ..B1.70: # Preds ..B1.70 ..B1.69
329 mulpd %xmm0, %xmm1 #108.2
330 mulpd %xmm0, %xmm1 #108.2
331 mulpd %xmm0, %xmm1 #108.2
332 mulpd %xmm0, %xmm1 #108.2
334 cmpl $131072, %edx #108.2
335 jb ..B1.70 # Prob 99% #108.2
337 It would be better to count down to zero, but this is a lot better than what we
340 //===---------------------------------------------------------------------===//
344 typedef unsigned U32;
345 typedef unsigned long long U64;
346 int test (U32 *inst, U64 *regs) {
349 int r1 = (temp >> 20) & 0xf;
350 int b2 = (temp >> 16) & 0xf;
351 effective_addr2 = temp & 0xfff;
352 if (b2) effective_addr2 += regs[b2];
353 b2 = (temp >> 12) & 0xf;
354 if (b2) effective_addr2 += regs[b2];
355 effective_addr2 &= regs[4];
356 if ((effective_addr2 & 3) == 0)
361 Note that only the low 2 bits of effective_addr2 are used. On 32-bit systems,
362 we don't eliminate the computation of the top half of effective_addr2 because
363 we don't have whole-function selection dags. On x86, this means we use one
364 extra register for the function when effective_addr2 is declared as U64 than
365 when it is declared U32.
367 PHI Slicing could be extended to do this.
369 //===---------------------------------------------------------------------===//
371 LSR should know what GPR types a target has from TargetData. This code:
373 volatile short X, Y; // globals
377 for (i = 0; i < N; i++) { X = i; Y = i*4; }
380 produces two near identical IV's (after promotion) on PPC/ARM:
390 add r2, r2, #1 <- [0,+,1]
391 sub r0, r0, #1 <- [0,-,1]
395 LSR should reuse the "+" IV for the exit test.
397 //===---------------------------------------------------------------------===//
399 Tail call elim should be more aggressive, checking to see if the call is
400 followed by an uncond branch to an exit block.
402 ; This testcase is due to tail-duplication not wanting to copy the return
403 ; instruction into the terminating blocks because there was other code
404 ; optimized out of the function after the taildup happened.
405 ; RUN: llvm-as < %s | opt -tailcallelim | llvm-dis | not grep call
407 define i32 @t4(i32 %a) {
409 %tmp.1 = and i32 %a, 1 ; <i32> [#uses=1]
410 %tmp.2 = icmp ne i32 %tmp.1, 0 ; <i1> [#uses=1]
411 br i1 %tmp.2, label %then.0, label %else.0
413 then.0: ; preds = %entry
414 %tmp.5 = add i32 %a, -1 ; <i32> [#uses=1]
415 %tmp.3 = call i32 @t4( i32 %tmp.5 ) ; <i32> [#uses=1]
418 else.0: ; preds = %entry
419 %tmp.7 = icmp ne i32 %a, 0 ; <i1> [#uses=1]
420 br i1 %tmp.7, label %then.1, label %return
422 then.1: ; preds = %else.0
423 %tmp.11 = add i32 %a, -2 ; <i32> [#uses=1]
424 %tmp.9 = call i32 @t4( i32 %tmp.11 ) ; <i32> [#uses=1]
427 return: ; preds = %then.1, %else.0, %then.0
428 %result.0 = phi i32 [ 0, %else.0 ], [ %tmp.3, %then.0 ],
433 //===---------------------------------------------------------------------===//
435 Tail recursion elimination should handle:
440 return 2 * pow2m1 (n - 1) + 1;
443 Also, multiplies can be turned into SHL's, so they should be handled as if
444 they were associative. "return foo() << 1" can be tail recursion eliminated.
446 //===---------------------------------------------------------------------===//
448 Argument promotion should promote arguments for recursive functions, like
451 ; RUN: llvm-as < %s | opt -argpromotion | llvm-dis | grep x.val
453 define internal i32 @foo(i32* %x) {
455 %tmp = load i32* %x ; <i32> [#uses=0]
456 %tmp.foo = call i32 @foo( i32* %x ) ; <i32> [#uses=1]
460 define i32 @bar(i32* %x) {
462 %tmp3 = call i32 @foo( i32* %x ) ; <i32> [#uses=1]
466 //===---------------------------------------------------------------------===//
468 We should investigate an instruction sinking pass. Consider this silly
484 je LBB1_2 # cond_true
492 The PIC base computation (call+popl) is only used on one path through the
493 code, but is currently always computed in the entry block. It would be
494 better to sink the picbase computation down into the block for the
495 assertion, as it is the only one that uses it. This happens for a lot of
496 code with early outs.
498 Another example is loads of arguments, which are usually emitted into the
499 entry block on targets like x86. If not used in all paths through a
500 function, they should be sunk into the ones that do.
502 In this case, whole-function-isel would also handle this.
504 //===---------------------------------------------------------------------===//
506 Investigate lowering of sparse switch statements into perfect hash tables:
507 http://burtleburtle.net/bob/hash/perfect.html
509 //===---------------------------------------------------------------------===//
511 We should turn things like "load+fabs+store" and "load+fneg+store" into the
512 corresponding integer operations. On a yonah, this loop:
517 for (b = 0; b < 10000000; b++)
518 for (i = 0; i < 256; i++)
522 is twice as slow as this loop:
527 for (b = 0; b < 10000000; b++)
528 for (i = 0; i < 256; i++)
529 a[i] ^= (1ULL << 63);
532 and I suspect other processors are similar. On X86 in particular this is a
533 big win because doing this with integers allows the use of read/modify/write
536 //===---------------------------------------------------------------------===//
538 DAG Combiner should try to combine small loads into larger loads when
539 profitable. For example, we compile this C++ example:
541 struct THotKey { short Key; bool Control; bool Shift; bool Alt; };
542 extern THotKey m_HotKey;
543 THotKey GetHotKey () { return m_HotKey; }
545 into (-m64 -O3 -fno-exceptions -static -fomit-frame-pointer):
547 __Z9GetHotKeyv: ## @_Z9GetHotKeyv
548 movq _m_HotKey@GOTPCREL(%rip), %rax
561 //===---------------------------------------------------------------------===//
563 We should add an FRINT node to the DAG to model targets that have legal
564 implementations of ceil/floor/rint.
566 //===---------------------------------------------------------------------===//
571 long long input[8] = {1,0,1,0,1,0,1,0};
575 Clang compiles this into:
577 call void @llvm.memset.p0i8.i64(i8* %tmp, i8 0, i64 64, i32 16, i1 false)
578 %0 = getelementptr [8 x i64]* %input, i64 0, i64 0
579 store i64 1, i64* %0, align 16
580 %1 = getelementptr [8 x i64]* %input, i64 0, i64 2
581 store i64 1, i64* %1, align 16
582 %2 = getelementptr [8 x i64]* %input, i64 0, i64 4
583 store i64 1, i64* %2, align 16
584 %3 = getelementptr [8 x i64]* %input, i64 0, i64 6
585 store i64 1, i64* %3, align 16
587 Which gets codegen'd into:
590 movaps %xmm0, -16(%rbp)
591 movaps %xmm0, -32(%rbp)
592 movaps %xmm0, -48(%rbp)
593 movaps %xmm0, -64(%rbp)
599 It would be better to have 4 movq's of 0 instead of the movaps's.
601 //===---------------------------------------------------------------------===//
603 http://llvm.org/PR717:
605 The following code should compile into "ret int undef". Instead, LLVM
606 produces "ret int 0":
615 //===---------------------------------------------------------------------===//
617 The loop unroller should partially unroll loops (instead of peeling them)
618 when code growth isn't too bad and when an unroll count allows simplification
619 of some code within the loop. One trivial example is:
625 for ( nLoop = 0; nLoop < 1000; nLoop++ ) {
634 Unrolling by 2 would eliminate the '&1' in both copies, leading to a net
635 reduction in code size. The resultant code would then also be suitable for
636 exit value computation.
638 //===---------------------------------------------------------------------===//
640 We miss a bunch of rotate opportunities on various targets, including ppc, x86,
641 etc. On X86, we miss a bunch of 'rotate by variable' cases because the rotate
642 matching code in dag combine doesn't look through truncates aggressively
643 enough. Here are some testcases reduces from GCC PR17886:
645 unsigned long long f5(unsigned long long x, unsigned long long y) {
646 return (x << 8) | ((y >> 48) & 0xffull);
648 unsigned long long f6(unsigned long long x, unsigned long long y, int z) {
651 return (x << 8) | ((y >> 48) & 0xffull);
653 return (x << 16) | ((y >> 40) & 0xffffull);
655 return (x << 24) | ((y >> 32) & 0xffffffull);
657 return (x << 32) | ((y >> 24) & 0xffffffffull);
659 return (x << 40) | ((y >> 16) & 0xffffffffffull);
663 //===---------------------------------------------------------------------===//
665 This (and similar related idioms):
667 unsigned int foo(unsigned char i) {
668 return i | (i<<8) | (i<<16) | (i<<24);
673 define i32 @foo(i8 zeroext %i) nounwind readnone ssp noredzone {
675 %conv = zext i8 %i to i32
676 %shl = shl i32 %conv, 8
677 %shl5 = shl i32 %conv, 16
678 %shl9 = shl i32 %conv, 24
679 %or = or i32 %shl9, %conv
680 %or6 = or i32 %or, %shl5
681 %or10 = or i32 %or6, %shl
685 it would be better as:
687 unsigned int bar(unsigned char i) {
688 unsigned int j=i | (i << 8);
694 define i32 @bar(i8 zeroext %i) nounwind readnone ssp noredzone {
696 %conv = zext i8 %i to i32
697 %shl = shl i32 %conv, 8
698 %or = or i32 %shl, %conv
699 %shl5 = shl i32 %or, 16
700 %or6 = or i32 %shl5, %or
704 or even i*0x01010101, depending on the speed of the multiplier. The best way to
705 handle this is to canonicalize it to a multiply in IR and have codegen handle
706 lowering multiplies to shifts on cpus where shifts are faster.
708 //===---------------------------------------------------------------------===//
710 We do a number of simplifications in simplify libcalls to strength reduce
711 standard library functions, but we don't currently merge them together. For
712 example, it is useful to merge memcpy(a,b,strlen(b)) -> strcpy. This can only
713 be done safely if "b" isn't modified between the strlen and memcpy of course.
715 //===---------------------------------------------------------------------===//
717 We compile this program: (from GCC PR11680)
718 http://gcc.gnu.org/bugzilla/attachment.cgi?id=4487
720 Into code that runs the same speed in fast/slow modes, but both modes run 2x
721 slower than when compile with GCC (either 4.0 or 4.2):
723 $ llvm-g++ perf.cpp -O3 -fno-exceptions
725 1.821u 0.003s 0:01.82 100.0% 0+0k 0+0io 0pf+0w
727 $ g++ perf.cpp -O3 -fno-exceptions
729 0.821u 0.001s 0:00.82 100.0% 0+0k 0+0io 0pf+0w
731 It looks like we are making the same inlining decisions, so this may be raw
732 codegen badness or something else (haven't investigated).
734 //===---------------------------------------------------------------------===//
736 Divisibility by constant can be simplified (according to GCC PR12849) from
737 being a mulhi to being a mul lo (cheaper). Testcase:
739 void bar(unsigned n) {
744 This is equivalent to the following, where 2863311531 is the multiplicative
745 inverse of 3, and 1431655766 is ((2^32)-1)/3+1:
746 void bar(unsigned n) {
747 if (n * 2863311531U < 1431655766U)
751 The same transformation can work with an even modulo with the addition of a
752 rotate: rotate the result of the multiply to the right by the number of bits
753 which need to be zero for the condition to be true, and shrink the compare RHS
754 by the same amount. Unless the target supports rotates, though, that
755 transformation probably isn't worthwhile.
757 The transformation can also easily be made to work with non-zero equality
758 comparisons: just transform, for example, "n % 3 == 1" to "(n-1) % 3 == 0".
760 //===---------------------------------------------------------------------===//
762 Better mod/ref analysis for scanf would allow us to eliminate the vtable and a
763 bunch of other stuff from this example (see PR1604):
773 std::scanf("%d", &t.val);
774 std::printf("%d\n", t.val);
777 //===---------------------------------------------------------------------===//
779 These functions perform the same computation, but produce different assembly.
781 define i8 @select(i8 %x) readnone nounwind {
782 %A = icmp ult i8 %x, 250
783 %B = select i1 %A, i8 0, i8 1
787 define i8 @addshr(i8 %x) readnone nounwind {
788 %A = zext i8 %x to i9
789 %B = add i9 %A, 6 ;; 256 - 250 == 6
791 %D = trunc i9 %C to i8
795 //===---------------------------------------------------------------------===//
799 f (unsigned long a, unsigned long b, unsigned long c)
801 return ((a & (c - 1)) != 0) || ((b & (c - 1)) != 0);
804 f (unsigned long a, unsigned long b, unsigned long c)
806 return ((a & (c - 1)) != 0) | ((b & (c - 1)) != 0);
808 Both should combine to ((a|b) & (c-1)) != 0. Currently not optimized with
809 "clang -emit-llvm-bc | opt -std-compile-opts".
811 //===---------------------------------------------------------------------===//
814 #define PMD_MASK (~((1UL << 23) - 1))
815 void clear_pmd_range(unsigned long start, unsigned long end)
817 if (!(start & ~PMD_MASK) && !(end & ~PMD_MASK))
820 The expression should optimize to something like
821 "!((start|end)&~PMD_MASK). Currently not optimized with "clang
822 -emit-llvm-bc | opt -std-compile-opts".
824 //===---------------------------------------------------------------------===//
826 unsigned int f(unsigned int i, unsigned int n) {++i; if (i == n) ++i; return
828 unsigned int f2(unsigned int i, unsigned int n) {++i; i += i == n; return i;}
829 These should combine to the same thing. Currently, the first function
830 produces better code on X86.
832 //===---------------------------------------------------------------------===//
835 #define abs(x) x>0?x:-x
838 return (abs(x)) >= 0;
840 This should optimize to x == INT_MIN. (With -fwrapv.) Currently not
841 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
843 //===---------------------------------------------------------------------===//
847 rotate_cst (unsigned int a)
849 a = (a << 10) | (a >> 22);
854 minus_cst (unsigned int a)
863 mask_gt (unsigned int a)
865 /* This is equivalent to a > 15. */
870 rshift_gt (unsigned int a)
872 /* This is equivalent to a > 23. */
877 void neg_eq_cst(unsigned int a) {
882 All should simplify to a single comparison. All of these are
883 currently not optimized with "clang -emit-llvm-bc | opt
886 //===---------------------------------------------------------------------===//
889 int c(int* x) {return (char*)x+2 == (char*)x;}
890 Should combine to 0. Currently not optimized with "clang
891 -emit-llvm-bc | opt -std-compile-opts" (although llc can optimize it).
893 //===---------------------------------------------------------------------===//
895 int a(unsigned b) {return ((b << 31) | (b << 30)) >> 31;}
896 Should be combined to "((b >> 1) | b) & 1". Currently not optimized
897 with "clang -emit-llvm-bc | opt -std-compile-opts".
899 //===---------------------------------------------------------------------===//
901 unsigned a(unsigned x, unsigned y) { return x | (y & 1) | (y & 2);}
902 Should combine to "x | (y & 3)". Currently not optimized with "clang
903 -emit-llvm-bc | opt -std-compile-opts".
905 //===---------------------------------------------------------------------===//
907 int a(int a, int b, int c) {return (~a & c) | ((c|a) & b);}
908 Should fold to "(~a & c) | (a & b)". Currently not optimized with
909 "clang -emit-llvm-bc | opt -std-compile-opts".
911 //===---------------------------------------------------------------------===//
913 int a(int a,int b) {return (~(a|b))|a;}
914 Should fold to "a|~b". Currently not optimized with "clang
915 -emit-llvm-bc | opt -std-compile-opts".
917 //===---------------------------------------------------------------------===//
919 int a(int a, int b) {return (a&&b) || (a&&!b);}
920 Should fold to "a". Currently not optimized with "clang -emit-llvm-bc
921 | opt -std-compile-opts".
923 //===---------------------------------------------------------------------===//
925 int a(int a, int b, int c) {return (a&&b) || (!a&&c);}
926 Should fold to "a ? b : c", or at least something sane. Currently not
927 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
929 //===---------------------------------------------------------------------===//
931 int a(int a, int b, int c) {return (a&&b) || (a&&c) || (a&&b&&c);}
932 Should fold to a && (b || c). Currently not optimized with "clang
933 -emit-llvm-bc | opt -std-compile-opts".
935 //===---------------------------------------------------------------------===//
937 int a(int x) {return x | ((x & 8) ^ 8);}
938 Should combine to x | 8. Currently not optimized with "clang
939 -emit-llvm-bc | opt -std-compile-opts".
941 //===---------------------------------------------------------------------===//
943 int a(int x) {return x ^ ((x & 8) ^ 8);}
944 Should also combine to x | 8. Currently not optimized with "clang
945 -emit-llvm-bc | opt -std-compile-opts".
947 //===---------------------------------------------------------------------===//
949 int a(int x) {return ((x | -9) ^ 8) & x;}
950 Should combine to x & -9. Currently not optimized with "clang
951 -emit-llvm-bc | opt -std-compile-opts".
953 //===---------------------------------------------------------------------===//
955 unsigned a(unsigned a) {return a * 0x11111111 >> 28 & 1;}
956 Should combine to "a * 0x88888888 >> 31". Currently not optimized
957 with "clang -emit-llvm-bc | opt -std-compile-opts".
959 //===---------------------------------------------------------------------===//
961 unsigned a(char* x) {if ((*x & 32) == 0) return b();}
962 There's an unnecessary zext in the generated code with "clang
963 -emit-llvm-bc | opt -std-compile-opts".
965 //===---------------------------------------------------------------------===//
967 unsigned a(unsigned long long x) {return 40 * (x >> 1);}
968 Should combine to "20 * (((unsigned)x) & -2)". Currently not
969 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
971 //===---------------------------------------------------------------------===//
973 This was noticed in the entryblock for grokdeclarator in 403.gcc:
975 %tmp = icmp eq i32 %decl_context, 4
976 %decl_context_addr.0 = select i1 %tmp, i32 3, i32 %decl_context
977 %tmp1 = icmp eq i32 %decl_context_addr.0, 1
978 %decl_context_addr.1 = select i1 %tmp1, i32 0, i32 %decl_context_addr.0
980 tmp1 should be simplified to something like:
981 (!tmp || decl_context == 1)
983 This allows recursive simplifications, tmp1 is used all over the place in
984 the function, e.g. by:
986 %tmp23 = icmp eq i32 %decl_context_addr.1, 0 ; <i1> [#uses=1]
987 %tmp24 = xor i1 %tmp1, true ; <i1> [#uses=1]
988 %or.cond8 = and i1 %tmp23, %tmp24 ; <i1> [#uses=1]
992 //===---------------------------------------------------------------------===//
996 Store sinking: This code:
998 void f (int n, int *cond, int *res) {
1001 for (i = 0; i < n; i++)
1003 *res ^= 234; /* (*) */
1006 On this function GVN hoists the fully redundant value of *res, but nothing
1007 moves the store out. This gives us this code:
1009 bb: ; preds = %bb2, %entry
1010 %.rle = phi i32 [ 0, %entry ], [ %.rle6, %bb2 ]
1011 %i.05 = phi i32 [ 0, %entry ], [ %indvar.next, %bb2 ]
1012 %1 = load i32* %cond, align 4
1013 %2 = icmp eq i32 %1, 0
1014 br i1 %2, label %bb2, label %bb1
1017 %3 = xor i32 %.rle, 234
1018 store i32 %3, i32* %res, align 4
1021 bb2: ; preds = %bb, %bb1
1022 %.rle6 = phi i32 [ %3, %bb1 ], [ %.rle, %bb ]
1023 %indvar.next = add i32 %i.05, 1
1024 %exitcond = icmp eq i32 %indvar.next, %n
1025 br i1 %exitcond, label %return, label %bb
1027 DSE should sink partially dead stores to get the store out of the loop.
1029 Here's another partial dead case:
1030 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12395
1032 //===---------------------------------------------------------------------===//
1034 Scalar PRE hoists the mul in the common block up to the else:
1036 int test (int a, int b, int c, int g) {
1046 It would be better to do the mul once to reduce codesize above the if.
1047 This is GCC PR38204.
1050 //===---------------------------------------------------------------------===//
1051 This simple function from 179.art:
1054 struct { double y; int reset; } *Y;
1059 for (i=0;i<numf2s;i++)
1060 if (Y[i].y > Y[winner].y)
1064 Compiles into (with clang TBAA):
1066 for.body: ; preds = %for.inc, %bb.nph
1067 %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.inc ]
1068 %i.01718 = phi i32 [ 0, %bb.nph ], [ %i.01719, %for.inc ]
1069 %tmp4 = getelementptr inbounds %struct.anon* %tmp3, i64 %indvar, i32 0
1070 %tmp5 = load double* %tmp4, align 8, !tbaa !4
1071 %idxprom7 = sext i32 %i.01718 to i64
1072 %tmp10 = getelementptr inbounds %struct.anon* %tmp3, i64 %idxprom7, i32 0
1073 %tmp11 = load double* %tmp10, align 8, !tbaa !4
1074 %cmp12 = fcmp ogt double %tmp5, %tmp11
1075 br i1 %cmp12, label %if.then, label %for.inc
1077 if.then: ; preds = %for.body
1078 %i.017 = trunc i64 %indvar to i32
1081 for.inc: ; preds = %for.body, %if.then
1082 %i.01719 = phi i32 [ %i.01718, %for.body ], [ %i.017, %if.then ]
1083 %indvar.next = add i64 %indvar, 1
1084 %exitcond = icmp eq i64 %indvar.next, %tmp22
1085 br i1 %exitcond, label %for.cond.for.end_crit_edge, label %for.body
1088 It is good that we hoisted the reloads of numf2's, and Y out of the loop and
1089 sunk the store to winner out.
1091 However, this is awful on several levels: the conditional truncate in the loop
1092 (-indvars at fault? why can't we completely promote the IV to i64?).
1094 Beyond that, we have a partially redundant load in the loop: if "winner" (aka
1095 %i.01718) isn't updated, we reload Y[winner].y the next time through the loop.
1096 Similarly, the addressing that feeds it (including the sext) is redundant. In
1097 the end we get this generated assembly:
1099 LBB0_2: ## %for.body
1100 ## =>This Inner Loop Header: Depth=1
1104 ucomisd (%rcx,%r8), %xmm0
1113 All things considered this isn't too bad, but we shouldn't need the movslq or
1114 the shlq instruction, or the load folded into ucomisd every time through the
1117 On an x86-specific topic, if the loop can't be restructure, the movl should be a
1120 //===---------------------------------------------------------------------===//
1124 GCC PR37810 is an interesting case where we should sink load/store reload
1125 into the if block and outside the loop, so we don't reload/store it on the
1146 We now hoist the reload after the call (Transforms/GVN/lpre-call-wrap.ll), but
1147 we don't sink the store. We need partially dead store sinking.
1149 //===---------------------------------------------------------------------===//
1151 [LOAD PRE CRIT EDGE SPLITTING]
1153 GCC PR37166: Sinking of loads prevents SROA'ing the "g" struct on the stack
1154 leading to excess stack traffic. This could be handled by GVN with some crazy
1155 symbolic phi translation. The code we get looks like (g is on the stack):
1159 %9 = getelementptr %struct.f* %g, i32 0, i32 0
1160 store i32 %8, i32* %9, align bel %bb3
1162 bb3: ; preds = %bb1, %bb2, %bb
1163 %c_addr.0 = phi %struct.f* [ %g, %bb2 ], [ %c, %bb ], [ %c, %bb1 ]
1164 %b_addr.0 = phi %struct.f* [ %b, %bb2 ], [ %g, %bb ], [ %b, %bb1 ]
1165 %10 = getelementptr %struct.f* %c_addr.0, i32 0, i32 0
1166 %11 = load i32* %10, align 4
1168 %11 is partially redundant, an in BB2 it should have the value %8.
1170 GCC PR33344 and PR35287 are similar cases.
1173 //===---------------------------------------------------------------------===//
1177 There are many load PRE testcases in testsuite/gcc.dg/tree-ssa/loadpre* in the
1178 GCC testsuite, ones we don't get yet are (checked through loadpre25):
1180 [CRIT EDGE BREAKING]
1181 loadpre3.c predcom-4.c
1183 [PRE OF READONLY CALL]
1186 [TURN SELECT INTO BRANCH]
1187 loadpre14.c loadpre15.c
1189 actually a conditional increment: loadpre18.c loadpre19.c
1191 //===---------------------------------------------------------------------===//
1193 [LOAD PRE / STORE SINKING / SPEC HACK]
1195 This is a chunk of code from 456.hmmer:
1197 int f(int M, int *mc, int *mpp, int *tpmm, int *ip, int *tpim, int *dpp,
1198 int *tpdm, int xmb, int *bp, int *ms) {
1200 for (k = 1; k <= M; k++) {
1201 mc[k] = mpp[k-1] + tpmm[k-1];
1202 if ((sc = ip[k-1] + tpim[k-1]) > mc[k]) mc[k] = sc;
1203 if ((sc = dpp[k-1] + tpdm[k-1]) > mc[k]) mc[k] = sc;
1204 if ((sc = xmb + bp[k]) > mc[k]) mc[k] = sc;
1209 It is very profitable for this benchmark to turn the conditional stores to mc[k]
1210 into a conditional move (select instr in IR) and allow the final store to do the
1211 store. See GCC PR27313 for more details. Note that this is valid to xform even
1212 with the new C++ memory model, since mc[k] is previously loaded and later
1215 //===---------------------------------------------------------------------===//
1218 There are many PRE testcases in testsuite/gcc.dg/tree-ssa/ssa-pre-*.c in the
1221 //===---------------------------------------------------------------------===//
1223 There are some interesting cases in testsuite/gcc.dg/tree-ssa/pred-comm* in the
1224 GCC testsuite. For example, we get the first example in predcom-1.c, but
1225 miss the second one:
1230 __attribute__ ((noinline))
1231 void count_averages(int n) {
1233 for (i = 1; i < n; i++)
1234 avg[i] = (((unsigned long) fib[i - 1] + fib[i] + fib[i + 1]) / 3) & 0xffff;
1237 which compiles into two loads instead of one in the loop.
1239 predcom-2.c is the same as predcom-1.c
1241 predcom-3.c is very similar but needs loads feeding each other instead of
1245 //===---------------------------------------------------------------------===//
1249 Type based alias analysis:
1250 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14705
1252 We should do better analysis of posix_memalign. At the least it should
1253 no-capture its pointer argument, at best, we should know that the out-value
1254 result doesn't point to anything (like malloc). One example of this is in
1255 SingleSource/Benchmarks/Misc/dt.c
1257 //===---------------------------------------------------------------------===//
1259 Interesting missed case because of control flow flattening (should be 2 loads):
1260 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=26629
1261 With: llvm-gcc t2.c -S -o - -O0 -emit-llvm | llvm-as |
1262 opt -mem2reg -gvn -instcombine | llvm-dis
1263 we miss it because we need 1) CRIT EDGE 2) MULTIPLE DIFFERENT
1264 VALS PRODUCED BY ONE BLOCK OVER DIFFERENT PATHS
1266 //===---------------------------------------------------------------------===//
1268 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19633
1269 We could eliminate the branch condition here, loading from null is undefined:
1271 struct S { int w, x, y, z; };
1272 struct T { int r; struct S s; };
1273 void bar (struct S, int);
1274 void foo (int a, struct T b)
1282 //===---------------------------------------------------------------------===//
1284 simplifylibcalls should do several optimizations for strspn/strcspn:
1286 strcspn(x, "a") -> inlined loop for up to 3 letters (similarly for strspn):
1288 size_t __strcspn_c3 (__const char *__s, int __reject1, int __reject2,
1290 register size_t __result = 0;
1291 while (__s[__result] != '\0' && __s[__result] != __reject1 &&
1292 __s[__result] != __reject2 && __s[__result] != __reject3)
1297 This should turn into a switch on the character. See PR3253 for some notes on
1300 456.hmmer apparently uses strcspn and strspn a lot. 471.omnetpp uses strspn.
1302 //===---------------------------------------------------------------------===//
1304 "gas" uses this idiom:
1305 else if (strchr ("+-/*%|&^:[]()~", *intel_parser.op_string))
1307 else if (strchr ("<>", *intel_parser.op_string)
1309 Those should be turned into a switch.
1311 //===---------------------------------------------------------------------===//
1313 252.eon contains this interesting code:
1315 %3072 = getelementptr [100 x i8]* %tempString, i32 0, i32 0
1316 %3073 = call i8* @strcpy(i8* %3072, i8* %3071) nounwind
1317 %strlen = call i32 @strlen(i8* %3072) ; uses = 1
1318 %endptr = getelementptr [100 x i8]* %tempString, i32 0, i32 %strlen
1319 call void @llvm.memcpy.i32(i8* %endptr,
1320 i8* getelementptr ([5 x i8]* @"\01LC42", i32 0, i32 0), i32 5, i32 1)
1321 %3074 = call i32 @strlen(i8* %endptr) nounwind readonly
1323 This is interesting for a couple reasons. First, in this:
1325 The memcpy+strlen strlen can be replaced with:
1327 %3074 = call i32 @strlen([5 x i8]* @"\01LC42") nounwind readonly
1329 Because the destination was just copied into the specified memory buffer. This,
1330 in turn, can be constant folded to "4".
1332 In other code, it contains:
1334 %endptr6978 = bitcast i8* %endptr69 to i32*
1335 store i32 7107374, i32* %endptr6978, align 1
1336 %3167 = call i32 @strlen(i8* %endptr69) nounwind readonly
1338 Which could also be constant folded. Whatever is producing this should probably
1339 be fixed to leave this as a memcpy from a string.
1341 Further, eon also has an interesting partially redundant strlen call:
1343 bb8: ; preds = %_ZN18eonImageCalculatorC1Ev.exit
1344 %682 = getelementptr i8** %argv, i32 6 ; <i8**> [#uses=2]
1345 %683 = load i8** %682, align 4 ; <i8*> [#uses=4]
1346 %684 = load i8* %683, align 1 ; <i8> [#uses=1]
1347 %685 = icmp eq i8 %684, 0 ; <i1> [#uses=1]
1348 br i1 %685, label %bb10, label %bb9
1351 %686 = call i32 @strlen(i8* %683) nounwind readonly
1352 %687 = icmp ugt i32 %686, 254 ; <i1> [#uses=1]
1353 br i1 %687, label %bb10, label %bb11
1355 bb10: ; preds = %bb9, %bb8
1356 %688 = call i32 @strlen(i8* %683) nounwind readonly
1358 This could be eliminated by doing the strlen once in bb8, saving code size and
1359 improving perf on the bb8->9->10 path.
1361 //===---------------------------------------------------------------------===//
1363 I see an interesting fully redundant call to strlen left in 186.crafty:InputMove
1365 %movetext11 = getelementptr [128 x i8]* %movetext, i32 0, i32 0
1368 bb62: ; preds = %bb55, %bb53
1369 %promote.0 = phi i32 [ %169, %bb55 ], [ 0, %bb53 ]
1370 %171 = call i32 @strlen(i8* %movetext11) nounwind readonly align 1
1371 %172 = add i32 %171, -1 ; <i32> [#uses=1]
1372 %173 = getelementptr [128 x i8]* %movetext, i32 0, i32 %172
1375 br i1 %or.cond, label %bb65, label %bb72
1377 bb65: ; preds = %bb62
1378 store i8 0, i8* %173, align 1
1381 bb72: ; preds = %bb65, %bb62
1382 %trank.1 = phi i32 [ %176, %bb65 ], [ -1, %bb62 ]
1383 %177 = call i32 @strlen(i8* %movetext11) nounwind readonly align 1
1385 Note that on the bb62->bb72 path, that the %177 strlen call is partially
1386 redundant with the %171 call. At worst, we could shove the %177 strlen call
1387 up into the bb65 block moving it out of the bb62->bb72 path. However, note
1388 that bb65 stores to the string, zeroing out the last byte. This means that on
1389 that path the value of %177 is actually just %171-1. A sub is cheaper than a
1392 This pattern repeats several times, basically doing:
1397 where it is "obvious" that B = A-1.
1399 //===---------------------------------------------------------------------===//
1401 186.crafty has this interesting pattern with the "out.4543" variable:
1403 call void @llvm.memcpy.i32(
1404 i8* getelementptr ([10 x i8]* @out.4543, i32 0, i32 0),
1405 i8* getelementptr ([7 x i8]* @"\01LC28700", i32 0, i32 0), i32 7, i32 1)
1406 %101 = call@printf(i8* ... @out.4543, i32 0, i32 0)) nounwind
1408 It is basically doing:
1410 memcpy(globalarray, "string");
1411 printf(..., globalarray);
1413 Anyway, by knowing that printf just reads the memory and forward substituting
1414 the string directly into the printf, this eliminates reads from globalarray.
1415 Since this pattern occurs frequently in crafty (due to the "DisplayTime" and
1416 other similar functions) there are many stores to "out". Once all the printfs
1417 stop using "out", all that is left is the memcpy's into it. This should allow
1418 globalopt to remove the "stored only" global.
1420 //===---------------------------------------------------------------------===//
1424 define inreg i32 @foo(i8* inreg %p) nounwind {
1426 %tmp1 = ashr i8 %tmp0, 5
1427 %tmp2 = sext i8 %tmp1 to i32
1431 could be dagcombine'd to a sign-extending load with a shift.
1432 For example, on x86 this currently gets this:
1438 while it could get this:
1443 //===---------------------------------------------------------------------===//
1447 int test(int x) { return 1-x == x; } // --> return false
1448 int test2(int x) { return 2-x == x; } // --> return x == 1 ?
1450 Always foldable for odd constants, what is the rule for even?
1452 //===---------------------------------------------------------------------===//
1454 PR 3381: GEP to field of size 0 inside a struct could be turned into GEP
1455 for next field in struct (which is at same address).
1457 For example: store of float into { {{}}, float } could be turned into a store to
1460 //===---------------------------------------------------------------------===//
1462 The arg promotion pass should make use of nocapture to make its alias analysis
1463 stuff much more precise.
1465 //===---------------------------------------------------------------------===//
1467 The following functions should be optimized to use a select instead of a
1468 branch (from gcc PR40072):
1470 char char_int(int m) {if(m>7) return 0; return m;}
1471 int int_char(char m) {if(m>7) return 0; return m;}
1473 //===---------------------------------------------------------------------===//
1475 int func(int a, int b) { if (a & 0x80) b |= 0x80; else b &= ~0x80; return b; }
1479 define i32 @func(i32 %a, i32 %b) nounwind readnone ssp {
1481 %0 = and i32 %a, 128 ; <i32> [#uses=1]
1482 %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
1483 %2 = or i32 %b, 128 ; <i32> [#uses=1]
1484 %3 = and i32 %b, -129 ; <i32> [#uses=1]
1485 %b_addr.0 = select i1 %1, i32 %3, i32 %2 ; <i32> [#uses=1]
1489 However, it's functionally equivalent to:
1491 b = (b & ~0x80) | (a & 0x80);
1493 Which generates this:
1495 define i32 @func(i32 %a, i32 %b) nounwind readnone ssp {
1497 %0 = and i32 %b, -129 ; <i32> [#uses=1]
1498 %1 = and i32 %a, 128 ; <i32> [#uses=1]
1499 %2 = or i32 %0, %1 ; <i32> [#uses=1]
1503 This can be generalized for other forms:
1505 b = (b & ~0x80) | (a & 0x40) << 1;
1507 //===---------------------------------------------------------------------===//
1509 These two functions produce different code. They shouldn't:
1513 uint8_t p1(uint8_t b, uint8_t a) {
1514 b = (b & ~0xc0) | (a & 0xc0);
1518 uint8_t p2(uint8_t b, uint8_t a) {
1519 b = (b & ~0x40) | (a & 0x40);
1520 b = (b & ~0x80) | (a & 0x80);
1524 define zeroext i8 @p1(i8 zeroext %b, i8 zeroext %a) nounwind readnone ssp {
1526 %0 = and i8 %b, 63 ; <i8> [#uses=1]
1527 %1 = and i8 %a, -64 ; <i8> [#uses=1]
1528 %2 = or i8 %1, %0 ; <i8> [#uses=1]
1532 define zeroext i8 @p2(i8 zeroext %b, i8 zeroext %a) nounwind readnone ssp {
1534 %0 = and i8 %b, 63 ; <i8> [#uses=1]
1535 %.masked = and i8 %a, 64 ; <i8> [#uses=1]
1536 %1 = and i8 %a, -128 ; <i8> [#uses=1]
1537 %2 = or i8 %1, %0 ; <i8> [#uses=1]
1538 %3 = or i8 %2, %.masked ; <i8> [#uses=1]
1542 //===---------------------------------------------------------------------===//
1544 IPSCCP does not currently propagate argument dependent constants through
1545 functions where it does not not all of the callers. This includes functions
1546 with normal external linkage as well as templates, C99 inline functions etc.
1547 Specifically, it does nothing to:
1549 define i32 @test(i32 %x, i32 %y, i32 %z) nounwind {
1551 %0 = add nsw i32 %y, %z
1554 %3 = add nsw i32 %1, %2
1558 define i32 @test2() nounwind {
1560 %0 = call i32 @test(i32 1, i32 2, i32 4) nounwind
1564 It would be interesting extend IPSCCP to be able to handle simple cases like
1565 this, where all of the arguments to a call are constant. Because IPSCCP runs
1566 before inlining, trivial templates and inline functions are not yet inlined.
1567 The results for a function + set of constant arguments should be memoized in a
1570 //===---------------------------------------------------------------------===//
1572 The libcall constant folding stuff should be moved out of SimplifyLibcalls into
1573 libanalysis' constantfolding logic. This would allow IPSCCP to be able to
1574 handle simple things like this:
1576 static int foo(const char *X) { return strlen(X); }
1577 int bar() { return foo("abcd"); }
1579 //===---------------------------------------------------------------------===//
1581 functionattrs doesn't know much about memcpy/memset. This function should be
1582 marked readnone rather than readonly, since it only twiddles local memory, but
1583 functionattrs doesn't handle memset/memcpy/memmove aggressively:
1585 struct X { int *p; int *q; };
1592 p = __builtin_memcpy (&x, &y, sizeof (int *));
1596 This can be seen at:
1597 $ clang t.c -S -o - -mkernel -O0 -emit-llvm | opt -functionattrs -S
1600 //===---------------------------------------------------------------------===//
1602 Missed instcombine transformation:
1603 define i1 @a(i32 %x) nounwind readnone {
1605 %cmp = icmp eq i32 %x, 30
1606 %sub = add i32 %x, -30
1607 %cmp2 = icmp ugt i32 %sub, 9
1608 %or = or i1 %cmp, %cmp2
1611 This should be optimized to a single compare. Testcase derived from gcc.
1613 //===---------------------------------------------------------------------===//
1615 Missed instcombine or reassociate transformation:
1616 int a(int a, int b) { return (a==12)&(b>47)&(b<58); }
1618 The sgt and slt should be combined into a single comparison. Testcase derived
1621 //===---------------------------------------------------------------------===//
1623 Missed instcombine transformation:
1625 %382 = srem i32 %tmp14.i, 64 ; [#uses=1]
1626 %383 = zext i32 %382 to i64 ; [#uses=1]
1627 %384 = shl i64 %381, %383 ; [#uses=1]
1628 %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1]
1630 The srem can be transformed to an and because if %tmp14.i is negative, the
1631 shift is undefined. Testcase derived from 403.gcc.
1633 //===---------------------------------------------------------------------===//
1635 This is a range comparison on a divided result (from 403.gcc):
1637 %1337 = sdiv i32 %1336, 8 ; [#uses=1]
1638 %.off.i208 = add i32 %1336, 7 ; [#uses=1]
1639 %1338 = icmp ult i32 %.off.i208, 15 ; [#uses=1]
1641 We already catch this (removing the sdiv) if there isn't an add, we should
1642 handle the 'add' as well. This is a common idiom with it's builtin_alloca code.
1645 int a(int x) { return (unsigned)(x/16+7) < 15; }
1647 Another similar case involves truncations on 64-bit targets:
1649 %361 = sdiv i64 %.046, 8 ; [#uses=1]
1650 %362 = trunc i64 %361 to i32 ; [#uses=2]
1652 %367 = icmp eq i32 %362, 0 ; [#uses=1]
1654 //===---------------------------------------------------------------------===//
1656 Missed instcombine/dagcombine transformation:
1657 define void @lshift_lt(i8 zeroext %a) nounwind {
1659 %conv = zext i8 %a to i32
1660 %shl = shl i32 %conv, 3
1661 %cmp = icmp ult i32 %shl, 33
1662 br i1 %cmp, label %if.then, label %if.end
1665 tail call void @bar() nounwind
1671 declare void @bar() nounwind
1673 The shift should be eliminated. Testcase derived from gcc.
1675 //===---------------------------------------------------------------------===//
1677 These compile into different code, one gets recognized as a switch and the
1678 other doesn't due to phase ordering issues (PR6212):
1680 int test1(int mainType, int subType) {
1683 else if (mainType == 9)
1685 else if (mainType == 11)
1690 int test2(int mainType, int subType) {
1700 //===---------------------------------------------------------------------===//
1702 The following test case (from PR6576):
1704 define i32 @mul(i32 %a, i32 %b) nounwind readnone {
1706 %cond1 = icmp eq i32 %b, 0 ; <i1> [#uses=1]
1707 br i1 %cond1, label %exit, label %bb.nph
1708 bb.nph: ; preds = %entry
1709 %tmp = mul i32 %b, %a ; <i32> [#uses=1]
1711 exit: ; preds = %entry
1715 could be reduced to:
1717 define i32 @mul(i32 %a, i32 %b) nounwind readnone {
1719 %tmp = mul i32 %b, %a
1723 //===---------------------------------------------------------------------===//
1725 We should use DSE + llvm.lifetime.end to delete dead vtable pointer updates.
1728 Another interesting case is that something related could be used for variables
1729 that go const after their ctor has finished. In these cases, globalopt (which
1730 can statically run the constructor) could mark the global const (so it gets put
1731 in the readonly section). A testcase would be:
1734 using namespace std;
1735 const complex<char> should_be_in_rodata (42,-42);
1736 complex<char> should_be_in_data (42,-42);
1737 complex<char> should_be_in_bss;
1739 Where we currently evaluate the ctors but the globals don't become const because
1740 the optimizer doesn't know they "become const" after the ctor is done. See
1741 GCC PR4131 for more examples.
1743 //===---------------------------------------------------------------------===//
1748 return x > 1 ? x : 1;
1751 LLVM emits a comparison with 1 instead of 0. 0 would be equivalent
1752 and cheaper on most targets.
1754 LLVM prefers comparisons with zero over non-zero in general, but in this
1755 case it choses instead to keep the max operation obvious.
1757 //===---------------------------------------------------------------------===//
1759 Take the following testcase on x86-64 (similar testcases exist for all targets
1762 define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b,
1765 %0 = zext i64 %a to i128 ; <i128> [#uses=1]
1766 %1 = zext i64 %b to i128 ; <i128> [#uses=1]
1767 %2 = add i128 %1, %0 ; <i128> [#uses=2]
1768 %3 = zext i64 %c to i128 ; <i128> [#uses=1]
1769 %4 = shl i128 %3, 64 ; <i128> [#uses=1]
1770 %5 = add i128 %4, %2 ; <i128> [#uses=1]
1771 %6 = lshr i128 %5, 64 ; <i128> [#uses=1]
1772 %7 = trunc i128 %6 to i64 ; <i64> [#uses=1]
1773 store i64 %7, i64* %s, align 8
1774 %8 = trunc i128 %2 to i64 ; <i64> [#uses=1]
1775 store i64 %8, i64* %t, align 8
1794 //===---------------------------------------------------------------------===//
1796 Switch lowering generates less than ideal code for the following switch:
1797 define void @a(i32 %x) nounwind {
1799 switch i32 %x, label %if.end [
1800 i32 0, label %if.then
1801 i32 1, label %if.then
1802 i32 2, label %if.then
1803 i32 3, label %if.then
1804 i32 5, label %if.then
1807 tail call void @foo() nounwind
1814 Generated code on x86-64 (other platforms give similar results):
1827 The movl+movl+btq+jb could be simplified to a cmpl+jne.
1829 Or, if we wanted to be really clever, we could simplify the whole thing to
1830 something like the following, which eliminates a branch:
1838 //===---------------------------------------------------------------------===//
1842 int foo(int a) { return (a & (~15)) / 16; }
1846 define i32 @foo(i32 %a) nounwind readnone ssp {
1848 %and = and i32 %a, -16
1849 %div = sdiv i32 %and, 16
1853 but this code (X & -A)/A is X >> log2(A) when A is a power of 2, so this case
1854 should be instcombined into just "a >> 4".
1856 We do get this at the codegen level, so something knows about it, but
1857 instcombine should catch it earlier:
1865 //===---------------------------------------------------------------------===//
1867 This code (from GCC PR28685):
1869 int test(int a, int b) {
1879 define i32 @test(i32 %a, i32 %b) nounwind readnone ssp {
1881 %cmp = icmp slt i32 %a, %b
1882 br i1 %cmp, label %return, label %if.end
1884 if.end: ; preds = %entry
1885 %cmp5 = icmp eq i32 %a, %b
1886 %conv6 = zext i1 %cmp5 to i32
1889 return: ; preds = %entry
1895 define i32 @test__(i32 %a, i32 %b) nounwind readnone ssp {
1897 %0 = icmp sle i32 %a, %b
1898 %retval = zext i1 %0 to i32
1902 //===---------------------------------------------------------------------===//
1904 This code can be seen in viterbi:
1906 %64 = call noalias i8* @malloc(i64 %62) nounwind
1908 %67 = call i64 @llvm.objectsize.i64(i8* %64, i1 false) nounwind
1909 %68 = call i8* @__memset_chk(i8* %64, i32 0, i64 %62, i64 %67) nounwind
1911 llvm.objectsize.i64 should be taught about malloc/calloc, allowing it to
1912 fold to %62. This is a security win (overflows of malloc will get caught)
1913 and also a performance win by exposing more memsets to the optimizer.
1915 This occurs several times in viterbi.
1917 Note that this would change the semantics of @llvm.objectsize which by its
1918 current definition always folds to a constant. We also should make sure that
1919 we remove checking in code like
1921 char *p = malloc(strlen(s)+1);
1922 __strcpy_chk(p, s, __builtin_objectsize(p, 0));
1924 //===---------------------------------------------------------------------===//
1926 This code (from Benchmarks/Dhrystone/dry.c):
1928 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
1930 %sext = shl i32 %0, 24
1931 %conv = ashr i32 %sext, 24
1932 %sext6 = shl i32 %1, 24
1933 %conv4 = ashr i32 %sext6, 24
1934 %cmp = icmp eq i32 %conv, %conv4
1935 %. = select i1 %cmp, i32 10000, i32 0
1939 Should be simplified into something like:
1941 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
1943 %sext = shl i32 %0, 24
1944 %conv = and i32 %sext, 0xFF000000
1945 %sext6 = shl i32 %1, 24
1946 %conv4 = and i32 %sext6, 0xFF000000
1947 %cmp = icmp eq i32 %conv, %conv4
1948 %. = select i1 %cmp, i32 10000, i32 0
1954 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
1956 %conv = and i32 %0, 0xFF
1957 %conv4 = and i32 %1, 0xFF
1958 %cmp = icmp eq i32 %conv, %conv4
1959 %. = select i1 %cmp, i32 10000, i32 0
1962 //===---------------------------------------------------------------------===//
1964 clang -O3 currently compiles this code
1966 int g(unsigned int a) {
1967 unsigned int c[100];
1970 unsigned int b = c[10] + c[11];
1978 define i32 @g(i32 a) nounwind readnone {
1979 %add = shl i32 %a, 1
1980 %mul = shl i32 %a, 1
1981 %cmp = icmp ugt i32 %add, %mul
1982 %a.addr.0 = select i1 %cmp, i32 11, i32 15
1986 The icmp should fold to false. This CSE opportunity is only available
1987 after GVN and InstCombine have run.
1989 //===---------------------------------------------------------------------===//
1991 memcpyopt should turn this:
1993 define i8* @test10(i32 %x) {
1994 %alloc = call noalias i8* @malloc(i32 %x) nounwind
1995 call void @llvm.memset.p0i8.i32(i8* %alloc, i8 0, i32 %x, i32 1, i1 false)
1999 into a call to calloc. We should make sure that we analyze calloc as
2000 aggressively as malloc though.
2002 //===---------------------------------------------------------------------===//
2004 clang -O3 doesn't optimize this:
2006 void f1(int* begin, int* end) {
2007 std::fill(begin, end, 0);
2010 into a memset. This is PR8942.
2012 //===---------------------------------------------------------------------===//
2014 clang -O3 -fno-exceptions currently compiles this code:
2017 std::vector<int> v(N);
2019 extern void sink(void*); sink(&v);
2024 define void @_Z1fi(i32 %N) nounwind {
2026 %v2 = alloca [3 x i32*], align 8
2027 %v2.sub = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 0
2028 %tmpcast = bitcast [3 x i32*]* %v2 to %"class.std::vector"*
2029 %conv = sext i32 %N to i64
2030 store i32* null, i32** %v2.sub, align 8, !tbaa !0
2031 %tmp3.i.i.i.i.i = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 1
2032 store i32* null, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2033 %tmp4.i.i.i.i.i = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 2
2034 store i32* null, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2035 %cmp.i.i.i.i = icmp eq i32 %N, 0
2036 br i1 %cmp.i.i.i.i, label %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread.i.i, label %cond.true.i.i.i.i
2038 _ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread.i.i: ; preds = %entry
2039 store i32* null, i32** %v2.sub, align 8, !tbaa !0
2040 store i32* null, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2041 %add.ptr.i5.i.i = getelementptr inbounds i32* null, i64 %conv
2042 store i32* %add.ptr.i5.i.i, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2043 br label %_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_.exit
2045 cond.true.i.i.i.i: ; preds = %entry
2046 %cmp.i.i.i.i.i = icmp slt i32 %N, 0
2047 br i1 %cmp.i.i.i.i.i, label %if.then.i.i.i.i.i, label %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.i.i
2049 if.then.i.i.i.i.i: ; preds = %cond.true.i.i.i.i
2050 call void @_ZSt17__throw_bad_allocv() noreturn nounwind
2053 _ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.i.i: ; preds = %cond.true.i.i.i.i
2054 %mul.i.i.i.i.i = shl i64 %conv, 2
2055 %call3.i.i.i.i.i = call noalias i8* @_Znwm(i64 %mul.i.i.i.i.i) nounwind
2056 %0 = bitcast i8* %call3.i.i.i.i.i to i32*
2057 store i32* %0, i32** %v2.sub, align 8, !tbaa !0
2058 store i32* %0, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2059 %add.ptr.i.i.i = getelementptr inbounds i32* %0, i64 %conv
2060 store i32* %add.ptr.i.i.i, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2061 call void @llvm.memset.p0i8.i64(i8* %call3.i.i.i.i.i, i8 0, i64 %mul.i.i.i.i.i, i32 4, i1 false)
2062 br label %_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_.exit
2064 This is just the handling the construction of the vector. Most surprising here
2065 is the fact that all three null stores in %entry are dead (because we do no
2068 Also surprising is that %conv isn't simplified to 0 in %....exit.thread.i.i.
2069 This is a because the client of LazyValueInfo doesn't simplify all instruction
2070 operands, just selected ones.
2072 //===---------------------------------------------------------------------===//
2074 clang -O3 -fno-exceptions currently compiles this code:
2076 void f(char* a, int n) {
2077 __builtin_memset(a, 0, n);
2078 for (int i = 0; i < n; ++i)
2084 define void @_Z1fPci(i8* nocapture %a, i32 %n) nounwind {
2086 %conv = sext i32 %n to i64
2087 tail call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 %conv, i32 1, i1 false)
2088 %cmp8 = icmp sgt i32 %n, 0
2089 br i1 %cmp8, label %for.body.lr.ph, label %for.end
2091 for.body.lr.ph: ; preds = %entry
2092 %tmp10 = add i32 %n, -1
2093 %tmp11 = zext i32 %tmp10 to i64
2094 %tmp12 = add i64 %tmp11, 1
2095 call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 %tmp12, i32 1, i1 false)
2098 for.end: ; preds = %entry
2102 This shouldn't need the ((zext (%n - 1)) + 1) game, and it should ideally fold
2103 the two memset's together. The issue with %n seems to stem from poor handling
2104 of the original loop.
2106 To simplify this, we need SCEV to know that "n != 0" because of the dominating
2107 conditional. That would turn the second memset into a simple memset of 'n'.
2109 //===---------------------------------------------------------------------===//
2111 clang -O3 -fno-exceptions currently compiles this code:
2114 unsigned short m1, m2;
2115 unsigned char m3, m4;
2119 std::vector<S> v(N);
2120 extern void sink(void*); sink(&v);
2123 into poor code for zero-initializing 'v' when N is >0. The problem is that
2124 S is only 6 bytes, but each element is 8 byte-aligned. We generate a loop and
2125 4 stores on each iteration. If the struct were 8 bytes, this gets turned into
2128 In order to handle this we have to:
2129 A) Teach clang to generate metadata for memsets of structs that have holes in
2131 B) Teach clang to use such a memset for zero init of this struct (since it has
2132 a hole), instead of doing elementwise zeroing.
2134 //===---------------------------------------------------------------------===//
2136 clang -O3 currently compiles this code:
2138 extern const int magic;
2139 double f() { return 0.0 * magic; }
2143 @magic = external constant i32
2145 define double @_Z1fv() nounwind readnone {
2147 %tmp = load i32* @magic, align 4, !tbaa !0
2148 %conv = sitofp i32 %tmp to double
2149 %mul = fmul double %conv, 0.000000e+00
2153 We should be able to fold away this fmul to 0.0. More generally, fmul(x,0.0)
2154 can be folded to 0.0 if we can prove that the LHS is not -0.0, not a NaN, and
2155 not an INF. The CannotBeNegativeZero predicate in value tracking should be
2156 extended to support general "fpclassify" operations that can return
2157 yes/no/unknown for each of these predicates.
2159 In this predicate, we know that uitofp is trivially never NaN or -0.0, and
2160 we know that it isn't +/-Inf if the floating point type has enough exponent bits
2161 to represent the largest integer value as < inf.
2163 //===---------------------------------------------------------------------===//
2165 When optimizing a transformation that can change the sign of 0.0 (such as the
2166 0.0*val -> 0.0 transformation above), it might be provable that the sign of the
2167 expression doesn't matter. For example, by the above rules, we can't transform
2168 fmul(sitofp(x), 0.0) into 0.0, because x might be -1 and the result of the
2169 expression is defined to be -0.0.
2171 If we look at the uses of the fmul for example, we might be able to prove that
2172 all uses don't care about the sign of zero. For example, if we have:
2174 fadd(fmul(sitofp(x), 0.0), 2.0)
2176 Since we know that x+2.0 doesn't care about the sign of any zeros in X, we can
2177 transform the fmul to 0.0, and then the fadd to 2.0.
2179 //===---------------------------------------------------------------------===//
2181 We should enhance memcpy/memcpy/memset to allow a metadata node on them
2182 indicating that some bytes of the transfer are undefined. This is useful for
2183 frontends like clang when lowering struct copies, when some elements of the
2184 struct are undefined. Consider something like this:
2190 void foo(struct x*P);
2191 struct x testfunc() {
2199 We currently compile this to:
2200 $ clang t.c -S -o - -O0 -emit-llvm | opt -scalarrepl -S
2203 %struct.x = type { i8, [4 x i32] }
2205 define void @testfunc(%struct.x* sret %agg.result) nounwind ssp {
2207 %V1 = alloca %struct.x, align 4
2208 call void @foo(%struct.x* %V1)
2209 %tmp1 = bitcast %struct.x* %V1 to i8*
2210 %0 = bitcast %struct.x* %V1 to i160*
2211 %srcval1 = load i160* %0, align 4
2212 %tmp2 = bitcast %struct.x* %agg.result to i8*
2213 %1 = bitcast %struct.x* %agg.result to i160*
2214 store i160 %srcval1, i160* %1, align 4
2218 This happens because SRoA sees that the temp alloca has is being memcpy'd into
2219 and out of and it has holes and it has to be conservative. If we knew about the
2220 holes, then this could be much much better.
2222 Having information about these holes would also improve memcpy (etc) lowering at
2223 llc time when it gets inlined, because we can use smaller transfers. This also
2224 avoids partial register stalls in some important cases.
2226 //===---------------------------------------------------------------------===//
2228 We don't fold (icmp (add) (add)) unless the two adds only have a single use.
2229 There are a lot of cases that we're refusing to fold in (e.g.) 256.bzip2, for
2232 %indvar.next90 = add i64 %indvar89, 1 ;; Has 2 uses
2233 %tmp96 = add i64 %tmp95, 1 ;; Has 1 use
2234 %exitcond97 = icmp eq i64 %indvar.next90, %tmp96
2236 We don't fold this because we don't want to introduce an overlapped live range
2237 of the ivar. However if we can make this more aggressive without causing
2238 performance issues in two ways:
2240 1. If *either* the LHS or RHS has a single use, we can definitely do the
2241 transformation. In the overlapping liverange case we're trading one register
2242 use for one fewer operation, which is a reasonable trade. Before doing this
2243 we should verify that the llc output actually shrinks for some benchmarks.
2244 2. If both ops have multiple uses, we can still fold it if the operations are
2245 both sinkable to *after* the icmp (e.g. in a subsequent block) which doesn't
2246 increase register pressure.
2248 There are a ton of icmp's we aren't simplifying because of the reg pressure
2249 concern. Care is warranted here though because many of these are induction
2250 variables and other cases that matter a lot to performance, like the above.
2251 Here's a blob of code that you can drop into the bottom of visitICmp to see some
2254 { Value *A, *B, *C, *D;
2255 if (match(Op0, m_Add(m_Value(A), m_Value(B))) &&
2256 match(Op1, m_Add(m_Value(C), m_Value(D))) &&
2257 (A == C || A == D || B == C || B == D)) {
2258 errs() << "OP0 = " << *Op0 << " U=" << Op0->getNumUses() << "\n";
2259 errs() << "OP1 = " << *Op1 << " U=" << Op1->getNumUses() << "\n";
2260 errs() << "CMP = " << I << "\n\n";
2264 //===---------------------------------------------------------------------===//