lib/Target/R600/SIDefines.h

   1 //===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 /// \file
   9 //===----------------------------------------------------------------------===//
  10
  11 #ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H
  12 #define LLVM_LIB_TARGET_R600_SIDEFINES_H
  13
  14 namespace SIInstrFlags {
  15 // This needs to be kept in sync with the field bits in InstSI.
  16 enum {
  17   MIMG = 1 << 3,
  18   SMRD = 1 << 4,
  19   VOP1 = 1 << 5,
  20   VOP2 = 1 << 6,
  21   VOP3 = 1 << 7,
  22   VOPC = 1 << 8,
  23   SALU = 1 << 9,
  24   MUBUF = 1 << 10,
  25   MTBUF = 1 << 11,
  26   FLAT = 1 << 12
  27 };
  28 }
  29
  30 namespace SIInstrFlags {
  31   enum Flags {
  32     // First 4 bits are the instruction encoding
  33     VM_CNT = 1 << 0,
  34     EXP_CNT = 1 << 1,
  35     LGKM_CNT = 1 << 2
  36   };
  37 }
  38
  39 namespace SISrcMods {
  40   enum {
  41    NEG = 1 << 0,
  42    ABS = 1 << 1
  43   };
  44 }
  45
  46 #define R_00B028_SPI_SHADER_PGM_RSRC1_PS                                0x00B028
  47 #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS                                0x00B02C
  48 #define   S_00B02C_EXTRA_LDS_SIZE(x)                                  (((x) & 0xFF) << 8)
  49 #define R_00B128_SPI_SHADER_PGM_RSRC1_VS                                0x00B128
  50 #define R_00B228_SPI_SHADER_PGM_RSRC1_GS                                0x00B228
  51 #define R_00B848_COMPUTE_PGM_RSRC1                                      0x00B848
  52 #define   S_00B028_VGPRS(x)                                           (((x) & 0x3F) << 0)
  53 #define   S_00B028_SGPRS(x)                                           (((x) & 0x0F) << 6)
  54 #define R_00B84C_COMPUTE_PGM_RSRC2                                      0x00B84C
  55 #define   S_00B02C_SCRATCH_EN(x)                                      (((x) & 0x1) << 0)
  56 #define   S_00B84C_LDS_SIZE(x)                                        (((x) & 0x1FF) << 15)
  57 #define R_0286CC_SPI_PS_INPUT_ENA                                       0x0286CC
  58
  59
  60 #define R_00B848_COMPUTE_PGM_RSRC1                                      0x00B848
  61 #define   S_00B848_VGPRS(x)                                           (((x) & 0x3F) << 0)
  62 #define   G_00B848_VGPRS(x)                                           (((x) >> 0) & 0x3F)
  63 #define   C_00B848_VGPRS                                              0xFFFFFFC0
  64 #define   S_00B848_SGPRS(x)                                           (((x) & 0x0F) << 6)
  65 #define   G_00B848_SGPRS(x)                                           (((x) >> 6) & 0x0F)
  66 #define   C_00B848_SGPRS                                              0xFFFFFC3F
  67 #define   S_00B848_PRIORITY(x)                                        (((x) & 0x03) << 10)
  68 #define   G_00B848_PRIORITY(x)                                        (((x) >> 10) & 0x03)
  69 #define   C_00B848_PRIORITY                                           0xFFFFF3FF
  70 #define   S_00B848_FLOAT_MODE(x)                                      (((x) & 0xFF) << 12)
  71 #define   G_00B848_FLOAT_MODE(x)                                      (((x) >> 12) & 0xFF)
  72 #define   C_00B848_FLOAT_MODE                                         0xFFF00FFF
  73 #define   S_00B848_PRIV(x)                                            (((x) & 0x1) << 20)
  74 #define   G_00B848_PRIV(x)                                            (((x) >> 20) & 0x1)
  75 #define   C_00B848_PRIV                                               0xFFEFFFFF
  76 #define   S_00B848_DX10_CLAMP(x)                                      (((x) & 0x1) << 21)
  77 #define   G_00B848_DX10_CLAMP(x)                                      (((x) >> 21) & 0x1)
  78 #define   C_00B848_DX10_CLAMP                                         0xFFDFFFFF
  79 #define   S_00B848_DEBUG_MODE(x)                                      (((x) & 0x1) << 22)
  80 #define   G_00B848_DEBUG_MODE(x)                                      (((x) >> 22) & 0x1)
  81 #define   C_00B848_DEBUG_MODE                                         0xFFBFFFFF
  82 #define   S_00B848_IEEE_MODE(x)                                       (((x) & 0x1) << 23)
  83 #define   G_00B848_IEEE_MODE(x)                                       (((x) >> 23) & 0x1)
  84 #define   C_00B848_IEEE_MODE                                          0xFF7FFFFF
  85
  86
  87 // Helpers for setting FLOAT_MODE
  88 #define FP_ROUND_ROUND_TO_NEAREST 0
  89 #define FP_ROUND_ROUND_TO_INF 1
  90 #define FP_ROUND_ROUND_TO_NEGINF 2
  91 #define FP_ROUND_ROUND_TO_ZERO 3
  92
  93 // Bits 3:0 control rounding mode. 1:0 control single precision, 3:2 double
  94 // precision.
  95 #define FP_ROUND_MODE_SP(x) ((x) & 0x3)
  96 #define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2)
  97
  98 #define FP_DENORM_FLUSH_IN_FLUSH_OUT 0
  99 #define FP_DENORM_FLUSH_OUT 1
 100 #define FP_DENORM_FLUSH_IN 2
 101 #define FP_DENORM_FLUSH_NONE 3
 102
 103
 104 // Bits 7:4 control denormal handling. 5:4 control single precision, 6:7 double
 105 // precision.
 106 #define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4)
 107 #define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6)
 108
 109 #define R_00B860_COMPUTE_TMPRING_SIZE                                   0x00B860
 110 #define   S_00B860_WAVESIZE(x)                                        (((x) & 0x1FFF) << 12)
 111
 112 #endif