1 //===-- R600InstrFormats.td - R600 Instruction Encodings ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // R600 Instruction format definitions.
12 //===----------------------------------------------------------------------===//
14 class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
16 : AMDGPUInst <outs, ins, asm, pattern> {
23 bits<2> FlagOperandIdx = 0;
26 bit HasNativeOperands = 0;
31 let Namespace = "AMDGPU";
32 let OutOperandList = outs;
33 let InOperandList = ins;
35 let Pattern = pattern;
38 let TSFlags{0} = TransOnly;
39 let TSFlags{4} = Trig;
42 // Vector instructions are instructions that must fill all slots in an
44 let TSFlags{6} = isVector;
45 let TSFlags{8-7} = FlagOperandIdx;
46 let TSFlags{9} = HasNativeOperands;
47 let TSFlags{10} = Op1;
48 let TSFlags{11} = Op2;
49 let TSFlags{12} = VTXInst;
50 let TSFlags{13} = TEXInst;
51 let TSFlags{14} = ALUInst;
54 //===----------------------------------------------------------------------===//
56 //===----------------------------------------------------------------------===//
67 bits<3> index_mode = 0;
71 bits<9> src0_sel = src0{8-0};
72 bits<2> src0_chan = src0{10-9};
73 bits<9> src1_sel = src1{8-0};
74 bits<2> src1_chan = src1{10-9};
76 let Word0{8-0} = src0_sel;
77 let Word0{9} = src0_rel;
78 let Word0{11-10} = src0_chan;
79 let Word0{12} = src0_neg;
80 let Word0{21-13} = src1_sel;
81 let Word0{22} = src1_rel;
82 let Word0{24-23} = src1_chan;
83 let Word0{25} = src1_neg;
84 let Word0{28-26} = index_mode;
85 let Word0{30-29} = pred_sel;
97 bits<7> dst_sel = dst{6-0};
98 bits<2> dst_chan = dst{10-9};
100 let Word1{20-18} = bank_swizzle;
101 let Word1{27-21} = dst_sel;
102 let Word1{28} = dst_rel;
103 let Word1{30-29} = dst_chan;
104 let Word1{31} = clamp;
107 class R600ALU_Word1_OP2 <bits<11> alu_inst> : R600ALU_Word1{
111 bits<1> update_exec_mask;
116 let Word1{0} = src0_abs;
117 let Word1{1} = src1_abs;
118 let Word1{2} = update_exec_mask;
119 let Word1{3} = update_pred;
120 let Word1{4} = write;
121 let Word1{6-5} = omod;
122 let Word1{17-7} = alu_inst;
125 class R600ALU_Word1_OP3 <bits<5> alu_inst> : R600ALU_Word1{
131 bits<9> src2_sel = src2{8-0};
132 bits<2> src2_chan = src2{10-9};
134 let Word1{8-0} = src2_sel;
135 let Word1{9} = src2_rel;
136 let Word1{11-10} = src2_chan;
137 let Word1{12} = src2_neg;
138 let Word1{17-13} = alu_inst;
142 XXX: R600 subtarget uses a slightly different encoding than the other
143 subtargets. We currently handle this in R600MCCodeEmitter, but we may
144 want to use these instruction classes in the future.
146 class R600ALU_Word1_OP2_r600 : R600ALU_Word1_OP2 {
151 let Inst{37} = fog_merge;
152 let Inst{39-38} = omod;
153 let Inst{49-40} = alu_inst;
156 class R600ALU_Word1_OP2_r700 : R600ALU_Word1_OP2 {
160 let Inst{38-37} = omod;
161 let Inst{49-39} = alu_inst;
165 //===----------------------------------------------------------------------===//
166 // Vertex Fetch instructions
167 //===----------------------------------------------------------------------===//
170 field bits<32> Word0;
174 bits<1> FETCH_WHOLE_QUAD;
179 let Word0{4-0} = VC_INST;
180 let Word0{6-5} = FETCH_TYPE;
181 let Word0{7} = FETCH_WHOLE_QUAD;
182 let Word0{15-8} = BUFFER_ID;
183 let Word0{22-16} = src_gpr;
184 let Word0{23} = SRC_REL;
185 let Word0{25-24} = SRC_SEL_X;
188 class VTX_WORD0_eg : VTX_WORD0 {
190 bits<6> MEGA_FETCH_COUNT;
192 let Word0{31-26} = MEGA_FETCH_COUNT;
195 class VTX_WORD0_cm : VTX_WORD0 {
198 bits<2> STRUCTURED_READ;
200 bits<1> COALESCED_READ;
202 let Word0{27-26} = SRC_SEL_Y;
203 let Word0{29-28} = STRUCTURED_READ;
204 let Word0{30} = LDS_REQ;
205 let Word0{31} = COALESCED_READ;
208 class VTX_WORD1_GPR {
209 field bits<32> Word1;
216 bits<1> USE_CONST_FIELDS;
218 bits<2> NUM_FORMAT_ALL;
219 bits<1> FORMAT_COMP_ALL;
220 bits<1> SRF_MODE_ALL;
222 let Word1{6-0} = dst_gpr;
223 let Word1{7} = DST_REL;
224 let Word1{8} = 0; // Reserved
225 let Word1{11-9} = DST_SEL_X;
226 let Word1{14-12} = DST_SEL_Y;
227 let Word1{17-15} = DST_SEL_Z;
228 let Word1{20-18} = DST_SEL_W;
229 let Word1{21} = USE_CONST_FIELDS;
230 let Word1{27-22} = DATA_FORMAT;
231 let Word1{29-28} = NUM_FORMAT_ALL;
232 let Word1{30} = FORMAT_COMP_ALL;
233 let Word1{31} = SRF_MODE_ALL;
236 //===----------------------------------------------------------------------===//
237 // Texture fetch instructions
238 //===----------------------------------------------------------------------===//
241 field bits<32> Word0;
245 bits<1> FETCH_WHOLE_QUAD;
250 bits<2> RESOURCE_INDEX_MODE;
251 bits<2> SAMPLER_INDEX_MODE;
253 let Word0{4-0} = TEX_INST;
254 let Word0{6-5} = INST_MOD;
255 let Word0{7} = FETCH_WHOLE_QUAD;
256 let Word0{15-8} = RESOURCE_ID;
257 let Word0{22-16} = SRC_GPR;
258 let Word0{23} = SRC_REL;
259 let Word0{24} = ALT_CONST;
260 let Word0{26-25} = RESOURCE_INDEX_MODE;
261 let Word0{28-27} = SAMPLER_INDEX_MODE;
265 field bits<32> Word1;
274 bits<1> COORD_TYPE_X;
275 bits<1> COORD_TYPE_Y;
276 bits<1> COORD_TYPE_Z;
277 bits<1> COORD_TYPE_W;
279 let Word1{6-0} = DST_GPR;
280 let Word1{7} = DST_REL;
281 let Word1{11-9} = DST_SEL_X;
282 let Word1{14-12} = DST_SEL_Y;
283 let Word1{17-15} = DST_SEL_Z;
284 let Word1{20-18} = DST_SEL_W;
285 let Word1{27-21} = LOD_BIAS;
286 let Word1{28} = COORD_TYPE_X;
287 let Word1{29} = COORD_TYPE_Y;
288 let Word1{30} = COORD_TYPE_Z;
289 let Word1{31} = COORD_TYPE_W;
293 field bits<32> Word2;
304 let Word2{4-0} = OFFSET_X;
305 let Word2{9-5} = OFFSET_Y;
306 let Word2{14-10} = OFFSET_Z;
307 let Word2{19-15} = SAMPLER_ID;
308 let Word2{22-20} = SRC_SEL_X;
309 let Word2{25-23} = SRC_SEL_Y;
310 let Word2{28-26} = SRC_SEL_Z;
311 let Word2{31-29} = SRC_SEL_W;
314 //===----------------------------------------------------------------------===//
315 // Control Flow Instructions
316 //===----------------------------------------------------------------------===//
318 class CF_WORD1_R600 {
319 field bits<32> Word1;
327 bits<1> END_OF_PROGRAM;
328 bits<1> VALID_PIXEL_MODE;
330 bits<1> WHOLE_QUAD_MODE;
333 let Word1{2-0} = POP_COUNT;
334 let Word1{7-3} = CF_CONST;
335 let Word1{9-8} = COND;
336 let Word1{12-10} = COUNT;
337 let Word1{18-13} = CALL_COUNT;
338 let Word1{19} = COUNT_3;
339 let Word1{21} = END_OF_PROGRAM;
340 let Word1{22} = VALID_PIXEL_MODE;
341 let Word1{29-23} = CF_INST;
342 let Word1{30} = WHOLE_QUAD_MODE;
343 let Word1{31} = BARRIER;
347 field bits<32> Word0;
350 bits<3> JUMPTABLE_SEL;
352 let Word0{23-0} = ADDR;
353 let Word0{26-24} = JUMPTABLE_SEL;
357 field bits<32> Word1;
363 bits<1> VALID_PIXEL_MODE;
364 bits<1> END_OF_PROGRAM;
368 let Word1{2-0} = POP_COUNT;
369 let Word1{7-3} = CF_CONST;
370 let Word1{9-8} = COND;
371 let Word1{15-10} = COUNT;
372 let Word1{20} = VALID_PIXEL_MODE;
373 let Word1{21} = END_OF_PROGRAM;
374 let Word1{29-22} = CF_INST;
375 let Word1{31} = BARRIER;
379 field bits<32> Word0;
382 bits<4> KCACHE_BANK0;
383 bits<4> KCACHE_BANK1;
384 bits<2> KCACHE_MODE0;
386 let Word0{21-0} = ADDR;
387 let Word0{25-22} = KCACHE_BANK0;
388 let Word0{29-26} = KCACHE_BANK1;
389 let Word0{31-30} = KCACHE_MODE0;
393 field bits<32> Word1;
395 bits<2> KCACHE_MODE1;
396 bits<8> KCACHE_ADDR0;
397 bits<8> KCACHE_ADDR1;
401 bits<1> WHOLE_QUAD_MODE;
404 let Word1{1-0} = KCACHE_MODE1;
405 let Word1{9-2} = KCACHE_ADDR0;
406 let Word1{17-10} = KCACHE_ADDR1;
407 let Word1{24-18} = COUNT;
408 let Word1{25} = ALT_CONST;
409 let Word1{29-26} = CF_INST;
410 let Word1{30} = WHOLE_QUAD_MODE;
411 let Word1{31} = BARRIER;
414 class CF_ALLOC_EXPORT_WORD0_RAT {
415 field bits<32> Word0;
426 let Word0{3-0} = rat_id;
427 let Word0{9-4} = rat_inst;
428 let Word0{10} = 0; // Reserved
429 let Word0{12-11} = rim;
430 let Word0{14-13} = type;
431 let Word0{21-15} = rw_gpr;
432 let Word0{22} = rw_rel;
433 let Word0{29-23} = index_gpr;
434 let Word0{31-30} = elem_size;
437 class CF_ALLOC_EXPORT_WORD1_BUF {
438 field bits<32> Word1;
449 let Word1{11-0} = array_size;
450 let Word1{15-12} = comp_mask;
451 let Word1{19-16} = burst_count;
454 let Word1{29-22} = cf_inst;
455 let Word1{30} = mark;
456 let Word1{31} = barrier;