1 //===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
13 //===----------------------------------------------------------------------===//
15 #include "AMDGPUSubtarget.h"
16 #include "R600ISelLowering.h"
17 #include "R600InstrInfo.h"
18 #include "R600MachineScheduler.h"
19 #include "SIISelLowering.h"
20 #include "SIInstrInfo.h"
21 #include "llvm/ADT/SmallString.h"
25 #define DEBUG_TYPE "amdgpu-subtarget"
27 #define GET_SUBTARGETINFO_ENUM
28 #define GET_SUBTARGETINFO_TARGET_DESC
29 #define GET_SUBTARGETINFO_CTOR
30 #include "AMDGPUGenSubtargetInfo.inc"
32 static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
33 std::string Ret = "e-p:32:32";
36 // 32-bit private, local, and region pointers. 64-bit global and constant.
37 Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64";
40 Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
41 "-v512:512-v1024:1024-v2048:2048-n32:64";
47 AMDGPUSubtarget::initializeSubtargetDependencies(StringRef GPU, StringRef FS) {
48 // Determine default and user-specified characteristics
49 // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be
50 // enabled, but some instructions do not respect them and they run at the
51 // double precision rate, so don't enable by default.
53 // We want to be able to turn these off, but making this a subtarget feature
54 // for SI has the unhelpful behavior that it unsets everything else if you
57 SmallString<256> FullFS("+promote-alloca,+fp64-denormals,");
60 ParseSubtargetFeatures(GPU, FullFS);
62 // FIXME: I don't think think Evergreen has any useful support for
63 // denormals, but should be checked. Should we issue a warning somewhere
64 // if someone tries to enable these?
65 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
66 FP32Denormals = false;
67 FP64Denormals = false;
72 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS,
74 : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
75 DumpCode(false), R600ALUInst(false), HasVertexCache(false),
76 TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false),
77 FP64Denormals(false), FP32Denormals(false), CaymanISA(false),
78 FlatAddressSpace(false), EnableIRStructurizer(true),
79 EnablePromoteAlloca(false), EnableIfCvt(true),
80 EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),
81 DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))),
82 FrameLowering(TargetFrameLowering::StackGrowsUp,
83 64 * 16, // Maximum stack alignment (long16)
85 InstrItins(getInstrItineraryForCPU(GPU)),
87 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
88 InstrInfo.reset(new R600InstrInfo(*this));
89 TLInfo.reset(new R600TargetLowering(TM));
91 InstrInfo.reset(new SIInstrInfo(*this));
92 TLInfo.reset(new SITargetLowering(TM));
96 unsigned AMDGPUSubtarget::getStackEntrySize() const {
97 assert(getGeneration() <= NORTHERN_ISLANDS);
98 switch(getWavefrontSize()) {
102 return hasCaymanISA() ? 4 : 8;
106 llvm_unreachable("Illegal wavefront size.");
110 unsigned AMDGPUSubtarget::getAmdKernelCodeChipID() const {
111 switch(getGeneration()) {
112 default: llvm_unreachable("ChipID unknown");
113 case SEA_ISLANDS: return 12;