1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetOptions.h"
19 #include "llvm/Target/TargetRegistry.h"
20 #include "llvm/Support/FormattedStream.h"
23 extern "C" void LLVMInitializePowerPCTarget() {
24 // Register the targets
25 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
26 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
29 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
30 if (Subtarget.isDarwin())
31 return new PPCDarwinTargetAsmInfo(*this);
33 return new PPCLinuxTargetAsmInfo(*this);
36 PPCTargetMachine::PPCTargetMachine(const Target&T, const std::string &TT,
37 const std::string &FS, bool is64Bit)
38 : LLVMTargetMachine(T),
39 Subtarget(TT, FS, is64Bit),
40 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
41 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
42 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
44 if (getRelocationModel() == Reloc::Default) {
45 if (Subtarget.isDarwin())
46 setRelocationModel(Reloc::DynamicNoPIC);
48 setRelocationModel(Reloc::Static);
52 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
53 /// groups, which typically degrades performance.
54 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
56 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
57 const std::string &FS)
58 : PPCTargetMachine(T, TT, FS, false) {
62 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
63 const std::string &FS)
64 : PPCTargetMachine(T, TT, FS, true) {
68 //===----------------------------------------------------------------------===//
69 // Pass Pipeline Configuration
70 //===----------------------------------------------------------------------===//
72 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
73 CodeGenOpt::Level OptLevel) {
74 // Install an instruction selector.
75 PM.add(createPPCISelDag(*this));
79 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
80 CodeGenOpt::Level OptLevel) {
81 // Must run branch selection immediately preceding the asm printer.
82 PM.add(createPPCBranchSelectionPass());
86 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
87 CodeGenOpt::Level OptLevel,
88 MachineCodeEmitter &MCE) {
89 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
90 // FIXME: This should be moved to TargetJITInfo!!
91 if (Subtarget.isPPC64()) {
92 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
93 // instructions to materialize arbitrary global variable + function +
94 // constant pool addresses.
95 setRelocationModel(Reloc::PIC_);
96 // Temporary workaround for the inability of PPC64 JIT to handle jump
98 DisableJumpTables = true;
100 setRelocationModel(Reloc::Static);
103 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
105 Subtarget.SetJITMode();
107 // Machine code emitter pass for PowerPC.
108 PM.add(createPPCCodeEmitterPass(*this, MCE));
113 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
114 CodeGenOpt::Level OptLevel,
115 JITCodeEmitter &JCE) {
116 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
117 // FIXME: This should be moved to TargetJITInfo!!
118 if (Subtarget.isPPC64()) {
119 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
120 // instructions to materialize arbitrary global variable + function +
121 // constant pool addresses.
122 setRelocationModel(Reloc::PIC_);
123 // Temporary workaround for the inability of PPC64 JIT to handle jump
125 DisableJumpTables = true;
127 setRelocationModel(Reloc::Static);
130 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
132 Subtarget.SetJITMode();
134 // Machine code emitter pass for PowerPC.
135 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
140 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
141 CodeGenOpt::Level OptLevel,
142 ObjectCodeEmitter &OCE) {
143 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
144 // FIXME: This should be moved to TargetJITInfo!!
145 if (Subtarget.isPPC64()) {
146 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
147 // instructions to materialize arbitrary global variable + function +
148 // constant pool addresses.
149 setRelocationModel(Reloc::PIC_);
150 // Temporary workaround for the inability of PPC64 JIT to handle jump
152 DisableJumpTables = true;
154 setRelocationModel(Reloc::Static);
157 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
159 Subtarget.SetJITMode();
161 // Machine code emitter pass for PowerPC.
162 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
167 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
168 CodeGenOpt::Level OptLevel,
169 MachineCodeEmitter &MCE) {
170 // Machine code emitter pass for PowerPC.
171 PM.add(createPPCCodeEmitterPass(*this, MCE));
175 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
176 CodeGenOpt::Level OptLevel,
177 JITCodeEmitter &JCE) {
178 // Machine code emitter pass for PowerPC.
179 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
183 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
184 CodeGenOpt::Level OptLevel,
185 ObjectCodeEmitter &OCE) {
186 // Machine code emitter pass for PowerPC.
187 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));