1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetOptions.h"
19 #include "llvm/Target/TargetRegistry.h"
20 #include "llvm/Support/FormattedStream.h"
23 extern "C" void LLVMInitializePowerPCTarget() {
24 // Register the targets
25 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
26 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
29 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
30 if (Subtarget.isDarwin())
31 return new PPCDarwinTargetAsmInfo(*this);
32 return new PPCLinuxTargetAsmInfo(*this);
35 PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
36 const std::string &FS, bool is64Bit)
37 : LLVMTargetMachine(T, TT),
38 Subtarget(TT, FS, is64Bit),
39 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
40 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
41 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
43 if (getRelocationModel() == Reloc::Default) {
44 if (Subtarget.isDarwin())
45 setRelocationModel(Reloc::DynamicNoPIC);
47 setRelocationModel(Reloc::Static);
51 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
52 /// groups, which typically degrades performance.
53 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
55 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
56 const std::string &FS)
57 : PPCTargetMachine(T, TT, FS, false) {
61 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
62 const std::string &FS)
63 : PPCTargetMachine(T, TT, FS, true) {
67 //===----------------------------------------------------------------------===//
68 // Pass Pipeline Configuration
69 //===----------------------------------------------------------------------===//
71 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
72 CodeGenOpt::Level OptLevel) {
73 // Install an instruction selector.
74 PM.add(createPPCISelDag(*this));
78 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
79 CodeGenOpt::Level OptLevel) {
80 // Must run branch selection immediately preceding the asm printer.
81 PM.add(createPPCBranchSelectionPass());
85 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
86 CodeGenOpt::Level OptLevel,
87 MachineCodeEmitter &MCE) {
88 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
89 // FIXME: This should be moved to TargetJITInfo!!
90 if (Subtarget.isPPC64()) {
91 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
92 // instructions to materialize arbitrary global variable + function +
93 // constant pool addresses.
94 setRelocationModel(Reloc::PIC_);
95 // Temporary workaround for the inability of PPC64 JIT to handle jump
97 DisableJumpTables = true;
99 setRelocationModel(Reloc::Static);
102 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
104 Subtarget.SetJITMode();
106 // Machine code emitter pass for PowerPC.
107 PM.add(createPPCCodeEmitterPass(*this, MCE));
112 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
113 CodeGenOpt::Level OptLevel,
114 JITCodeEmitter &JCE) {
115 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
116 // FIXME: This should be moved to TargetJITInfo!!
117 if (Subtarget.isPPC64()) {
118 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
119 // instructions to materialize arbitrary global variable + function +
120 // constant pool addresses.
121 setRelocationModel(Reloc::PIC_);
122 // Temporary workaround for the inability of PPC64 JIT to handle jump
124 DisableJumpTables = true;
126 setRelocationModel(Reloc::Static);
129 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
131 Subtarget.SetJITMode();
133 // Machine code emitter pass for PowerPC.
134 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
139 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
140 CodeGenOpt::Level OptLevel,
141 ObjectCodeEmitter &OCE) {
142 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
143 // FIXME: This should be moved to TargetJITInfo!!
144 if (Subtarget.isPPC64()) {
145 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
146 // instructions to materialize arbitrary global variable + function +
147 // constant pool addresses.
148 setRelocationModel(Reloc::PIC_);
149 // Temporary workaround for the inability of PPC64 JIT to handle jump
151 DisableJumpTables = true;
153 setRelocationModel(Reloc::Static);
156 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
158 Subtarget.SetJITMode();
160 // Machine code emitter pass for PowerPC.
161 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
166 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
167 CodeGenOpt::Level OptLevel,
168 MachineCodeEmitter &MCE) {
169 // Machine code emitter pass for PowerPC.
170 PM.add(createPPCCodeEmitterPass(*this, MCE));
174 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
175 CodeGenOpt::Level OptLevel,
176 JITCodeEmitter &JCE) {
177 // Machine code emitter pass for PowerPC.
178 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
182 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
183 CodeGenOpt::Level OptLevel,
184 ObjectCodeEmitter &OCE) {
185 // Machine code emitter pass for PowerPC.
186 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));