1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetOptions.h"
20 #include "llvm/Target/TargetRegistry.h"
21 #include "llvm/Support/FormattedStream.h"
24 extern "C" void LLVMInitializePowerPCTarget() {
25 // Register the targets
26 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
27 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
30 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
31 if (Subtarget.isDarwin())
32 return new PPCDarwinTargetAsmInfo(*this);
34 return new PPCLinuxTargetAsmInfo(*this);
37 PPCTargetMachine::PPCTargetMachine(const Target&T, const Module &M,
38 const std::string &FS, bool is64Bit)
39 : LLVMTargetMachine(T),
40 Subtarget(*this, M, FS, is64Bit),
41 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
42 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
43 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
45 if (getRelocationModel() == Reloc::Default) {
46 if (Subtarget.isDarwin())
47 setRelocationModel(Reloc::DynamicNoPIC);
49 setRelocationModel(Reloc::Static);
53 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
54 /// groups, which typically degrades performance.
55 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
57 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const Module &M,
58 const std::string &FS)
59 : PPCTargetMachine(T, M, FS, false) {
63 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const Module &M,
64 const std::string &FS)
65 : PPCTargetMachine(T, M, FS, true) {
69 //===----------------------------------------------------------------------===//
70 // Pass Pipeline Configuration
71 //===----------------------------------------------------------------------===//
73 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
74 CodeGenOpt::Level OptLevel) {
75 // Install an instruction selector.
76 PM.add(createPPCISelDag(*this));
80 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
81 CodeGenOpt::Level OptLevel) {
82 // Must run branch selection immediately preceding the asm printer.
83 PM.add(createPPCBranchSelectionPass());
87 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
88 CodeGenOpt::Level OptLevel,
89 MachineCodeEmitter &MCE) {
90 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
91 // FIXME: This should be moved to TargetJITInfo!!
92 if (Subtarget.isPPC64()) {
93 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
94 // instructions to materialize arbitrary global variable + function +
95 // constant pool addresses.
96 setRelocationModel(Reloc::PIC_);
97 // Temporary workaround for the inability of PPC64 JIT to handle jump
99 DisableJumpTables = true;
101 setRelocationModel(Reloc::Static);
104 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
106 Subtarget.SetJITMode();
108 // Machine code emitter pass for PowerPC.
109 PM.add(createPPCCodeEmitterPass(*this, MCE));
114 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
115 CodeGenOpt::Level OptLevel,
116 JITCodeEmitter &JCE) {
117 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
118 // FIXME: This should be moved to TargetJITInfo!!
119 if (Subtarget.isPPC64()) {
120 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
121 // instructions to materialize arbitrary global variable + function +
122 // constant pool addresses.
123 setRelocationModel(Reloc::PIC_);
124 // Temporary workaround for the inability of PPC64 JIT to handle jump
126 DisableJumpTables = true;
128 setRelocationModel(Reloc::Static);
131 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
133 Subtarget.SetJITMode();
135 // Machine code emitter pass for PowerPC.
136 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
141 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
142 CodeGenOpt::Level OptLevel,
143 ObjectCodeEmitter &OCE) {
144 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
145 // FIXME: This should be moved to TargetJITInfo!!
146 if (Subtarget.isPPC64()) {
147 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
148 // instructions to materialize arbitrary global variable + function +
149 // constant pool addresses.
150 setRelocationModel(Reloc::PIC_);
151 // Temporary workaround for the inability of PPC64 JIT to handle jump
153 DisableJumpTables = true;
155 setRelocationModel(Reloc::Static);
158 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
160 Subtarget.SetJITMode();
162 // Machine code emitter pass for PowerPC.
163 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
168 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
169 CodeGenOpt::Level OptLevel,
170 MachineCodeEmitter &MCE) {
171 // Machine code emitter pass for PowerPC.
172 PM.add(createPPCCodeEmitterPass(*this, MCE));
176 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
177 CodeGenOpt::Level OptLevel,
178 JITCodeEmitter &JCE) {
179 // Machine code emitter pass for PowerPC.
180 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
184 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
185 CodeGenOpt::Level OptLevel,
186 ObjectCodeEmitter &OCE) {
187 // Machine code emitter pass for PowerPC.
188 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));