1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Support/raw_ostream.h"
24 /// PowerPCTargetMachineModule - Note that this is used on hosts that
25 /// cannot link in a library unless there are references into the
26 /// library. In particular, it seems that it is not possible to get
27 /// things to work on Win32 without this. Though it is unused, do not
29 extern "C" int PowerPCTargetMachineModule;
30 int PowerPCTargetMachineModule = 0;
32 // Register the targets
33 static RegisterTarget<PPC32TargetMachine>
34 X("ppc32", "PowerPC 32");
35 static RegisterTarget<PPC64TargetMachine>
36 Y("ppc64", "PowerPC 64");
38 // Force static initialization when called from llvm/InitializeAllTargets.h
40 void InitializePowerPCTarget() { }
43 // No assembler printer by default
44 PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
46 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
47 if (Subtarget.isDarwin())
48 return new PPCDarwinTargetAsmInfo(*this);
50 return new PPCLinuxTargetAsmInfo(*this);
53 unsigned PPC32TargetMachine::getJITMatchQuality() {
54 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
55 if (sizeof(void*) == 4)
60 unsigned PPC64TargetMachine::getJITMatchQuality() {
61 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
62 if (sizeof(void*) == 8)
68 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
69 // We strongly match "powerpc-*".
70 std::string TT = M.getTargetTriple();
71 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
74 // If the target triple is something non-powerpc, we don't match.
75 if (!TT.empty()) return 0;
77 if (M.getEndianness() == Module::BigEndian &&
78 M.getPointerSize() == Module::Pointer32)
79 return 10; // Weak match
80 else if (M.getEndianness() != Module::AnyEndianness ||
81 M.getPointerSize() != Module::AnyPointerSize)
82 return 0; // Match for some other target
84 return getJITMatchQuality()/2;
87 unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
88 // We strongly match "powerpc64-*".
89 std::string TT = M.getTargetTriple();
90 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
93 if (M.getEndianness() == Module::BigEndian &&
94 M.getPointerSize() == Module::Pointer64)
95 return 10; // Weak match
96 else if (M.getEndianness() != Module::AnyEndianness ||
97 M.getPointerSize() != Module::AnyPointerSize)
98 return 0; // Match for some other target
100 return getJITMatchQuality()/2;
104 PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
106 : Subtarget(*this, M, FS, is64Bit),
107 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
108 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
109 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
111 if (getRelocationModel() == Reloc::Default) {
112 if (Subtarget.isDarwin())
113 setRelocationModel(Reloc::DynamicNoPIC);
115 setRelocationModel(Reloc::Static);
119 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
120 /// groups, which typically degrades performance.
121 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
123 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
124 : PPCTargetMachine(M, FS, false) {
128 PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
129 : PPCTargetMachine(M, FS, true) {
133 //===----------------------------------------------------------------------===//
134 // Pass Pipeline Configuration
135 //===----------------------------------------------------------------------===//
137 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
138 CodeGenOpt::Level OptLevel) {
139 // Install an instruction selector.
140 PM.add(createPPCISelDag(*this));
144 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
145 CodeGenOpt::Level OptLevel) {
146 // Must run branch selection immediately preceding the asm printer.
147 PM.add(createPPCBranchSelectionPass());
151 bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
152 CodeGenOpt::Level OptLevel,
155 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
157 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
162 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
163 CodeGenOpt::Level OptLevel,
164 bool DumpAsm, MachineCodeEmitter &MCE) {
165 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
166 // FIXME: This should be moved to TargetJITInfo!!
167 if (Subtarget.isPPC64()) {
168 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
169 // instructions to materialize arbitrary global variable + function +
170 // constant pool addresses.
171 setRelocationModel(Reloc::PIC_);
172 // Temporary workaround for the inability of PPC64 JIT to handle jump
174 DisableJumpTables = true;
176 setRelocationModel(Reloc::Static);
179 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
181 Subtarget.SetJITMode();
183 // Machine code emitter pass for PowerPC.
184 PM.add(createPPCCodeEmitterPass(*this, MCE));
186 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
188 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
194 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
195 CodeGenOpt::Level OptLevel,
196 bool DumpAsm, JITCodeEmitter &JCE) {
197 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
198 // FIXME: This should be moved to TargetJITInfo!!
199 if (Subtarget.isPPC64()) {
200 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
201 // instructions to materialize arbitrary global variable + function +
202 // constant pool addresses.
203 setRelocationModel(Reloc::PIC_);
204 // Temporary workaround for the inability of PPC64 JIT to handle jump
206 DisableJumpTables = true;
208 setRelocationModel(Reloc::Static);
211 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
213 Subtarget.SetJITMode();
215 // Machine code emitter pass for PowerPC.
216 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
218 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
220 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
226 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
227 CodeGenOpt::Level OptLevel,
229 MachineCodeEmitter &MCE) {
230 // Machine code emitter pass for PowerPC.
231 PM.add(createPPCCodeEmitterPass(*this, MCE));
233 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
235 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
241 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
242 CodeGenOpt::Level OptLevel,
244 JITCodeEmitter &JCE) {
245 // Machine code emitter pass for PowerPC.
246 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
248 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
250 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));