1 //===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #include "PPCSubtarget.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetRegistry.h"
21 #define GET_SUBTARGETINFO_ENUM
22 #define GET_SUBTARGETINFO_MC_DESC
23 #define GET_SUBTARGETINFO_TARGET_DESC
24 #define GET_SUBTARGETINFO_CTOR
25 #include "PPCGenSubtargetInfo.inc"
29 #if defined(__APPLE__)
30 #include <mach/mach.h>
31 #include <mach/mach_host.h>
32 #include <mach/host_info.h>
33 #include <mach/machine.h>
35 /// GetCurrentPowerPCFeatures - Returns the current CPUs features.
36 static const char *GetCurrentPowerPCCPU() {
37 host_basic_info_data_t hostInfo;
38 mach_msg_type_number_t infoCount;
40 infoCount = HOST_BASIC_INFO_COUNT;
41 host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo,
44 if (hostInfo.cpu_type != CPU_TYPE_POWERPC) return "generic";
46 switch(hostInfo.cpu_subtype) {
47 case CPU_SUBTYPE_POWERPC_601: return "601";
48 case CPU_SUBTYPE_POWERPC_602: return "602";
49 case CPU_SUBTYPE_POWERPC_603: return "603";
50 case CPU_SUBTYPE_POWERPC_603e: return "603e";
51 case CPU_SUBTYPE_POWERPC_603ev: return "603ev";
52 case CPU_SUBTYPE_POWERPC_604: return "604";
53 case CPU_SUBTYPE_POWERPC_604e: return "604e";
54 case CPU_SUBTYPE_POWERPC_620: return "620";
55 case CPU_SUBTYPE_POWERPC_750: return "750";
56 case CPU_SUBTYPE_POWERPC_7400: return "7400";
57 case CPU_SUBTYPE_POWERPC_7450: return "7450";
58 case CPU_SUBTYPE_POWERPC_970: return "970";
67 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
68 const std::string &FS, bool is64Bit)
69 : PPCGenSubtargetInfo(TT, CPU, FS)
71 , DarwinDirective(PPC::DIR_NONE)
72 , IsGigaProcessor(false)
73 , Has64BitSupport(false)
79 , HasLazyResolverStubs(false)
80 , IsJITCodeModel(false)
83 // Determine default and user specified characteristics
84 std::string CPUName = CPU;
87 #if defined(__APPLE__)
88 if (CPUName == "generic")
89 CPUName = GetCurrentPowerPCCPU();
92 // Parse features string.
93 ParseSubtargetFeatures(CPUName, FS);
95 // Initialize scheduling itinerary for the specified CPU.
96 InstrItins = getInstrItineraryForCPU(CPUName);
98 // If we are generating code for ppc64, verify that options make sense.
100 Has64BitSupport = true;
101 // Silently force 64-bit register use on ppc64.
105 // If the user requested use of 64-bit regs, but the cpu selected doesn't
106 // support it, ignore.
107 if (use64BitRegs() && !has64BitSupport())
108 Use64BitRegs = false;
110 // Set up darwin-specific properties.
112 HasLazyResolverStubs = true;
115 /// SetJITMode - This is called to inform the subtarget info that we are
116 /// producing code for the JIT.
117 void PPCSubtarget::SetJITMode() {
118 // JIT mode doesn't want lazy resolver stubs, it knows exactly where
119 // everything is. This matters for PPC64, which codegens in PIC mode without
121 HasLazyResolverStubs = false;
123 // Calls to external functions need to use indirect calls
124 IsJITCodeModel = true;
128 /// hasLazyResolverStub - Return true if accesses to the specified global have
129 /// to go through a dyld lazy resolution stub. This means that an extra load
130 /// is required to get the address of the global.
131 bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
132 const TargetMachine &TM) const {
133 // We never have stubs if HasLazyResolverStubs=false or if in static mode.
134 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
136 // If symbol visibility is hidden, the extra load is not needed if
137 // the symbol is definitely defined in the current translation unit.
138 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
139 if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
141 return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
142 GV->hasCommonLinkage() || isDecl;
145 MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
147 MCSubtargetInfo *X = new MCSubtargetInfo();
148 InitPPCMCSubtargetInfo(X, CPU, FS);
152 extern "C" void LLVMInitializePowerPCMCSubtargetInfo() {
153 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
154 createPPCMCSubtargetInfo);
155 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
156 createPPCMCSubtargetInfo);