lib/Target/PowerPC/PPCRegisterInfo.h

   1 //===- PPC32RegisterInfo.h - PowerPC32 Register Information Impl -*- C++ -*-==//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the PowerPC implementation of the MRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef POWERPC32_REGISTERINFO_H
  15 #define POWERPC32_REGISTERINFO_H
  16
  17 #include "PowerPC.h"
  18 #include "PPC32GenRegisterInfo.h.inc"
  19 #include <map>
  20
  21 namespace llvm {
  22
  23 class Type;
  24
  25 class PPC32RegisterInfo : public PPC32GenRegisterInfo {
  26   std::map<unsigned, unsigned> ImmToIdxMap;
  27 public:
  28   PPC32RegisterInfo();
  29
  30   /// Code Generation virtual methods...
  31   void storeRegToStackSlot(MachineBasicBlock &MBB,
  32                            MachineBasicBlock::iterator MBBI,
  33                            unsigned SrcReg, int FrameIndex) const;
  34
  35   void loadRegFromStackSlot(MachineBasicBlock &MBB,
  36                             MachineBasicBlock::iterator MBBI,
  37                             unsigned DestReg, int FrameIndex) const;
  38
  39   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
  40                     unsigned DestReg, unsigned SrcReg,
  41                     const TargetRegisterClass *RC) const;
  42
  43   /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
  44   /// copy instructions, turning them into load/store instructions.
  45   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
  46                                           int FrameIndex) const;
  47
  48   void eliminateCallFramePseudoInstr(MachineFunction &MF,
  49                                      MachineBasicBlock &MBB,
  50                                      MachineBasicBlock::iterator I) const;
  51
  52   void eliminateFrameIndex(MachineBasicBlock::iterator II) const;
  53
  54   void emitPrologue(MachineFunction &MF) const;
  55   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
  56 };
  57
  58 } // end namespace llvm
  59
  60 #endif