1 //===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass identifies loops where we can generate the PPC branch instructions
11 // that decrement and test the count register (CTR) (bdnz and friends).
13 // The pattern that defines the induction variable can changed depending on
14 // prior optimizations. For example, the IndVarSimplify phase run by 'opt'
15 // normalizes induction variables, and the Loop Strength Reduction pass
16 // run by 'llc' may also make changes to the induction variable.
18 // Criteria for CTR loops:
19 // - Countable loops (w/ ind. var for a trip count)
20 // - Try inner-most loops first
21 // - No nested CTR loops.
22 // - No function calls in loops.
24 //===----------------------------------------------------------------------===//
26 #define DEBUG_TYPE "ctrloops"
28 #include "llvm/Transforms/Scalar.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
31 #include "llvm/Analysis/Dominators.h"
32 #include "llvm/Analysis/LoopInfo.h"
33 #include "llvm/Analysis/ScalarEvolutionExpander.h"
34 #include "llvm/IR/Constants.h"
35 #include "llvm/IR/DerivedTypes.h"
36 #include "llvm/IR/InlineAsm.h"
37 #include "llvm/IR/Instructions.h"
38 #include "llvm/IR/IntrinsicInst.h"
39 #include "llvm/IR/Module.h"
40 #include "llvm/PassSupport.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ValueHandle.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
46 #include "llvm/Transforms/Utils/Local.h"
47 #include "llvm/Transforms/Utils/LoopUtils.h"
48 #include "llvm/Target/TargetLibraryInfo.h"
49 #include "PPCTargetMachine.h"
53 #include "llvm/CodeGen/MachineDominators.h"
54 #include "llvm/CodeGen/MachineFunction.h"
55 #include "llvm/CodeGen/MachineFunctionPass.h"
56 #include "llvm/CodeGen/MachineRegisterInfo.h"
65 static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1));
68 STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
71 void initializePPCCTRLoopsPass(PassRegistry&);
73 void initializePPCCTRLoopsVerifyPass(PassRegistry&);
78 struct PPCCTRLoops : public FunctionPass {
87 PPCCTRLoops() : FunctionPass(ID), TM(0) {
88 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
90 PPCCTRLoops(PPCTargetMachine &TM) : FunctionPass(ID), TM(&TM) {
91 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
94 virtual bool runOnFunction(Function &F);
96 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
97 AU.addRequired<LoopInfo>();
98 AU.addPreserved<LoopInfo>();
99 AU.addRequired<DominatorTree>();
100 AU.addPreserved<DominatorTree>();
101 AU.addRequired<ScalarEvolution>();
105 bool mightUseCTR(const Triple &TT, BasicBlock *BB);
106 bool convertToCTRLoop(Loop *L);
109 PPCTargetMachine *TM;
114 const TargetLibraryInfo *LibInfo;
117 char PPCCTRLoops::ID = 0;
119 int PPCCTRLoops::Counter = 0;
123 struct PPCCTRLoopsVerify : public MachineFunctionPass {
127 PPCCTRLoopsVerify() : MachineFunctionPass(ID) {
128 initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry());
131 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
132 AU.addRequired<MachineDominatorTree>();
133 MachineFunctionPass::getAnalysisUsage(AU);
136 virtual bool runOnMachineFunction(MachineFunction &MF);
139 MachineDominatorTree *MDT;
142 char PPCCTRLoopsVerify::ID = 0;
144 } // end anonymous namespace
146 INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
148 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
149 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
150 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
151 INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
154 FunctionPass *llvm::createPPCCTRLoops(PPCTargetMachine &TM) {
155 return new PPCCTRLoops(TM);
159 INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
160 "PowerPC CTR Loops Verify", false, false)
161 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
162 INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
163 "PowerPC CTR Loops Verify", false, false)
165 FunctionPass *llvm::createPPCCTRLoopsVerify() {
166 return new PPCCTRLoopsVerify();
170 bool PPCCTRLoops::runOnFunction(Function &F) {
171 LI = &getAnalysis<LoopInfo>();
172 SE = &getAnalysis<ScalarEvolution>();
173 DT = &getAnalysis<DominatorTree>();
174 TD = getAnalysisIfAvailable<DataLayout>();
175 LibInfo = getAnalysisIfAvailable<TargetLibraryInfo>();
177 bool MadeChange = false;
179 for (LoopInfo::iterator I = LI->begin(), E = LI->end();
182 if (!L->getParentLoop())
183 MadeChange |= convertToCTRLoop(L);
189 bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
190 for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
192 if (CallInst *CI = dyn_cast<CallInst>(J)) {
193 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
194 // Inline ASM is okay, unless it clobbers the ctr register.
195 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
196 for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) {
197 InlineAsm::ConstraintInfo &C = CIV[i];
198 if (C.Type != InlineAsm::isInput)
199 for (unsigned j = 0, je = C.Codes.size(); j < je; ++j)
200 if (StringRef(C.Codes[j]).equals_lower("{ctr}"))
209 const TargetLowering *TLI = TM->getTargetLowering();
211 if (Function *F = CI->getCalledFunction()) {
212 // Most intrinsics don't become function calls, but some might.
213 // sin, cos, exp and log are always calls.
215 if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
216 switch (F->getIntrinsicID()) {
219 // VisualStudio defines setjmp as _setjmp
220 #if defined(_MSC_VER) && defined(setjmp) && \
221 !defined(setjmp_undefined_for_msvc)
222 # pragma push_macro("setjmp")
224 # define setjmp_undefined_for_msvc
227 case Intrinsic::setjmp:
229 #if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
230 // let's return it to _setjmp state
231 # pragma pop_macro("setjmp")
232 # undef setjmp_undefined_for_msvc
235 case Intrinsic::longjmp:
237 // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp
238 // because, although it does clobber the counter register, the
239 // control can't then return to inside the loop unless there is also
240 // an eh_sjlj_setjmp.
241 case Intrinsic::eh_sjlj_setjmp:
243 case Intrinsic::memcpy:
244 case Intrinsic::memmove:
245 case Intrinsic::memset:
246 case Intrinsic::powi:
248 case Intrinsic::log2:
249 case Intrinsic::log10:
251 case Intrinsic::exp2:
256 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
257 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
258 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
259 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
260 case Intrinsic::rint: Opcode = ISD::FRINT; break;
261 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
262 case Intrinsic::round: Opcode = ISD::FROUND; break;
266 // PowerPC does not use [US]DIVREM or other library calls for
267 // operations on regular types which are not otherwise library calls
268 // (i.e. soft float or atomics). If adapting for targets that do,
269 // additional care is required here.
272 if (!F->hasLocalLinkage() && F->hasName() && LibInfo &&
273 LibInfo->getLibFunc(F->getName(), Func) &&
274 LibInfo->hasOptimizedCodeGen(Func)) {
275 // Non-read-only functions are never treated as intrinsics.
276 if (!CI->onlyReadsMemory())
279 // Conversion happens only for FP calls.
280 if (!CI->getArgOperand(0)->getType()->isFloatingPointTy())
284 default: return true;
285 case LibFunc::copysign:
286 case LibFunc::copysignf:
287 continue; // ISD::FCOPYSIGN is never a library call.
288 case LibFunc::copysignl:
293 continue; // ISD::FABS is never a library call.
297 Opcode = ISD::FSQRT; break;
299 case LibFunc::floorf:
300 case LibFunc::floorl:
301 Opcode = ISD::FFLOOR; break;
302 case LibFunc::nearbyint:
303 case LibFunc::nearbyintf:
304 case LibFunc::nearbyintl:
305 Opcode = ISD::FNEARBYINT; break;
309 Opcode = ISD::FCEIL; break;
313 Opcode = ISD::FRINT; break;
315 case LibFunc::roundf:
316 case LibFunc::roundl:
317 Opcode = ISD::FROUND; break;
319 case LibFunc::truncf:
320 case LibFunc::truncl:
321 Opcode = ISD::FTRUNC; break;
325 TLI->getSimpleValueType(CI->getArgOperand(0)->getType(), true);
326 if (VTy == MVT::Other)
329 if (TLI->isOperationLegalOrCustom(Opcode, VTy))
331 else if (VTy.isVector() &&
332 TLI->isOperationLegalOrCustom(Opcode, VTy.getScalarType()))
340 } else if (isa<BinaryOperator>(J) &&
341 J->getType()->getScalarType()->isPPC_FP128Ty()) {
342 // Most operations on ppc_f128 values become calls.
344 } else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) ||
345 isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) {
346 CastInst *CI = cast<CastInst>(J);
347 if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() ||
348 CI->getDestTy()->getScalarType()->isPPC_FP128Ty() ||
350 (CI->getSrcTy()->getScalarType()->isIntegerTy(64) ||
351 CI->getDestTy()->getScalarType()->isIntegerTy(64))
354 } else if (TT.isArch32Bit() &&
355 J->getType()->getScalarType()->isIntegerTy(64) &&
356 (J->getOpcode() == Instruction::UDiv ||
357 J->getOpcode() == Instruction::SDiv ||
358 J->getOpcode() == Instruction::URem ||
359 J->getOpcode() == Instruction::SRem)) {
361 } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) {
362 // On PowerPC, indirect jumps use the counter register.
364 } else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) {
367 const TargetLowering *TLI = TM->getTargetLowering();
369 if (TLI->supportJumpTables() &&
370 SI->getNumCases()+1 >= (unsigned) TLI->getMinimumJumpTableEntries())
378 bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
379 bool MadeChange = false;
381 Triple TT = Triple(L->getHeader()->getParent()->getParent()->
383 if (!TT.isArch32Bit() && !TT.isArch64Bit())
384 return MadeChange; // Unknown arch. type.
386 // Process nested loops first.
387 for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
388 MadeChange |= convertToCTRLoop(*I);
391 // If a nested loop has been converted, then we can't convert this loop.
396 // Stop trying after reaching the limit (if any).
397 int Limit = CTRLoopLimit;
399 if (Counter >= CTRLoopLimit)
405 // We don't want to spill/restore the counter register, and so we don't
406 // want to use the counter register if the loop contains calls.
407 for (Loop::block_iterator I = L->block_begin(), IE = L->block_end();
409 if (mightUseCTR(TT, *I))
412 SmallVector<BasicBlock*, 4> ExitingBlocks;
413 L->getExitingBlocks(ExitingBlocks);
415 BasicBlock *CountedExitBlock = 0;
416 const SCEV *ExitCount = 0;
417 BranchInst *CountedExitBranch = 0;
418 for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(),
419 IE = ExitingBlocks.end(); I != IE; ++I) {
420 const SCEV *EC = SE->getExitCount(L, *I);
421 DEBUG(dbgs() << "Exit Count for " << *L << " from block " <<
422 (*I)->getName() << ": " << *EC << "\n");
423 if (isa<SCEVCouldNotCompute>(EC))
425 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
426 if (ConstEC->getValue()->isZero())
428 } else if (!SE->isLoopInvariant(EC, L))
431 if (SE->getTypeSizeInBits(EC->getType()) > (TT.isArch64Bit() ? 64 : 32))
434 // We now have a loop-invariant count of loop iterations (which is not the
435 // constant zero) for which we know that this loop will not exit via this
438 // We need to make sure that this block will run on every loop iteration.
439 // For this to be true, we must dominate all blocks with backedges. Such
440 // blocks are in-loop predecessors to the header block.
441 bool NotAlways = false;
442 for (pred_iterator PI = pred_begin(L->getHeader()),
443 PIE = pred_end(L->getHeader()); PI != PIE; ++PI) {
444 if (!L->contains(*PI))
447 if (!DT->dominates(*I, *PI)) {
456 // Make sure this blocks ends with a conditional branch.
457 Instruction *TI = (*I)->getTerminator();
461 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
462 if (!BI->isConditional())
465 CountedExitBranch = BI;
469 // Note that this block may not be the loop latch block, even if the loop
470 // has a latch block.
471 CountedExitBlock = *I;
476 if (!CountedExitBlock)
479 BasicBlock *Preheader = L->getLoopPreheader();
481 // If we don't have a preheader, then insert one. If we already have a
482 // preheader, then we can use it (except if the preheader contains a use of
483 // the CTR register because some such uses might be reordered by the
484 // selection DAG after the mtctr instruction).
485 if (!Preheader || mightUseCTR(TT, Preheader))
486 Preheader = InsertPreheaderForLoop(L, this);
490 DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n");
492 // Insert the count into the preheader and replace the condition used by the
496 SCEVExpander SCEVE(*SE, "loopcnt");
497 LLVMContext &C = SE->getContext();
498 Type *CountType = TT.isArch64Bit() ? Type::getInt64Ty(C) :
500 if (!ExitCount->getType()->isPointerTy() &&
501 ExitCount->getType() != CountType)
502 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType);
503 ExitCount = SE->getAddExpr(ExitCount,
504 SE->getConstant(CountType, 1));
505 Value *ECValue = SCEVE.expandCodeFor(ExitCount, CountType,
506 Preheader->getTerminator());
508 IRBuilder<> CountBuilder(Preheader->getTerminator());
509 Module *M = Preheader->getParent()->getParent();
510 Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr,
512 CountBuilder.CreateCall(MTCTRFunc, ECValue);
514 IRBuilder<> CondBuilder(CountedExitBranch);
516 Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero);
517 Value *NewCond = CondBuilder.CreateCall(DecFunc);
518 Value *OldCond = CountedExitBranch->getCondition();
519 CountedExitBranch->setCondition(NewCond);
521 // The false branch must exit the loop.
522 if (!L->contains(CountedExitBranch->getSuccessor(0)))
523 CountedExitBranch->swapSuccessors();
525 // The old condition may be dead now, and may have even created a dead PHI
526 // (the original induction variable).
527 RecursivelyDeleteTriviallyDeadInstructions(OldCond);
528 DeleteDeadPHIs(CountedExitBlock);
535 static bool clobbersCTR(const MachineInstr *MI) {
536 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
537 const MachineOperand &MO = MI->getOperand(i);
539 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
541 } else if (MO.isRegMask()) {
542 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8))
550 static bool verifyCTRBranch(MachineBasicBlock *MBB,
551 MachineBasicBlock::iterator I) {
552 MachineBasicBlock::iterator BI = I;
553 SmallSet<MachineBasicBlock *, 16> Visited;
554 SmallVector<MachineBasicBlock *, 8> Preds;
557 if (I == MBB->begin()) {
569 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
570 unsigned Opc = I->getOpcode();
571 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) {
576 if (I != BI && clobbersCTR(I)) {
577 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" <<
578 MBB->getFullName() << ") instruction " << *I <<
579 " clobbers CTR, invalidating " << "BB#" <<
580 BI->getParent()->getNumber() << " (" <<
581 BI->getParent()->getFullName() << ") instruction " <<
590 if (!CheckPreds && Preds.empty())
595 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) {
596 DEBUG(dbgs() << "Unable to find a MTCTR instruction for BB#" <<
597 BI->getParent()->getNumber() << " (" <<
598 BI->getParent()->getFullName() << ") instruction " <<
603 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
604 PIE = MBB->pred_end(); PI != PIE; ++PI)
605 Preds.push_back(*PI);
609 MBB = Preds.pop_back_val();
610 if (!Visited.count(MBB)) {
611 I = MBB->getLastNonDebugInstr();
614 } while (!Preds.empty());
619 bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) {
620 MDT = &getAnalysis<MachineDominatorTree>();
622 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before
623 // any other instructions that might clobber the ctr register.
624 for (MachineFunction::iterator I = MF.begin(), IE = MF.end();
626 MachineBasicBlock *MBB = I;
627 if (!MDT->isReachableFromEntry(MBB))
630 for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(),
631 MIIE = MBB->end(); MII != MIIE; ++MII) {
632 unsigned Opc = MII->getOpcode();
633 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ ||
634 Opc == PPC::BDZ8 || Opc == PPC::BDZ)
635 if (!verifyCTRBranch(MBB, MII))
636 llvm_unreachable("Invalid PPC CTR loop!");