1 //===-- PPCBranchSelector.cpp - Emit long conditional branches-----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Baegeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that scans a machine function to determine which
11 // conditional branches need more than 16 bits of displacement to reach their
12 // target basic block. It does this in two passes; a calculation of basic block
13 // positions pass, and a branch psuedo op to machine branch opcode pass. This
14 // pass should be run last, just before the assembly printer.
16 //===----------------------------------------------------------------------===//
19 #include "PPCInstrBuilder.h"
20 #include "PPCInstrInfo.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetAsmInfo.h"
24 #include "llvm/ADT/Statistic.h"
25 #include "llvm/Support/Compiler.h"
29 static Statistic<> NumExpanded("ppc-branch-select",
30 "Num branches expanded to long format");
33 struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
34 /// OffsetMap - Mapping between BB and byte offset from start of function.
35 /// TODO: replace this with a vector, using the MBB idx as the key.
36 std::map<MachineBasicBlock*, unsigned> OffsetMap;
38 virtual bool runOnMachineFunction(MachineFunction &Fn);
40 virtual const char *getPassName() const {
41 return "PowerPC Branch Selection";
46 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
49 FunctionPass *llvm::createPPCBranchSelectionPass() {
53 /// getNumBytesForInstruction - Return the number of bytes of code the specified
54 /// instruction may be. This returns the maximum number of bytes.
56 static unsigned getNumBytesForInstruction(MachineInstr *MI) {
57 switch (MI->getOpcode()) {
58 case PPC::COND_BRANCH:
59 // while this will be 4 most of the time, if we emit 8 it is just a
60 // minor pessimization that saves us from having to worry about
61 // keeping the offsets up to date later when we emit long branch glue.
63 case PPC::IMPLICIT_DEF_GPRC: // no asm emitted
64 case PPC::IMPLICIT_DEF_G8RC: // no asm emitted
65 case PPC::IMPLICIT_DEF_F4: // no asm emitted
66 case PPC::IMPLICIT_DEF_F8: // no asm emitted
67 case PPC::IMPLICIT_DEF_VRRC: // no asm emitted
69 case PPC::INLINEASM: { // Inline Asm: Variable size.
70 MachineFunction *MF = MI->getParent()->getParent();
71 const char *AsmStr = MI->getOperand(0).getSymbolName();
72 return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr);
75 return 4; // PowerPC instructions are all 4 bytes
80 bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
81 // Running total of instructions encountered since beginning of function
82 unsigned ByteCount = 0;
84 // For each MBB, add its offset to the offset map, and count up its
86 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
88 MachineBasicBlock *MBB = MFI;
89 OffsetMap[MBB] = ByteCount;
91 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
93 ByteCount += getNumBytesForInstruction(MBBI);
96 // We're about to run over the MBB's again, so reset the ByteCount
99 // For each MBB, find the conditional branch pseudo instructions, and
100 // calculate the difference between the target MBB and the current ICount
101 // to decide whether or not to emit a short or long branch.
109 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
111 MachineBasicBlock *MBB = MFI;
113 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
114 MBBI != EE; ++MBBI) {
115 // We may end up deleting the MachineInstr that MBBI points to, so
116 // remember its opcode now so we can refer to it after calling erase()
117 unsigned ByteSize = getNumBytesForInstruction(MBBI);
118 if (MBBI->getOpcode() != PPC::COND_BRANCH) {
119 ByteCount += ByteSize;
123 // condbranch operands:
125 // 1. PPC branch opcode
127 MachineBasicBlock *DestMBB = MBBI->getOperand(2).getMachineBasicBlock();
128 unsigned Opcode = MBBI->getOperand(1).getImmedValue();
129 unsigned CRReg = MBBI->getOperand(0).getReg();
131 int Displacement = OffsetMap[DestMBB] - ByteCount;
132 unsigned Inverted = PPCInstrInfo::invertPPCBranchOpcode(Opcode);
134 MachineBasicBlock::iterator MBBJ;
135 if (Displacement >= -32768 && Displacement <= 32767) {
136 MBBJ = BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(DestMBB);
138 // Long branch, skip next branch instruction (i.e. $PC+8).
140 BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
141 MBBJ = BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(DestMBB);
144 // Erase the psuedo COND_BRANCH instruction, and then back up the
145 // iterator so that when the for loop increments it, we end up in
146 // the correct place rather than iterating off the end.
149 ByteCount += ByteSize;