1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/MC/MCAsmBackend.h"
11 #include "MCTargetDesc/PPCMCTargetDesc.h"
12 #include "MCTargetDesc/PPCFixupKinds.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCMachObjectWriter.h"
15 #include "llvm/MC/MCSectionMachO.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/Object/MachOFormat.h"
19 #include "llvm/Support/ELF.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/TargetRegistry.h"
24 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
27 llvm_unreachable("Unknown fixup kind!");
32 case PPC::fixup_ppc_brcond14:
33 return Value & 0x3ffc;
34 case PPC::fixup_ppc_br24:
35 return Value & 0x3fffffc;
37 case PPC::fixup_ppc_hi16:
38 return (Value >> 16) & 0xffff;
40 case PPC::fixup_ppc_ha16:
41 return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
42 case PPC::fixup_ppc_lo16:
43 return Value & 0xffff;
48 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
50 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
52 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
54 void RecordRelocation(MachObjectWriter *Writer,
55 const MCAssembler &Asm, const MCAsmLayout &Layout,
56 const MCFragment *Fragment, const MCFixup &Fixup,
57 MCValue Target, uint64_t &FixedValue) {}
60 class PPCELFObjectWriter : public MCELFObjectTargetWriter {
62 PPCELFObjectWriter(bool Is64Bit, Triple::OSType OSType, uint16_t EMachine,
63 bool HasRelocationAddend, bool isLittleEndian)
64 : MCELFObjectTargetWriter(Is64Bit, OSType, EMachine, HasRelocationAddend) {}
67 class PPCAsmBackend : public MCAsmBackend {
68 const Target &TheTarget;
70 PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
72 unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
74 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
75 const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
76 // name offset bits flags
77 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
78 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
79 { "fixup_ppc_lo16", 16, 16, 0 },
80 { "fixup_ppc_ha16", 16, 16, 0 },
81 { "fixup_ppc_lo14", 16, 14, 0 }
84 if (Kind < FirstTargetFixupKind)
85 return MCAsmBackend::getFixupKindInfo(Kind);
87 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
89 return Infos[Kind - FirstTargetFixupKind];
92 bool MayNeedRelaxation(const MCInst &Inst) const {
97 bool fixupNeedsRelaxation(const MCFixup &Fixup,
99 const MCInstFragment *DF,
100 const MCAsmLayout &Layout) const {
102 assert(0 && "RelaxInstruction() unimplemented");
107 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
109 assert(0 && "RelaxInstruction() unimplemented");
112 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
113 // FIXME: Zero fill for now. That's not right, but at least will get the
114 // section size right.
115 for (uint64_t i = 0; i != Count; ++i)
120 unsigned getPointerSize() const {
121 StringRef Name = TheTarget.getName();
122 if (Name == "ppc64") return 8;
123 assert(Name == "ppc32" && "Unknown target name!");
127 } // end anonymous namespace
130 // FIXME: This should be in a separate file.
132 class DarwinPPCAsmBackend : public PPCAsmBackend {
134 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
136 void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
137 uint64_t Value) const {
138 assert(0 && "UNIMP");
141 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
142 bool is64 = getPointerSize() == 8;
143 return createMachObjectWriter(new PPCMachObjectWriter(
145 (is64 ? object::mach::CTM_PowerPC64 :
146 object::mach::CTM_PowerPC),
147 object::mach::CSPPC_ALL),
148 OS, /*IsLittleEndian=*/false);
151 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
156 class ELFPPCAsmBackend : public PPCAsmBackend {
157 Triple::OSType OSType;
159 ELFPPCAsmBackend(const Target &T, Triple::OSType OSType) :
160 PPCAsmBackend(T), OSType(OSType) { }
162 void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
163 uint64_t Value) const {
164 Value = adjustFixupValue(Fixup.getKind(), Value);
165 if (!Value) return; // Doesn't change encoding.
167 unsigned Offset = Fixup.getOffset();
169 // For each byte of the fragment that the fixup touches, mask in the bits from
170 // the fixup value. The Value has been "split up" into the appropriate
172 for (unsigned i = 0; i != 4; ++i)
173 Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
176 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
177 bool is64 = getPointerSize() == 8;
178 return createELFObjectWriter(new PPCELFObjectWriter(
181 is64 ? ELF::EM_PPC64 : ELF::EM_PPC,
182 /*addend*/ true, /*isLittleEndian*/ false),
183 OS, /*IsLittleEndian=*/false);
186 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
191 } // end anonymous namespace
196 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT) {
197 if (Triple(TT).isOSDarwin())
198 return new DarwinPPCAsmBackend(T);
200 return new ELFPPCAsmBackend(T, Triple(TT).getOS());