lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp

   1 //===-- PTXMCTargetDesc.cpp - PTX Target Descriptions ---------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides PTX specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PTXMCTargetDesc.h"
  15 #include "PTXMCAsmInfo.h"
  16 #include "InstPrinter/PTXInstPrinter.h"
  17 #include "llvm/MC/MCCodeGenInfo.h"
  18 #include "llvm/MC/MCInstrInfo.h"
  19 #include "llvm/MC/MCRegisterInfo.h"
  20 #include "llvm/MC/MCSubtargetInfo.h"
  21 #include "llvm/Support/TargetRegistry.h"
  22
  23 #define GET_INSTRINFO_MC_DESC
  24 #include "PTXGenInstrInfo.inc"
  25
  26 #define GET_SUBTARGETINFO_MC_DESC
  27 #include "PTXGenSubtargetInfo.inc"
  28
  29 #define GET_REGINFO_MC_DESC
  30 #include "PTXGenRegisterInfo.inc"
  31
  32 using namespace llvm;
  33
  34 static MCInstrInfo *createPTXMCInstrInfo() {
  35   MCInstrInfo *X = new MCInstrInfo();
  36   InitPTXMCInstrInfo(X);
  37   return X;
  38 }
  39
  40 static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
  41   MCRegisterInfo *X = new MCRegisterInfo();
  42   // PTX does not have a return address register.
  43   InitPTXMCRegisterInfo(X, 0);
  44   return X;
  45 }
  46
  47 static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
  48                                                  StringRef FS) {
  49   MCSubtargetInfo *X = new MCSubtargetInfo();
  50   InitPTXMCSubtargetInfo(X, TT, CPU, FS);
  51   return X;
  52 }
  53
  54 static MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  55                                              CodeModel::Model CM,
  56                                              CodeGenOpt::Level OL) {
  57   MCCodeGenInfo *X = new MCCodeGenInfo();
  58   X->InitMCCodeGenInfo(RM, CM, OL);
  59   return X;
  60 }
  61
  62 static MCInstPrinter *createPTXMCInstPrinter(const Target &T,
  63                                              unsigned SyntaxVariant,
  64                                              const MCAsmInfo &MAI,
  65                                              const MCSubtargetInfo &STI) {
  66   assert(SyntaxVariant == 0 && "We only have one syntax variant");
  67   return new PTXInstPrinter(MAI, STI);
  68 }
  69
  70 extern "C" void LLVMInitializePTXTargetMC() {
  71   // Register the MC asm info.
  72   RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
  73   RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
  74
  75   // Register the MC codegen info.
  76   TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
  77   TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
  78
  79   // Register the MC instruction info.
  80   TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
  81   TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
  82
  83   // Register the MC register info.
  84   TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
  85   TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
  86
  87   // Register the MC subtarget info.
  88   TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
  89                                           createPTXMCSubtargetInfo);
  90   TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
  91                                           createPTXMCSubtargetInfo);
  92
  93   // Register the MCInstPrinter.
  94   TargetRegistry::RegisterMCInstPrinter(ThePTX32Target, createPTXMCInstPrinter);
  95   TargetRegistry::RegisterMCInstPrinter(ThePTX64Target, createPTXMCInstPrinter);
  96 }