lib/Target/NVPTX/NVPTX.td

   1 //===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 // This is the top level entry point for the NVPTX target.
  10 //===----------------------------------------------------------------------===//
  11
  12 //===----------------------------------------------------------------------===//
  13 // Target-independent interfaces
  14 //===----------------------------------------------------------------------===//
  15
  16 include "llvm/Target/Target.td"
  17
  18 include "NVPTXRegisterInfo.td"
  19 include "NVPTXInstrInfo.td"
  20
  21 //===----------------------------------------------------------------------===//
  22 // Subtarget Features.
  23 // - We use the SM version number instead of explicit feature table.
  24 // - Need at least one feature to avoid generating zero sized array by
  25 //   TableGen in NVPTXGenSubtarget.inc.
  26 //===----------------------------------------------------------------------===//
  27
  28 // SM Versions
  29 def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
  30                             "Target SM 2.0">;
  31 def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
  32                             "Target SM 2.1">;
  33 def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
  34                             "Target SM 3.0">;
  35 def SM32 : SubtargetFeature<"sm_32", "SmVersion", "32",
  36                             "Target SM 3.2">;
  37 def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
  38                             "Target SM 3.5">;
  39 def SM37 : SubtargetFeature<"sm_37", "SmVersion", "37",
  40                             "Target SM 3.7">;
  41 def SM50 : SubtargetFeature<"sm_50", "SmVersion", "50",
  42                             "Target SM 5.0">;
  43 def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52",
  44                             "Target SM 5.2">;
  45 def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
  46                             "Target SM 5.3">;
  47
  48 // PTX Versions
  49 def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
  50                              "Use PTX version 3.2">;
  51 def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
  52                              "Use PTX version 4.0">;
  53 def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
  54                              "Use PTX version 4.1">;
  55 def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
  56                              "Use PTX version 4.2">;
  57
  58 //===----------------------------------------------------------------------===//
  59 // NVPTX supported processors.
  60 //===----------------------------------------------------------------------===//
  61
  62 class Proc<string Name, list<SubtargetFeature> Features>
  63  : Processor<Name, NoItineraries, Features>;
  64
  65 def : Proc<"sm_20", [SM20]>;
  66 def : Proc<"sm_21", [SM21]>;
  67 def : Proc<"sm_30", [SM30]>;
  68 def : Proc<"sm_32", [SM32, PTX40]>;
  69 def : Proc<"sm_35", [SM35]>;
  70 def : Proc<"sm_37", [SM37, PTX41]>;
  71 def : Proc<"sm_50", [SM50, PTX40]>;
  72 def : Proc<"sm_52", [SM52, PTX41]>;
  73 def : Proc<"sm_53", [SM53, PTX42]>;
  74
  75
  76 def NVPTXInstrInfo : InstrInfo {
  77 }
  78
  79 def NVPTX : Target {
  80   let InstructionSet = NVPTXInstrInfo;
  81 }