1 //===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MIPS32/64 implementation of the TargetRegisterInfo
13 //===----------------------------------------------------------------------===//
15 #include "MipsSERegisterInfo.h"
17 #include "MipsAnalyzeImmediate.h"
18 #include "MipsSEInstrInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsMachineFunction.h"
21 #include "llvm/Constants.h"
22 #include "llvm/DebugInfo.h"
23 #include "llvm/Type.h"
24 #include "llvm/Function.h"
25 #include "llvm/CodeGen/ValueTypes.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineFunction.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/Target/TargetFrameLowering.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/ADT/BitVector.h"
38 #include "llvm/ADT/STLExtras.h"
42 MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
43 const MipsSEInstrInfo &I)
44 : MipsRegisterInfo(ST), TII(I) {}
46 // This function eliminate ADJCALLSTACKDOWN,
47 // ADJCALLSTACKUP pseudo instructions
48 void MipsSERegisterInfo::
49 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator I) const {
51 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
53 if (!TFI->hasReservedCallFrame(MF)) {
54 int64_t Amount = I->getOperand(0).getImm();
56 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
59 const MipsSEInstrInfo *II = static_cast<const MipsSEInstrInfo*>(&TII);
60 unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
62 II->adjustStackPtr(SP, Amount, MBB, I);
68 void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
69 unsigned OpNo, int FrameIndex,
71 int64_t SPOffset) const {
72 MachineInstr &MI = *II;
73 MachineFunction &MF = *MI.getParent()->getParent();
74 MachineFrameInfo *MFI = MF.getFrameInfo();
75 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
77 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
82 MinCSFI = CSI[0].getFrameIdx();
83 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
86 // The following stack frame objects are always referenced relative to $sp:
87 // 1. Outgoing arguments.
88 // 2. Pointer to dynamically allocated stack space.
89 // 3. Locations for callee-saved registers.
90 // Everything else is referenced relative to whatever register
91 // getFrameRegister() returns.
94 if (MipsFI->isOutArgFI(FrameIndex) ||
95 (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
96 FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
98 FrameReg = getFrameRegister(MF);
100 // Calculate final offset.
101 // - There is no need to change the offset if the frame object is one of the
102 // following: an outgoing argument, pointer to a dynamically allocated
103 // stack space or a $gp restore location,
104 // - If the frame object is any of the following, its offset must be adjusted
105 // by adding the size of the stack:
106 // incoming argument, callee-saved register location or local variable.
109 if (MipsFI->isOutArgFI(FrameIndex))
112 Offset = SPOffset + (int64_t)StackSize;
114 Offset += MI.getOperand(OpNo + 1).getImm();
116 DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
118 // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
120 if (!MI.isDebugValue() && !isInt<16>(Offset)) {
121 MachineBasicBlock &MBB = *MI.getParent();
122 DebugLoc DL = II->getDebugLoc();
123 unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
124 unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
125 MipsAnalyzeImmediate::Inst LastInst(0, 0);
127 MipsFI->setEmitNOAT();
128 Mips::loadImmediate(Offset, Subtarget.isABI_N64(), TII, MBB, II, DL, true,
130 BuildMI(MBB, II, DL, TII.get(ADDu), ATReg).addReg(FrameReg).addReg(ATReg);
133 Offset = SignExtend64<16>(LastInst.ImmOpnd);
136 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false);
137 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);