1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>;
15 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
17 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
18 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
19 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
20 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
21 def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>;
22 def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>;
23 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
24 [SDNPCommutative, SDNPAssociative]>;
26 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
27 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
28 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
29 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
32 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
33 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
34 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
35 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
36 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
37 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
39 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
40 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
41 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
42 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
43 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
44 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
46 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
47 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
48 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
49 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
50 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
51 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
53 def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>;
54 def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>;
55 def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>;
56 def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>;
59 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
60 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
62 def uimm3 : Operand<i32> {
63 let PrintMethod = "printUnsignedImm";
66 def uimm4 : Operand<i32> {
67 let PrintMethod = "printUnsignedImm";
70 def uimm8 : Operand<i32> {
71 let PrintMethod = "printUnsignedImm";
74 def simm5 : Operand<i32>;
76 def simm10 : Operand<i32>;
78 // Instruction encoding.
79 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
80 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
81 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
82 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
84 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
85 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
86 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
87 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
89 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
90 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
91 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
92 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
94 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
95 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
96 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
97 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
99 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
100 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
101 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
102 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
104 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
105 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
106 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
107 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
109 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
111 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
113 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
114 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
115 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
116 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
118 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
119 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
120 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
121 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
123 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
124 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
125 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
126 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
128 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
129 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
130 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
131 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
133 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
134 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
135 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
136 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
138 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
139 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
140 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
141 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
143 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
144 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
145 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
146 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
148 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
149 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
150 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
151 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
153 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
154 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
155 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
156 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
158 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
159 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
160 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
161 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
163 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
164 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
165 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
166 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
168 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
169 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
170 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
171 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
173 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
175 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
177 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
179 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
181 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
182 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
183 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
184 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
186 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
187 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
188 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
189 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
191 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
192 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
193 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
194 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
196 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
198 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
200 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
202 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
203 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
204 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
205 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
207 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
208 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
209 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
210 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
212 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
213 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
214 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
215 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
217 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
219 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
220 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
221 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
222 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
224 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
225 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
226 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
227 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
229 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
231 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
232 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
233 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
234 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
236 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
237 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
238 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
239 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
241 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
242 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
243 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
244 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
246 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
247 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
248 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
249 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
251 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
252 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
253 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
254 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
256 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
257 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
258 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
259 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
261 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
262 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
263 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
264 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
266 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
267 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
268 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
269 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
271 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
272 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
273 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
275 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
276 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
277 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
279 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
281 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
282 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
283 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
284 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
286 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
287 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
288 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
289 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
291 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
292 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
293 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
295 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
296 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
297 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
299 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
300 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
301 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
303 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
304 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
305 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
307 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
308 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
309 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
311 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
312 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
313 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
315 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
316 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
318 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
319 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
321 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
322 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
324 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
325 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
327 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
328 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
330 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
331 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
333 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
334 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
336 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
337 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
339 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
340 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
342 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
343 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
345 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
346 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
348 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
349 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
351 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
352 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
354 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
355 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
357 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
358 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
360 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
361 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
363 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
364 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
366 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
367 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
369 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
370 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
372 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
373 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
375 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
376 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
378 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
379 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
381 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
382 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
383 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
385 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
386 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
388 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
389 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
391 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
392 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
394 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
395 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
397 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
398 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
400 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
401 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
403 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
404 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
406 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
407 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
409 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
410 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
412 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
413 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
415 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
416 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
418 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
419 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
421 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
422 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
424 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
425 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
427 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
428 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
430 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
431 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
433 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
434 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
436 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
437 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
439 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
440 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
442 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
443 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
445 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
446 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
448 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
449 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
451 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
452 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
454 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
455 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
457 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
458 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
460 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
461 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
463 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
464 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
466 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
467 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
469 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
470 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
472 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
473 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
474 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
476 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
477 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
478 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
480 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
481 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
482 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
484 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
485 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
486 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
488 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
489 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
490 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
491 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
493 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
494 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
495 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
496 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
498 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
499 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
500 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
501 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
503 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
504 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
505 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
506 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
508 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
509 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
510 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
512 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
513 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
514 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
515 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
517 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
518 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
519 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
520 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
522 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
523 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
524 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
525 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
527 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
528 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
529 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
530 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
532 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
533 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
535 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
536 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
538 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
539 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
540 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
541 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
543 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
544 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
545 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
546 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
548 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
549 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
550 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
551 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
553 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
554 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
555 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
556 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
558 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
559 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
560 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
561 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
563 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
564 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
565 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
566 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
568 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
569 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
570 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
571 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
573 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
574 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
575 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
576 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
578 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
579 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
580 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
581 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
583 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
584 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
585 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
586 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
588 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
589 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
590 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
591 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
593 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
594 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
595 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
596 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
598 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
599 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
600 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
601 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
603 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
605 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
606 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
608 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
609 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
611 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
612 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
613 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
614 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
616 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
617 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
619 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
620 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
622 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
623 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
624 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
625 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
627 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
628 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
629 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
630 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
632 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
633 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
634 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
635 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
637 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
639 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
641 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
643 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
645 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
646 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
647 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
648 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
650 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
651 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
652 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
653 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
655 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
656 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
657 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
658 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
660 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
661 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
662 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
663 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
665 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
666 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
667 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
668 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
670 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
671 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
672 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
674 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
675 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
676 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
677 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
679 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
680 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
681 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
682 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
684 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
685 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
686 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
687 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
689 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
690 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
691 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
692 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
694 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
695 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
696 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
697 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
699 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
700 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
701 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
702 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
704 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
705 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
706 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
707 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
709 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
710 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
711 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
712 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
714 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
715 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
716 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
717 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
719 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
720 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
721 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
722 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
724 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
725 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
726 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
727 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
729 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
730 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
731 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
732 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
734 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
735 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
736 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
737 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
739 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
740 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
741 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
742 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
744 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
745 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
746 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
747 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
749 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
750 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
751 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
752 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
754 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
755 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
756 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
757 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
759 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
760 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
761 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
762 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
764 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
765 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
766 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
767 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
769 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
770 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
771 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
772 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
774 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
775 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
776 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
777 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
779 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
780 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
781 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
782 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
784 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
785 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
786 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
787 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
789 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
791 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
794 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
795 RegisterClass RCWD, RegisterClass RCWS = RCWD,
796 InstrItinClass itin = NoItinerary> {
797 dag OutOperandList = (outs RCWD:$wd);
798 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
799 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
800 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
801 InstrItinClass Itinerary = itin;
804 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
805 RegisterClass RCWD, RegisterClass RCWS = RCWD,
806 InstrItinClass itin = NoItinerary> {
807 dag OutOperandList = (outs RCWD:$wd);
808 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
809 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
810 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
811 InstrItinClass Itinerary = itin;
814 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
815 RegisterClass RCWD, RegisterClass RCWS = RCWD,
816 InstrItinClass itin = NoItinerary> {
817 dag OutOperandList = (outs RCWD:$wd);
818 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
819 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
820 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
821 InstrItinClass Itinerary = itin;
824 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
825 RegisterClass RCWD, RegisterClass RCWS = RCWD,
826 InstrItinClass itin = NoItinerary> {
827 dag OutOperandList = (outs RCWD:$wd);
828 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
829 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
830 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
831 InstrItinClass Itinerary = itin;
834 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
835 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
836 InstrItinClass itin = NoItinerary> {
837 dag OutOperandList = (outs RCD:$rd);
838 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
839 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
840 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
841 InstrItinClass Itinerary = itin;
844 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
845 SDPatternOperator SplatNode, RegisterClass RCWD,
846 RegisterClass RCWS = RCWD,
847 InstrItinClass itin = NoItinerary> {
848 dag OutOperandList = (outs RCWD:$wd);
849 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
850 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
851 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
852 (SplatNode immZExt5:$u5)))];
853 InstrItinClass Itinerary = itin;
856 // This class is deprecated and will be removed in the next few changes
857 class MSA_I5_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
858 RegisterClass RCWD, RegisterClass RCWS = RCWD,
859 InstrItinClass itin = NoItinerary> {
860 dag OutOperandList = (outs RCWD:$wd);
861 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
862 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
863 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
864 InstrItinClass Itinerary = itin;
867 class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
868 RegisterClass RCWD, RegisterClass RCWS = RCWD,
869 InstrItinClass itin = NoItinerary> {
870 dag OutOperandList = (outs RCWD:$wd);
871 dag InOperandList = (ins RCWS:$ws, simm5:$s5);
872 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5");
873 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))];
874 InstrItinClass Itinerary = itin;
877 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
878 RegisterClass RCWD, RegisterClass RCWS = RCWD,
879 InstrItinClass itin = NoItinerary> {
880 dag OutOperandList = (outs RCWD:$wd);
881 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
882 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
883 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
884 InstrItinClass Itinerary = itin;
887 class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
889 InstrItinClass itin = NoItinerary> {
890 dag OutOperandList = (outs RCWD:$wd);
891 dag InOperandList = (ins simm10:$i10);
892 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
893 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))];
894 InstrItinClass Itinerary = itin;
897 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
898 RegisterClass RCWD, RegisterClass RCWS = RCWD,
899 InstrItinClass itin = NoItinerary> {
900 dag OutOperandList = (outs RCWD:$wd);
901 dag InOperandList = (ins RCWS:$ws);
902 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
903 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
904 InstrItinClass Itinerary = itin;
907 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
908 RegisterClass RCWD, RegisterClass RCWS = RCWD,
909 InstrItinClass itin = NoItinerary> :
910 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
913 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
914 RegisterClass RCWD, RegisterClass RCWS = RCWD,
915 RegisterClass RCWT = RCWD,
916 InstrItinClass itin = NoItinerary> {
917 dag OutOperandList = (outs RCWD:$wd);
918 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
919 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
920 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
921 InstrItinClass Itinerary = itin;
924 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
925 RegisterClass RCWD, RegisterClass RCWS = RCWD,
926 RegisterClass RCWT = RCWD,
927 InstrItinClass itin = NoItinerary> {
928 dag OutOperandList = (outs RCWD:$wd);
929 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
930 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
931 list<dag> Pattern = [(set RCWD:$wd,
932 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
933 InstrItinClass Itinerary = itin;
934 string Constraints = "$wd = $wd_in";
937 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
938 RegisterClass RCWD, RegisterClass RCWS = RCWD,
939 RegisterClass RCWT = RCWD,
940 InstrItinClass itin = NoItinerary> :
941 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
943 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
944 RegisterClass RCWD, RegisterClass RCWS = RCWD,
945 RegisterClass RCWT = RCWD,
946 InstrItinClass itin = NoItinerary> :
947 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
949 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
950 dag OutOperandList = (outs);
951 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
952 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
953 list<dag> Pattern = [];
954 InstrItinClass Itinerary = IIBranch;
956 bit isTerminator = 1;
957 bit hasDelaySlot = 1;
958 list<Register> Defs = [AT];
961 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
962 RegisterClass RCD, RegisterClass RCWS,
963 InstrItinClass itin = NoItinerary> {
964 dag OutOperandList = (outs RCD:$wd);
965 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
966 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
967 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
970 InstrItinClass Itinerary = itin;
971 string Constraints = "$wd = $wd_in";
974 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
975 RegisterClass RCWD, RegisterClass RCWS = RCWD,
976 InstrItinClass itin = NoItinerary> {
977 dag OutOperandList = (outs RCWD:$wd);
978 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
979 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
980 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
983 InstrItinClass Itinerary = itin;
984 string Constraints = "$wd = $wd_in";
987 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
988 RegisterClass RCWD, RegisterClass RCWS = RCWD,
989 RegisterClass RCWT = RCWD,
990 InstrItinClass itin = NoItinerary> {
991 dag OutOperandList = (outs RCWD:$wd);
992 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
993 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
994 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
995 InstrItinClass Itinerary = itin;
998 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
999 RegisterClass RCWS = RCWD,
1000 RegisterClass RCWT = RCWD> :
1001 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1002 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1004 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
1006 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
1008 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
1010 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
1013 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
1015 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
1017 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
1019 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
1022 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
1024 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
1026 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
1028 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
1031 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
1033 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
1035 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
1037 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1040 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1041 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1042 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1043 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1045 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8, MSA128B>;
1046 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16, MSA128H>;
1047 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32, MSA128W>;
1048 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64, MSA128D>;
1050 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1051 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1052 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1053 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1055 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>;
1057 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1058 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1059 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1060 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1062 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1063 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1064 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1065 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1067 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1069 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1071 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1073 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1076 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1078 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1080 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1082 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1085 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1087 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1089 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1091 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1094 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1096 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1098 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1100 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1103 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1104 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1105 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1106 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1108 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1109 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1110 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1111 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1113 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1114 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1115 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1116 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1118 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1120 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1122 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1124 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1127 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1128 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1129 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1130 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1132 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1134 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1136 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1138 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1141 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1143 class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1145 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1147 class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1149 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1150 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1151 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1152 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1154 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1155 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1156 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1157 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1159 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1160 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1161 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1162 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1164 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1166 class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>;
1168 class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>;
1170 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1171 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1172 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1173 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1175 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1176 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1177 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1178 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1180 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1181 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1182 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1183 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1185 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1187 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>,
1189 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>,
1191 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>,
1193 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>,
1196 class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>;
1197 class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>;
1198 class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>;
1199 class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>;
1202 dag OutOperandList = (outs GPR32:$rd);
1203 dag InOperandList = (ins MSACtrl:$cs);
1204 string AsmString = "cfcmsa\t$rd, $cs";
1205 InstrItinClass Itinerary = NoItinerary;
1206 bit hasSideEffects = 1;
1209 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>;
1210 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>;
1211 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>;
1212 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>;
1214 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>;
1215 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>;
1216 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>;
1217 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>;
1219 class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b,
1221 class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h,
1223 class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w,
1225 class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d,
1228 class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b,
1230 class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h,
1232 class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w,
1234 class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d,
1237 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>;
1238 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>;
1239 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>;
1240 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>;
1242 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>;
1243 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>;
1244 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>;
1245 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>;
1247 class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b,
1249 class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h,
1251 class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w,
1253 class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d,
1256 class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b,
1258 class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h,
1260 class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w,
1262 class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d,
1265 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1267 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1269 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1272 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1274 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1276 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1280 dag OutOperandList = (outs);
1281 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1282 string AsmString = "ctcmsa\t$cd, $rs";
1283 InstrItinClass Itinerary = NoItinerary;
1284 bit hasSideEffects = 1;
1287 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1288 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1289 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1290 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1292 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1293 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1294 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1295 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1297 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1298 MSA128B, MSA128B>, IsCommutable;
1299 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1300 MSA128H, MSA128H>, IsCommutable;
1301 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1302 MSA128W, MSA128W>, IsCommutable;
1304 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1305 MSA128B, MSA128B>, IsCommutable;
1306 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1307 MSA128H, MSA128H>, IsCommutable;
1308 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1309 MSA128W, MSA128W>, IsCommutable;
1311 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1312 MSA128H, MSA128B, MSA128B>,
1314 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1315 MSA128W, MSA128H, MSA128H>,
1317 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1318 MSA128D, MSA128W, MSA128W>,
1321 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1322 MSA128H, MSA128B, MSA128B>,
1324 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1325 MSA128W, MSA128H, MSA128H>,
1327 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1328 MSA128D, MSA128W, MSA128W>,
1331 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1332 MSA128H, MSA128B, MSA128B>;
1333 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1334 MSA128W, MSA128H, MSA128H>;
1335 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1336 MSA128D, MSA128W, MSA128W>;
1338 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1339 MSA128H, MSA128B, MSA128B>;
1340 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1341 MSA128W, MSA128H, MSA128H>;
1342 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1343 MSA128D, MSA128W, MSA128W>;
1345 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1346 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1348 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1350 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1353 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>,
1355 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>,
1358 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1360 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1363 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>;
1364 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>;
1366 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>;
1367 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>;
1369 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>,
1371 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>,
1374 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>,
1376 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>,
1379 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>,
1381 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>,
1384 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>,
1386 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>,
1389 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>,
1391 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>,
1394 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>,
1396 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>,
1399 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>,
1401 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>,
1404 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1405 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1407 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1408 MSA128H, MSA128W, MSA128W>;
1409 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1410 MSA128W, MSA128D, MSA128D>;
1412 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1413 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1415 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1417 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1420 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1422 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1425 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1427 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1430 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1432 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1435 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1437 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1440 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1442 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1445 class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>;
1446 class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>;
1447 class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>;
1449 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1450 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1452 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1454 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1457 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1458 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1460 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1462 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1465 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1466 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1468 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1470 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1473 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1475 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1478 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1479 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1481 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1482 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1484 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1485 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1487 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1489 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1492 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1493 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1495 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1496 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1498 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1499 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1501 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1502 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1504 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1505 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1507 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1508 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1510 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1511 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1513 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1514 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1516 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1517 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1519 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1520 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1522 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1523 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1525 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1526 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1528 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1529 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1531 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1533 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1536 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1538 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1541 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1543 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1546 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1548 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1551 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1552 MSA128H, MSA128W, MSA128W>;
1553 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1554 MSA128W, MSA128D, MSA128D>;
1556 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1558 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1560 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1563 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1565 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1567 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1570 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1572 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1574 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1577 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1579 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1581 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1584 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1585 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1586 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1587 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1589 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1590 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1591 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1592 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1594 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1595 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1596 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1597 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1599 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1600 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1601 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1602 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1604 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1606 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1608 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1611 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1612 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1613 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1614 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1616 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1617 ValueType TyNode, RegisterClass RCWD,
1618 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1619 InstrItinClass itin = NoItinerary> {
1620 dag OutOperandList = (outs RCWD:$wd);
1621 dag InOperandList = (ins MemOpnd:$addr);
1622 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1623 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1624 InstrItinClass Itinerary = itin;
1627 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1628 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1629 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1630 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1632 class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>;
1633 class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>;
1634 class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>;
1635 class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>;
1637 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1638 ValueType TyNode, RegisterClass RCWD,
1639 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1640 InstrItinClass itin = NoItinerary> {
1641 dag OutOperandList = (outs RCWD:$wd);
1642 dag InOperandList = (ins MemOpnd:$addr);
1643 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1644 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1645 InstrItinClass Itinerary = itin;
1648 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1649 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1650 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1651 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1653 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1655 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1658 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1660 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1663 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1664 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1665 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1666 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1668 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1669 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1670 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1671 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1673 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>;
1674 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>;
1675 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>;
1676 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>;
1678 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>;
1679 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>;
1680 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>;
1681 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>;
1683 class MAXI_S_B_DESC : MSA_I5_X_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b,
1685 class MAXI_S_H_DESC : MSA_I5_X_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h,
1687 class MAXI_S_W_DESC : MSA_I5_X_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w,
1689 class MAXI_S_D_DESC : MSA_I5_X_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d,
1692 class MAXI_U_B_DESC : MSA_I5_X_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b,
1694 class MAXI_U_H_DESC : MSA_I5_X_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h,
1696 class MAXI_U_W_DESC : MSA_I5_X_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w,
1698 class MAXI_U_D_DESC : MSA_I5_X_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d,
1701 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1702 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1703 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1704 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1706 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>;
1707 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>;
1708 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>;
1709 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>;
1711 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>;
1712 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>;
1713 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>;
1714 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>;
1716 class MINI_S_B_DESC : MSA_I5_X_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>;
1717 class MINI_S_H_DESC : MSA_I5_X_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>;
1718 class MINI_S_W_DESC : MSA_I5_X_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>;
1719 class MINI_S_D_DESC : MSA_I5_X_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>;
1721 class MINI_U_B_DESC : MSA_I5_X_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>;
1722 class MINI_U_H_DESC : MSA_I5_X_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>;
1723 class MINI_U_W_DESC : MSA_I5_X_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>;
1724 class MINI_U_D_DESC : MSA_I5_X_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>;
1726 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1727 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1728 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1729 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1731 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1732 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1733 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1734 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1737 dag OutOperandList = (outs MSA128B:$wd);
1738 dag InOperandList = (ins MSA128B:$ws);
1739 string AsmString = "move.v\t$wd, $ws";
1740 list<dag> Pattern = [];
1741 InstrItinClass Itinerary = NoItinerary;
1744 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1746 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1749 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1751 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
1754 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
1755 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
1756 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
1757 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
1759 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
1760 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
1762 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
1764 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
1767 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
1768 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
1769 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
1770 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
1772 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
1773 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
1774 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
1775 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
1777 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
1778 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
1779 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
1780 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
1782 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
1783 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
1784 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
1785 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
1787 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>;
1789 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
1790 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
1791 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
1792 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
1794 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>;
1796 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
1797 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
1798 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
1799 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
1801 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
1802 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
1803 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
1804 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
1806 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
1807 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
1808 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
1809 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
1811 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
1812 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
1813 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
1814 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
1816 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
1817 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
1818 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
1819 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
1821 class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
1822 class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
1823 class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
1825 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
1826 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
1827 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
1828 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
1830 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
1831 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
1832 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
1833 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
1835 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
1836 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
1837 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
1838 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
1840 class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>;
1841 class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>;
1842 class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>;
1843 class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>;
1845 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
1847 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
1849 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
1851 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
1854 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
1856 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
1858 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
1860 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
1863 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
1864 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
1865 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
1866 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
1868 class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>;
1869 class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>;
1870 class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>;
1871 class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>;
1873 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
1874 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
1875 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
1876 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
1878 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
1879 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
1880 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
1881 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
1883 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
1884 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
1885 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
1886 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
1888 class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>;
1889 class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>;
1890 class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>;
1891 class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>;
1893 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
1894 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
1895 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
1896 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
1898 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
1899 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
1900 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
1901 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
1903 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1904 ValueType TyNode, RegisterClass RCWD,
1905 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1906 InstrItinClass itin = NoItinerary> {
1907 dag OutOperandList = (outs);
1908 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1909 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1910 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1911 InstrItinClass Itinerary = itin;
1914 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
1915 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
1916 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
1917 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
1919 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1920 ValueType TyNode, RegisterClass RCWD,
1921 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1922 InstrItinClass itin = NoItinerary> {
1923 dag OutOperandList = (outs);
1924 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1925 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1926 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1927 InstrItinClass Itinerary = itin;
1930 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
1931 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
1932 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
1933 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
1935 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
1936 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
1937 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
1938 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
1940 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
1941 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
1942 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
1943 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
1945 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
1947 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
1949 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
1951 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
1954 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
1956 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
1958 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
1960 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
1963 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
1964 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
1965 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
1966 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
1968 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8, MSA128B>;
1969 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16, MSA128H>;
1970 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32, MSA128W>;
1971 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64, MSA128D>;
1973 class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>;
1974 class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>;
1975 class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>;
1976 class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>;
1978 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
1979 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
1980 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
1981 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
1983 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>;
1985 // Instruction defs.
1986 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
1987 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
1988 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
1989 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
1991 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
1992 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
1993 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
1994 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
1996 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
1997 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
1998 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
1999 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2001 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2002 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2003 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2004 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2006 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2007 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2008 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2009 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2011 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2012 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2013 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2014 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2016 def AND_V : AND_V_ENC, AND_V_DESC;
2017 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2018 PseudoInstExpansion<(AND_V MSA128B:$wd,
2019 MSA128B:$ws, MSA128B:$wt)>;
2020 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2021 PseudoInstExpansion<(AND_V MSA128B:$wd,
2022 MSA128B:$ws, MSA128B:$wt)>;
2023 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2024 PseudoInstExpansion<(AND_V MSA128B:$wd,
2025 MSA128B:$ws, MSA128B:$wt)>;
2027 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2029 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2030 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2031 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2032 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2034 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2035 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2036 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2037 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2039 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2040 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2041 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2042 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2044 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2045 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2046 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2047 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2049 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2050 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2051 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2052 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2054 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2055 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2056 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2057 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2059 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2060 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2061 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2062 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2064 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2065 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2066 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2067 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2069 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2070 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2071 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2072 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2074 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2075 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2076 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2077 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2079 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2080 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2081 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2082 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2084 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2085 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2086 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2087 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2089 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2091 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2093 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2095 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2097 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2098 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2099 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2100 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2102 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2103 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2104 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2105 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2107 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2108 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2109 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2110 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2112 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2114 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2116 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2118 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2119 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2120 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2121 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2123 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2124 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2125 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2126 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2128 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2129 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2130 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2131 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2133 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2135 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2136 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2137 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2138 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2140 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2141 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2142 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2143 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2145 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2147 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2148 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2149 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2150 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2152 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2153 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2154 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2155 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2157 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2158 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2159 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2160 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2162 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2163 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2164 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2165 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2167 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2168 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2169 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2170 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2172 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2173 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2174 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2175 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2177 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2178 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2179 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2180 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2182 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2183 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2184 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2185 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2187 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2188 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2189 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2191 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2192 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2193 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2195 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2197 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2198 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2199 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2200 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2202 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2203 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2204 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2205 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2207 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2208 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2209 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2211 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2212 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2213 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2215 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2216 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2217 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2219 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2220 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2221 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2223 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2224 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2225 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2227 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2228 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2229 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2231 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2232 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2234 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2235 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2237 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2238 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2240 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2241 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2243 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2244 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2246 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2247 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2249 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2250 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2252 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2253 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2255 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2256 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2258 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2259 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2261 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2262 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2264 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2265 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2267 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2268 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2270 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2271 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2273 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2274 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2276 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2277 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2279 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2280 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2282 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2283 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2285 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2286 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2288 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2289 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2291 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2292 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2294 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2295 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2297 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2298 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2299 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2301 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2302 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2304 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2305 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2307 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2308 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2310 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2311 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2313 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2314 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2316 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2317 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2319 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2320 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2322 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2323 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2325 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2326 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2328 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2329 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2331 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2332 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2334 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2335 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2337 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2338 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2340 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2341 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2343 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2344 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2346 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2347 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2349 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2350 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2352 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2353 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2355 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2356 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2358 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2359 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2361 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2362 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2364 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2365 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2367 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2368 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2370 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2371 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2373 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2374 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2376 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2377 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2379 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2380 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2382 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2383 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2385 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2386 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2388 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2389 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2390 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2392 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2393 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2394 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2396 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2397 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2398 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2400 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2401 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2402 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2404 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2405 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2406 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2407 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2409 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2410 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2411 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2412 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2414 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2415 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2416 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2417 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2419 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2420 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2421 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2422 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2424 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2425 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2426 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2428 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2429 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2430 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2431 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2433 def LD_B: LD_B_ENC, LD_B_DESC;
2434 def LD_H: LD_H_ENC, LD_H_DESC;
2435 def LD_W: LD_W_ENC, LD_W_DESC;
2436 def LD_D: LD_D_ENC, LD_D_DESC;
2438 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2439 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2440 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2441 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2443 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2444 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2445 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2446 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2448 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2449 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2451 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2452 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2454 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2455 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2456 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2457 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2459 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2460 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2461 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2462 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2464 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2465 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2466 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2467 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2469 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2470 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2471 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2472 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2474 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2475 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2476 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2477 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2479 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2480 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2481 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2482 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2484 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2485 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2486 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2487 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2489 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2490 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2491 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2492 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2494 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2495 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2496 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2497 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2499 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2500 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2501 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2502 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2504 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2505 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2506 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2507 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2509 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2510 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2511 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2512 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2514 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2515 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2516 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2517 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2519 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2521 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2522 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2524 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2525 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2527 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2528 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2529 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2530 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2532 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2533 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2535 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2536 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2538 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2539 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2540 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2541 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2543 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2544 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2545 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2546 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2548 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2549 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2550 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2551 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2553 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2554 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2555 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2556 MSA128B:$ws, MSA128B:$wt)>;
2557 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2558 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2559 MSA128B:$ws, MSA128B:$wt)>;
2560 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2561 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2562 MSA128B:$ws, MSA128B:$wt)>;
2564 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2566 def OR_V : OR_V_ENC, OR_V_DESC;
2567 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2568 PseudoInstExpansion<(OR_V MSA128B:$wd,
2569 MSA128B:$ws, MSA128B:$wt)>;
2570 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2571 PseudoInstExpansion<(OR_V MSA128B:$wd,
2572 MSA128B:$ws, MSA128B:$wt)>;
2573 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2574 PseudoInstExpansion<(OR_V MSA128B:$wd,
2575 MSA128B:$ws, MSA128B:$wt)>;
2577 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2579 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2580 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2581 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2582 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2584 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2585 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2586 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2587 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2589 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2590 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2591 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2592 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2594 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2595 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2596 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2597 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2599 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2600 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2601 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2602 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2604 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2605 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2606 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2608 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2609 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2610 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2611 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2613 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2614 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2615 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2616 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2618 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2619 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2620 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2621 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2623 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2624 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2625 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2626 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2628 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2629 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2630 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2631 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2633 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2634 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2635 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2636 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2638 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2639 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2640 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2641 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2643 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2644 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2645 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2646 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2648 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2649 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2650 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2651 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2653 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2654 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2655 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2656 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2658 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2659 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2660 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2661 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2663 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2664 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2665 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2666 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2668 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2669 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2670 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2671 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2673 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2674 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2675 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2676 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2678 def ST_B: ST_B_ENC, ST_B_DESC;
2679 def ST_H: ST_H_ENC, ST_H_DESC;
2680 def ST_W: ST_W_ENC, ST_W_DESC;
2681 def ST_D: ST_D_ENC, ST_D_DESC;
2683 def STX_B: STX_B_ENC, STX_B_DESC;
2684 def STX_H: STX_H_ENC, STX_H_DESC;
2685 def STX_W: STX_W_ENC, STX_W_DESC;
2686 def STX_D: STX_D_ENC, STX_D_DESC;
2688 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2689 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2690 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2691 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2693 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2694 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2695 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2696 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2698 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2699 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2700 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2701 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2703 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2704 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2705 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2706 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2708 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2709 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2710 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2711 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2713 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2714 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2715 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2716 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2718 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2719 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2720 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2721 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2723 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2724 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
2725 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2726 MSA128B:$ws, MSA128B:$wt)>;
2727 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
2728 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2729 MSA128B:$ws, MSA128B:$wt)>;
2730 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
2731 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2732 MSA128B:$ws, MSA128B:$wt)>;
2734 def XORI_B : XORI_B_ENC, XORI_B_DESC;
2737 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
2738 Pat<pattern, result>, Requires<pred>;
2740 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
2741 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
2743 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
2744 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
2745 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
2746 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
2747 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
2748 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
2749 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
2751 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
2752 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
2753 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
2755 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
2756 (ST_B MSA128B:$ws, addr:$addr)>;
2757 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
2758 (ST_H MSA128H:$ws, addr:$addr)>;
2759 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
2760 (ST_W MSA128W:$ws, addr:$addr)>;
2761 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
2762 (ST_D MSA128D:$ws, addr:$addr)>;
2763 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
2764 (ST_H MSA128H:$ws, addr:$addr)>;
2765 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
2766 (ST_W MSA128W:$ws, addr:$addr)>;
2767 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
2768 (ST_D MSA128D:$ws, addr:$addr)>;
2770 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
2771 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
2772 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
2773 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
2774 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
2775 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
2777 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
2778 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
2779 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2780 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
2782 // These are endian-independant because the element size doesnt change
2783 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
2784 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
2785 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
2786 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
2787 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
2788 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
2790 // Little endian bitcasts are always no-ops
2791 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
2792 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
2793 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
2794 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
2795 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
2796 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
2798 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
2799 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
2800 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
2801 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
2802 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
2804 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
2805 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
2806 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
2807 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
2808 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
2810 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
2811 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
2812 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
2813 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
2814 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
2816 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
2817 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
2818 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
2819 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
2820 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
2822 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
2823 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
2824 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
2825 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
2826 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
2828 // Big endian bitcasts expand to shuffle instructions.
2829 // This is because bitcast is defined to be a store/load sequence and the
2830 // vector store/load instructions are mixed-endian with respect to the vector
2831 // as a whole (little endian with respect to element order, but big endian
2834 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
2835 RegisterClass DstRC, MSAInst Insn,
2836 RegisterClass ViaRC> :
2837 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2838 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
2842 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
2843 RegisterClass DstRC, MSAInst Insn,
2844 RegisterClass ViaRC> :
2845 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2846 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
2850 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
2851 RegisterClass DstRC> :
2852 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2854 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
2855 RegisterClass DstRC> :
2856 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2858 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
2859 RegisterClass DstRC> :
2860 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2864 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
2869 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
2870 RegisterClass DstRC> :
2871 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2873 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
2874 RegisterClass DstRC> :
2875 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2877 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
2878 RegisterClass DstRC> :
2879 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
2881 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
2882 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
2883 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
2884 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
2885 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
2886 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
2888 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
2889 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
2890 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
2891 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
2892 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
2894 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
2895 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
2896 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
2897 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
2898 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
2900 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
2901 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
2902 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
2903 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
2904 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
2906 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
2907 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
2908 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
2909 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
2910 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
2912 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
2913 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
2914 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
2915 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
2916 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
2918 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
2919 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
2920 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
2921 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
2922 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
2924 // Pseudos used to implement BNZ.df, and BZ.df
2926 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
2928 InstrItinClass itin = NoItinerary> :
2929 MipsPseudo<(outs GPR32:$dst),
2931 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
2932 bit usesCustomInserter = 1;
2935 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
2936 MSA128B, NoItinerary>;
2937 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
2938 MSA128H, NoItinerary>;
2939 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
2940 MSA128W, NoItinerary>;
2941 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
2942 MSA128D, NoItinerary>;
2943 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
2944 MSA128B, NoItinerary>;
2946 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
2947 MSA128B, NoItinerary>;
2948 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
2949 MSA128H, NoItinerary>;
2950 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
2951 MSA128W, NoItinerary>;
2952 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
2953 MSA128D, NoItinerary>;
2954 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
2955 MSA128B, NoItinerary>;