1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm3 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm4 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm8 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def simm5 : Operand<i32>;
78 def simm10 : Operand<i32>;
80 def vsplat_uimm1 : Operand<vAny> {
81 let PrintMethod = "printUnsignedImm8";
84 def vsplat_uimm2 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm8";
88 def vsplat_uimm3 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm";
92 def vsplat_uimm4 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm5 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_uimm6 : Operand<vAny> {
101 let PrintMethod = "printUnsignedImm";
104 def vsplat_uimm8 : Operand<vAny> {
105 let PrintMethod = "printUnsignedImm";
108 def vsplat_simm5 : Operand<vAny>;
110 def vsplat_simm10 : Operand<vAny>;
113 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
114 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
115 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
116 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
117 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
118 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
120 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
121 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
122 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
123 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
124 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
125 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
127 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
129 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
131 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
134 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
135 PatFrag<(ops node:$lhs, node:$rhs),
136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
138 // ISD::SETFALSE cannot occur
139 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
140 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
141 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
142 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
143 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
144 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
145 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
146 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
147 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
148 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
149 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
150 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
151 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
152 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
153 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
154 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
155 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
156 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
157 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
158 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
159 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
160 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
161 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
162 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
163 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
164 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
165 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
166 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
167 // ISD::SETTRUE cannot occur
168 // ISD::SETFALSE2 cannot occur
169 // ISD::SETTRUE2 cannot occur
171 class vsetcc_type<ValueType ResTy, CondCode CC> :
172 PatFrag<(ops node:$lhs, node:$rhs),
173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
175 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
176 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
177 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
178 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
179 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
180 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
181 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
182 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
183 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
184 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
185 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
186 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
187 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
188 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
189 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
190 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
191 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
192 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
193 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
194 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
196 def vsplati8 : PatFrag<(ops node:$e0),
197 (v16i8 (build_vector node:$e0, node:$e0,
204 node:$e0, node:$e0))>;
205 def vsplati16 : PatFrag<(ops node:$e0),
206 (v8i16 (build_vector node:$e0, node:$e0,
209 node:$e0, node:$e0))>;
210 def vsplati32 : PatFrag<(ops node:$e0),
211 (v4i32 (build_vector node:$e0, node:$e0,
212 node:$e0, node:$e0))>;
213 def vsplati64 : PatFrag<(ops node:$e0),
214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
215 def vsplatf32 : PatFrag<(ops node:$e0),
216 (v4f32 (build_vector node:$e0, node:$e0,
217 node:$e0, node:$e0))>;
218 def vsplatf64 : PatFrag<(ops node:$e0),
219 (v2f64 (build_vector node:$e0, node:$e0))>;
221 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
222 SDNodeXForm xform = NOOP_SDNodeXForm>
223 : PatLeaf<frag, pred, xform> {
224 Operand OpClass = opclass;
227 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
228 list<SDNode> roots = [],
229 list<SDNodeProperty> props = []> :
230 ComplexPattern<ty, numops, fn, roots, props> {
231 Operand OpClass = opclass;
234 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
236 [build_vector, bitconvert]>;
238 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
240 [build_vector, bitconvert]>;
242 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
244 [build_vector, bitconvert]>;
246 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
248 [build_vector, bitconvert]>;
250 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
252 [build_vector, bitconvert]>;
254 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
256 [build_vector, bitconvert]>;
258 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
260 [build_vector, bitconvert]>;
262 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
264 [build_vector, bitconvert]>;
266 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
268 [build_vector, bitconvert]>;
270 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
272 [build_vector, bitconvert]>;
274 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
276 [build_vector, bitconvert]>;
278 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
280 [build_vector, bitconvert]>;
282 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
284 [build_vector, bitconvert]>;
286 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
288 [build_vector, bitconvert]>;
290 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
292 [build_vector, bitconvert]>;
294 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
296 [build_vector, bitconvert]>;
298 // Any build_vector that is a constant splat with a value that is an exact
300 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
301 [build_vector, bitconvert]>;
303 def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt),
304 (fsub node:$wd, (fmul node:$ws, node:$wt))>;
306 def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
307 (add node:$wd, (mul node:$ws, node:$wt))>;
309 def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt),
310 (sub node:$wd, (mul node:$ws, node:$wt))>;
313 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
314 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
316 // Instruction encoding.
317 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
318 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
319 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
320 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
322 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
323 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
324 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
325 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
327 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
328 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
329 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
330 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
332 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
333 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
334 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
335 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
337 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
338 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
339 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
340 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
342 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
343 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
344 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
345 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
347 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
349 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
351 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
352 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
353 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
354 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
356 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
357 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
358 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
359 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
361 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
362 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
363 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
364 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
366 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
367 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
368 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
369 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
371 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
372 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
373 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
374 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
376 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
377 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
378 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
379 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
381 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
382 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
383 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
384 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
386 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
387 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
388 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
389 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
391 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
392 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
393 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
394 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
396 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
397 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
398 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
399 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
401 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
402 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
403 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
404 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
406 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
407 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
408 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
409 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
411 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
413 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
415 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
417 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
419 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
420 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
421 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
422 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
424 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
425 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
426 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
427 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
429 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
430 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
431 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
432 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
434 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
436 class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>;
438 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
440 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
441 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
442 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
443 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
445 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
446 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
447 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
448 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
450 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
451 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
452 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
453 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
455 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
457 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
458 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
459 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
460 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
462 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
463 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
464 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
465 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
467 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
469 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
470 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
471 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
472 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
474 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
475 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
476 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
477 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
479 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
480 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
481 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
482 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
484 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
485 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
486 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
487 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
489 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
490 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
491 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
492 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
494 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
495 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
496 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
497 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
499 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
500 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
501 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
502 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
504 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
505 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
506 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
507 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
509 class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
510 class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
511 class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
513 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
514 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
515 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
517 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
519 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
520 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
521 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
522 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
524 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
525 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
526 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
527 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
529 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
530 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
531 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
533 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
534 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
535 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
537 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
538 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
539 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
541 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
542 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
543 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
545 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
546 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
547 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
549 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
550 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
551 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
553 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
554 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
556 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
557 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
559 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
560 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
562 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
563 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
565 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
566 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
568 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
569 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
571 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
572 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
574 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
575 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
577 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
578 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
580 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
581 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
583 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
584 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
586 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
587 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
589 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
590 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
592 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
593 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
595 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
596 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
598 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
599 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
601 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
602 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
604 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
605 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
607 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
608 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
610 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
611 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
613 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
614 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
616 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
617 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
619 class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>;
620 class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>;
621 class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>;
623 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
624 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
626 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
627 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
629 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
630 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
632 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
633 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
635 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
636 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
638 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
639 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
641 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
642 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
644 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
645 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
647 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
648 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
650 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
651 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
653 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
654 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
656 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
657 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
659 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
660 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
662 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
663 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
665 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
666 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
668 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
669 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
671 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
672 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
674 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
675 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
677 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
678 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
680 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
681 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
683 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
684 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
686 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
687 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
689 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
690 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
692 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
693 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
695 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
696 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
698 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
699 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
701 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
702 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
704 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
705 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
707 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
708 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
710 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
711 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
712 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
714 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
715 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
716 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
718 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
719 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
720 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
722 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
723 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
724 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
726 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
727 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
728 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
729 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
731 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
732 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
733 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
734 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
736 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
737 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
738 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
739 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
741 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
742 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
743 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
744 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
746 class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>;
747 class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>;
748 class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>;
750 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
751 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
752 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
753 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
755 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
756 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
757 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
758 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
760 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
761 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
762 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
763 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
765 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
766 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
768 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
769 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
771 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
772 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
773 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
774 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
776 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
777 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
778 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
779 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
781 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
782 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
783 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
784 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
786 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
787 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
788 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
789 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
791 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
792 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
793 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
794 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
796 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
797 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
798 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
799 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
801 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
802 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
803 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
804 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
806 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
807 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
808 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
809 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
811 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
812 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
813 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
814 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
816 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
817 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
818 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
819 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
821 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
822 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
823 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
824 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
826 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
827 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
828 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
829 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
831 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
832 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
833 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
834 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
836 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
838 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
839 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
841 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
842 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
844 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
845 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
846 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
847 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
849 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
850 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
852 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
853 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
855 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
856 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
857 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
858 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
860 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
861 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
862 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
863 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
865 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
866 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
867 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
868 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
870 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
872 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
874 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
876 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
878 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
879 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
880 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
881 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
883 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
884 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
885 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
886 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
888 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
889 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
890 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
891 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
893 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
894 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
895 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
896 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
898 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
899 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
900 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
901 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
903 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
904 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
905 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
907 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
908 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
909 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
910 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
912 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
913 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
914 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
915 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
917 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
918 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
919 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
920 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
922 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
923 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
924 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
925 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
927 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
928 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
929 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
930 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
932 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
933 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
934 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
935 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
937 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
938 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
939 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
940 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
942 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
943 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
944 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
945 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
947 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
948 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
949 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
950 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
952 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
953 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
954 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
955 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
957 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
958 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
959 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
960 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
962 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
963 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
964 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
965 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
967 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
968 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
969 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
970 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
972 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
973 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
974 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
975 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
977 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
978 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
979 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
980 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
982 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
983 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
984 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
985 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
987 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
988 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
989 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
990 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
992 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
993 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
994 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
995 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
997 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
998 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
999 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
1000 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
1002 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
1003 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1004 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1005 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1007 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1008 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1009 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1010 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1012 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1013 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1014 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1015 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1017 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1019 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1021 // Instruction desc.
1022 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1023 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1024 InstrItinClass itin = NoItinerary> {
1025 dag OutOperandList = (outs ROWD:$wd);
1026 dag InOperandList = (ins ROWS:$ws, uimm3:$m);
1027 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1028 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))];
1029 InstrItinClass Itinerary = itin;
1032 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1033 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1034 InstrItinClass itin = NoItinerary> {
1035 dag OutOperandList = (outs ROWD:$wd);
1036 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1037 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1038 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1039 InstrItinClass Itinerary = itin;
1042 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1044 InstrItinClass itin = NoItinerary> {
1045 dag OutOperandList = (outs ROWD:$wd);
1046 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1049 InstrItinClass Itinerary = itin;
1052 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1054 InstrItinClass itin = NoItinerary> {
1055 dag OutOperandList = (outs ROWD:$wd);
1056 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1059 InstrItinClass Itinerary = itin;
1062 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1063 SplatComplexPattern SplatImm,
1064 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1065 InstrItinClass itin = NoItinerary> {
1066 dag OutOperandList = (outs ROWD:$wd);
1067 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m);
1068 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1069 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))];
1070 InstrItinClass Itinerary = itin;
1073 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1074 ValueType VecTy, RegisterOperand ROD,
1075 RegisterOperand ROWS,
1076 InstrItinClass itin = NoItinerary> {
1077 dag OutOperandList = (outs ROD:$rd);
1078 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1079 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1080 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
1081 InstrItinClass Itinerary = itin;
1084 class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1085 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1086 InstrItinClass itin = NoItinerary> {
1087 dag OutOperandList = (outs ROWD:$wd);
1088 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1089 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1090 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))];
1091 InstrItinClass Itinerary = itin;
1094 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1095 RegisterClass RCD, RegisterClass RCWS> :
1096 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1097 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1098 bit usesCustomInserter = 1;
1101 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1102 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1103 RegisterOperand ROWS = ROWD,
1104 InstrItinClass itin = NoItinerary> {
1105 dag OutOperandList = (outs ROWD:$wd);
1106 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm);
1107 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1108 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))];
1109 InstrItinClass Itinerary = itin;
1112 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1113 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1114 RegisterOperand ROWS = ROWD,
1115 InstrItinClass itin = NoItinerary> {
1116 dag OutOperandList = (outs ROWD:$wd);
1117 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8);
1118 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1119 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))];
1120 InstrItinClass Itinerary = itin;
1123 // This class is deprecated and will be removed in the next few patches
1124 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1125 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1126 InstrItinClass itin = NoItinerary> {
1127 dag OutOperandList = (outs ROWD:$wd);
1128 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1129 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1130 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))];
1131 InstrItinClass Itinerary = itin;
1134 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1135 RegisterOperand ROWS = ROWD,
1136 InstrItinClass itin = NoItinerary> {
1137 dag OutOperandList = (outs ROWD:$wd);
1138 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1139 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1140 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))];
1141 InstrItinClass Itinerary = itin;
1144 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1145 InstrItinClass itin = NoItinerary> {
1146 dag OutOperandList = (outs RCWD:$wd);
1147 dag InOperandList = (ins vsplat_simm10:$i10);
1148 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1149 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1150 list<dag> Pattern = [];
1151 bit hasSideEffects = 0;
1152 InstrItinClass Itinerary = itin;
1155 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1156 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1157 InstrItinClass itin = NoItinerary> {
1158 dag OutOperandList = (outs ROWD:$wd);
1159 dag InOperandList = (ins ROWS:$ws);
1160 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1161 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1162 InstrItinClass Itinerary = itin;
1165 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1166 SDPatternOperator OpNode, RegisterOperand ROWD,
1167 RegisterOperand ROS = ROWD,
1168 InstrItinClass itin = NoItinerary> {
1169 dag OutOperandList = (outs ROWD:$wd);
1170 dag InOperandList = (ins ROS:$rs);
1171 string AsmString = !strconcat(instr_asm, "\t$wd, $rs");
1172 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))];
1173 InstrItinClass Itinerary = itin;
1176 class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode,
1177 RegisterClass RCWD, RegisterClass RCWS = RCWD> :
1178 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs),
1179 [(set RCWD:$wd, (OpNode RCWS:$fs))]> {
1180 let usesCustomInserter = 1;
1183 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1184 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1185 InstrItinClass itin = NoItinerary> {
1186 dag OutOperandList = (outs ROWD:$wd);
1187 dag InOperandList = (ins ROWS:$ws);
1188 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1189 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1190 InstrItinClass Itinerary = itin;
1193 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1194 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1195 RegisterOperand ROWT = ROWD,
1196 InstrItinClass itin = NoItinerary> {
1197 dag OutOperandList = (outs ROWD:$wd);
1198 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1199 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1200 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1201 InstrItinClass Itinerary = itin;
1204 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1205 RegisterOperand ROWS = ROWD,
1206 RegisterOperand ROWT = ROWD,
1207 InstrItinClass itin = NoItinerary> {
1208 dag OutOperandList = (outs ROWD:$wd);
1209 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1210 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1211 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1213 string Constraints = "$wd = $wd_in";
1214 InstrItinClass Itinerary = itin;
1217 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1218 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1219 RegisterOperand ROWT = ROWD,
1220 InstrItinClass itin = NoItinerary> {
1221 dag OutOperandList = (outs ROWD:$wd);
1222 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1223 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1224 list<dag> Pattern = [(set ROWD:$wd,
1225 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))];
1226 InstrItinClass Itinerary = itin;
1227 string Constraints = "$wd = $wd_in";
1230 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1231 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1232 RegisterOperand ROWT = ROWD,
1233 InstrItinClass itin = NoItinerary> :
1234 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1236 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1237 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1238 RegisterOperand ROWT = ROWD,
1239 InstrItinClass itin = NoItinerary> :
1240 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1242 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1243 dag OutOperandList = (outs);
1244 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1245 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1246 list<dag> Pattern = [];
1247 InstrItinClass Itinerary = IIBranch;
1249 bit isTerminator = 1;
1250 bit hasDelaySlot = 1;
1251 list<Register> Defs = [AT];
1254 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1255 RegisterOperand ROWD, RegisterOperand ROS,
1256 InstrItinClass itin = NoItinerary> {
1257 dag OutOperandList = (outs ROWD:$wd);
1258 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n);
1259 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1260 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1263 InstrItinClass Itinerary = itin;
1264 string Constraints = "$wd = $wd_in";
1267 class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
1268 RegisterOperand ROWD, RegisterOperand ROFS> :
1269 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
1270 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
1272 bit usesCustomInserter = 1;
1273 string Constraints = "$wd = $wd_in";
1276 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1277 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1278 InstrItinClass itin = NoItinerary> {
1279 dag OutOperandList = (outs ROWD:$wd);
1280 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
1281 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1282 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1285 InstrItinClass Itinerary = itin;
1286 string Constraints = "$wd = $wd_in";
1289 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1290 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1291 RegisterOperand ROWT = ROWD,
1292 InstrItinClass itin = NoItinerary> {
1293 dag OutOperandList = (outs ROWD:$wd);
1294 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1295 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1296 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1297 InstrItinClass Itinerary = itin;
1300 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1301 RegisterOperand ROWD,
1302 RegisterOperand ROWS = ROWD,
1303 InstrItinClass itin = NoItinerary> {
1304 dag OutOperandList = (outs ROWD:$wd);
1305 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
1306 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1307 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
1309 InstrItinClass Itinerary = itin;
1312 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD,
1313 RegisterOperand ROWS = ROWD,
1314 RegisterOperand ROWT = ROWD> :
1315 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt),
1316 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>;
1318 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1320 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1322 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1324 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1327 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1328 MSA128BOpnd>, IsCommutable;
1329 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1330 MSA128HOpnd>, IsCommutable;
1331 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1332 MSA128WOpnd>, IsCommutable;
1333 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1334 MSA128DOpnd>, IsCommutable;
1336 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1337 MSA128BOpnd>, IsCommutable;
1338 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1339 MSA128HOpnd>, IsCommutable;
1340 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1341 MSA128WOpnd>, IsCommutable;
1342 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1343 MSA128DOpnd>, IsCommutable;
1345 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1346 MSA128BOpnd>, IsCommutable;
1347 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1348 MSA128HOpnd>, IsCommutable;
1349 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1350 MSA128WOpnd>, IsCommutable;
1351 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1352 MSA128DOpnd>, IsCommutable;
1354 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1355 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1356 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1357 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1359 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5,
1361 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5,
1363 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5,
1365 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5,
1368 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>;
1369 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>;
1370 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>;
1371 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>;
1373 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8,
1376 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1378 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1380 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1382 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1385 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1387 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1389 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1391 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1394 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1396 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1398 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1400 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1403 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1405 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1407 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1409 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1412 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1413 MSA128BOpnd>, IsCommutable;
1414 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1415 MSA128HOpnd>, IsCommutable;
1416 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1417 MSA128WOpnd>, IsCommutable;
1418 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1419 MSA128DOpnd>, IsCommutable;
1421 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1422 MSA128BOpnd>, IsCommutable;
1423 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1424 MSA128HOpnd>, IsCommutable;
1425 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1426 MSA128WOpnd>, IsCommutable;
1427 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1428 MSA128DOpnd>, IsCommutable;
1430 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>;
1431 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>;
1432 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>;
1433 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>;
1435 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b,
1437 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h,
1439 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w,
1441 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d,
1444 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>;
1445 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>;
1446 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>;
1447 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>;
1449 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1451 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1453 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1455 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1458 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>;
1459 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>;
1460 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>;
1461 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>;
1463 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1465 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1467 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1469 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1472 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>;
1474 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b,
1477 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>;
1479 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>;
1481 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>;
1482 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>;
1483 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>;
1484 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>;
1486 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b,
1488 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h,
1490 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w,
1492 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d,
1495 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1496 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1497 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1498 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1500 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1503 dag OutOperandList = (outs MSA128BOpnd:$wd);
1504 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1506 string AsmString = "bsel.v\t$wd, $ws, $wt";
1507 list<dag> Pattern = [(set MSA128BOpnd:$wd,
1508 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1510 InstrItinClass Itinerary = NoItinerary;
1511 string Constraints = "$wd = $wd_in";
1514 class BSELI_B_DESC {
1515 dag OutOperandList = (outs MSA128BOpnd:$wd);
1516 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1518 string AsmString = "bseli.b\t$wd, $ws, $u8";
1519 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in,
1521 vsplati8_uimm8:$u8))];
1522 InstrItinClass Itinerary = NoItinerary;
1523 string Constraints = "$wd = $wd_in";
1526 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>;
1527 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>;
1528 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>;
1529 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>;
1531 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b,
1533 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h,
1535 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w,
1537 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d,
1540 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1541 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1542 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1543 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1545 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1547 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1549 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1551 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1553 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1556 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1558 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1560 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1562 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1566 dag OutOperandList = (outs GPR32:$rd);
1567 dag InOperandList = (ins MSACtrl:$cs);
1568 string AsmString = "cfcmsa\t$rd, $cs";
1569 InstrItinClass Itinerary = NoItinerary;
1570 bit hasSideEffects = 1;
1573 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1574 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1575 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1576 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1578 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1579 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1580 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1581 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1583 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1584 vsplati8_simm5, MSA128BOpnd>;
1585 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1586 vsplati16_simm5, MSA128HOpnd>;
1587 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1588 vsplati32_simm5, MSA128WOpnd>;
1589 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1590 vsplati64_simm5, MSA128DOpnd>;
1592 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1593 vsplati8_uimm5, MSA128BOpnd>;
1594 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1595 vsplati16_uimm5, MSA128HOpnd>;
1596 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1597 vsplati32_uimm5, MSA128WOpnd>;
1598 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1599 vsplati64_uimm5, MSA128DOpnd>;
1601 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1602 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1603 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1604 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1606 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1607 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1608 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1609 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1611 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1612 vsplati8_simm5, MSA128BOpnd>;
1613 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1614 vsplati16_simm5, MSA128HOpnd>;
1615 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1616 vsplati32_simm5, MSA128WOpnd>;
1617 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1618 vsplati64_simm5, MSA128DOpnd>;
1620 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1621 vsplati8_uimm5, MSA128BOpnd>;
1622 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1623 vsplati16_uimm5, MSA128HOpnd>;
1624 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1625 vsplati32_uimm5, MSA128WOpnd>;
1626 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1627 vsplati64_uimm5, MSA128DOpnd>;
1629 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1630 GPR32Opnd, MSA128BOpnd>;
1631 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1632 GPR32Opnd, MSA128HOpnd>;
1633 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1634 GPR32Opnd, MSA128WOpnd>;
1636 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1637 GPR32Opnd, MSA128BOpnd>;
1638 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1639 GPR32Opnd, MSA128HOpnd>;
1640 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1641 GPR32Opnd, MSA128WOpnd>;
1643 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1645 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1649 dag OutOperandList = (outs);
1650 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1651 string AsmString = "ctcmsa\t$cd, $rs";
1652 InstrItinClass Itinerary = NoItinerary;
1653 bit hasSideEffects = 1;
1656 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1657 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1658 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1659 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1661 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1662 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1663 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1664 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1666 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1667 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1669 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1670 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1672 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1673 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1676 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1677 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1679 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1680 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1682 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1683 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1686 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1687 MSA128HOpnd, MSA128BOpnd,
1688 MSA128BOpnd>, IsCommutable;
1689 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1690 MSA128WOpnd, MSA128HOpnd,
1691 MSA128HOpnd>, IsCommutable;
1692 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1693 MSA128DOpnd, MSA128WOpnd,
1694 MSA128WOpnd>, IsCommutable;
1696 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1697 MSA128HOpnd, MSA128BOpnd,
1698 MSA128BOpnd>, IsCommutable;
1699 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1700 MSA128WOpnd, MSA128HOpnd,
1701 MSA128HOpnd>, IsCommutable;
1702 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1703 MSA128DOpnd, MSA128WOpnd,
1704 MSA128WOpnd>, IsCommutable;
1706 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1707 MSA128HOpnd, MSA128BOpnd,
1709 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1710 MSA128WOpnd, MSA128HOpnd,
1712 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1713 MSA128DOpnd, MSA128WOpnd,
1716 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1717 MSA128HOpnd, MSA128BOpnd,
1719 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1720 MSA128WOpnd, MSA128HOpnd,
1722 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1723 MSA128DOpnd, MSA128WOpnd,
1726 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1728 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1731 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1733 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1736 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1738 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
1741 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1743 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1746 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
1747 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
1749 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
1750 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
1752 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
1754 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
1757 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
1759 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
1762 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
1764 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
1767 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
1769 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
1772 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
1774 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
1777 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
1779 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
1782 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
1784 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
1787 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
1788 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
1790 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1791 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1792 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1793 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1795 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w,
1797 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d,
1800 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1801 MSA128WOpnd, MSA128HOpnd>;
1802 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1803 MSA128DOpnd, MSA128WOpnd>;
1805 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1806 MSA128WOpnd, MSA128HOpnd>;
1807 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1808 MSA128DOpnd, MSA128WOpnd>;
1810 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>;
1811 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>;
1813 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>;
1814 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>;
1816 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1817 MSA128WOpnd, MSA128HOpnd>;
1818 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1819 MSA128DOpnd, MSA128WOpnd>;
1821 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1822 MSA128WOpnd, MSA128HOpnd>;
1823 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1824 MSA128DOpnd, MSA128WOpnd>;
1826 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8,
1827 MSA128BOpnd, GPR32Opnd>;
1828 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16,
1829 MSA128HOpnd, GPR32Opnd>;
1830 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32,
1831 MSA128WOpnd, GPR32Opnd>;
1833 class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W,
1835 class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D,
1838 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
1839 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
1841 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>;
1842 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>;
1844 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
1845 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
1847 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1849 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1852 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
1853 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
1855 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1857 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1860 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>;
1861 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>;
1863 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
1864 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
1866 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
1867 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
1869 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
1870 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
1872 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1874 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1877 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
1878 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
1880 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
1881 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
1883 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
1884 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
1886 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
1887 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
1889 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
1890 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
1892 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
1893 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
1895 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
1896 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
1898 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
1899 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
1901 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
1903 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
1906 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
1908 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
1911 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
1913 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
1916 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
1918 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
1921 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
1923 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
1926 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1928 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1931 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1933 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1936 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1937 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1938 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1939 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1941 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint,
1943 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint,
1946 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint,
1948 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint,
1951 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
1952 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1953 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
1954 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1955 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
1956 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1958 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
1959 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1960 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
1961 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1962 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
1963 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1965 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
1966 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1967 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
1968 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1969 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
1970 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1972 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
1973 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1974 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
1975 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1976 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
1977 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1979 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
1980 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
1981 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
1982 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
1984 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
1985 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
1986 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
1987 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
1989 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
1990 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
1991 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
1992 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
1994 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
1995 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
1996 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
1997 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
1999 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8,
2000 MSA128BOpnd, GPR32Opnd>;
2001 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16,
2002 MSA128HOpnd, GPR32Opnd>;
2003 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
2004 MSA128WOpnd, GPR32Opnd>;
2006 class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
2007 MSA128WOpnd, FGR32Opnd>;
2008 class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
2009 MSA128DOpnd, FGR64Opnd>;
2011 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
2013 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
2015 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
2017 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
2020 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2021 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2022 ComplexPattern Addr = addrRegImm,
2023 InstrItinClass itin = NoItinerary> {
2024 dag OutOperandList = (outs RCWD:$wd);
2025 dag InOperandList = (ins MemOpnd:$addr);
2026 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2027 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
2028 InstrItinClass Itinerary = itin;
2031 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
2032 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
2033 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
2034 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
2036 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
2037 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
2038 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
2039 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
2042 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2044 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2047 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2049 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2052 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>;
2053 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>;
2054 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>;
2055 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>;
2057 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2058 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2059 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2060 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2062 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2063 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2064 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2065 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2067 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2068 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2069 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2070 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2072 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2074 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2076 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2078 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2081 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2083 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2085 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2087 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2090 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2091 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2092 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2093 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2095 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2096 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2097 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2098 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2100 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2101 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2102 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2103 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2105 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2107 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2109 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2111 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2114 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2116 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2118 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2120 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2123 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>;
2124 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>;
2125 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>;
2126 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>;
2128 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>;
2129 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>;
2130 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>;
2131 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>;
2134 dag OutOperandList = (outs MSA128B:$wd);
2135 dag InOperandList = (ins MSA128B:$ws);
2136 string AsmString = "move.v\t$wd, $ws";
2137 list<dag> Pattern = [];
2138 InstrItinClass Itinerary = NoItinerary;
2141 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2143 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2146 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2148 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2151 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>;
2152 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>;
2153 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>;
2154 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>;
2156 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2158 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2161 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2163 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2166 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2167 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2168 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2169 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2171 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>;
2172 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>;
2173 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>;
2174 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>;
2176 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>;
2177 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>;
2178 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>;
2179 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>;
2181 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>;
2182 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>;
2183 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>;
2184 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>;
2186 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2189 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>;
2190 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>;
2191 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>;
2192 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>;
2194 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>;
2196 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2197 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2198 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2199 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2201 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2202 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2203 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2204 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2206 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2207 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2208 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2209 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2211 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
2213 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
2215 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
2217 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
2220 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
2222 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
2224 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
2226 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
2229 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2230 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2231 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2233 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;
2234 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2235 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2236 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2238 class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>;
2239 class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>;
2240 class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>;
2241 class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>;
2243 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2244 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2245 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2246 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2248 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2250 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2252 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2254 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2257 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd,
2258 MSA128BOpnd, GPR32Opnd>;
2259 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd,
2260 MSA128HOpnd, GPR32Opnd>;
2261 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd,
2262 MSA128WOpnd, GPR32Opnd>;
2263 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd,
2264 MSA128DOpnd, GPR32Opnd>;
2266 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2268 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2270 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2272 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2275 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2276 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2277 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2278 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2280 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2282 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2284 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2286 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2289 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2290 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2291 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2292 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2294 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b,
2296 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h,
2298 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w,
2300 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d,
2303 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2304 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2305 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2306 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2308 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2310 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2312 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2314 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2317 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2318 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2319 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2320 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2322 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b,
2324 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h,
2326 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w,
2328 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d,
2331 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2332 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2333 ComplexPattern Addr = addrRegImm,
2334 InstrItinClass itin = NoItinerary> {
2335 dag OutOperandList = (outs);
2336 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2337 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2338 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2339 InstrItinClass Itinerary = itin;
2342 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2343 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2344 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2345 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2347 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2349 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2351 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2353 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2356 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2358 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2360 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2362 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2365 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2367 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2369 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2371 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2374 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2376 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2378 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2380 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2383 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2384 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2385 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2386 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2388 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5,
2390 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5,
2392 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5,
2394 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5,
2397 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2398 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2399 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2400 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2402 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>;
2403 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>;
2404 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>;
2405 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>;
2407 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8,
2410 // Instruction defs.
2411 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2412 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2413 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2414 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2416 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2417 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2418 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2419 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2421 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2422 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2423 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2424 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2426 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2427 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2428 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2429 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2431 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2432 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2433 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2434 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2436 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2437 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2438 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2439 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2441 def AND_V : AND_V_ENC, AND_V_DESC;
2442 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2443 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2446 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2447 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2450 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2451 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2455 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2457 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2458 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2459 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2460 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2462 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2463 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2464 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2465 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2467 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2468 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2469 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2470 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2472 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2473 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2474 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2475 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2477 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2478 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2479 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2480 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2482 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2483 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2484 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2485 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2487 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2488 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2489 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2490 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2492 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2493 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2494 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2495 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2497 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2498 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2499 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2500 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2502 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2503 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2504 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2505 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2507 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2508 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2509 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2510 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2512 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2513 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2514 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2515 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2517 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2519 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2521 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2523 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2525 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2526 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2527 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2528 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2530 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2531 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2532 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2533 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2535 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2536 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2537 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2538 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2540 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2542 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2544 class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> :
2545 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt),
2546 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>,
2547 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in,
2548 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> {
2549 let Constraints = "$wd_in = $wd";
2552 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>;
2553 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>;
2554 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>;
2555 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>;
2556 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>;
2558 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2560 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2561 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2562 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2563 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2565 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2566 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2567 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2568 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2570 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2571 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2572 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2573 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2575 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2577 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2578 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2579 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2580 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2582 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2583 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2584 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2585 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2587 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2589 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2590 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2591 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2592 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2594 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2595 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2596 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2597 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2599 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2600 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2601 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2602 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2604 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2605 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2606 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2607 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2609 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2610 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2611 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2612 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2614 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2615 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2616 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2617 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2619 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2620 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2621 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2622 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2624 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2625 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2626 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2627 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2629 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2630 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2631 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2633 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2634 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2635 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2637 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2638 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2640 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2642 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2643 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2644 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2645 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2647 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2648 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2649 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2650 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2652 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2653 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2654 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2656 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2657 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2658 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2660 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2661 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2662 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2664 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2665 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2666 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2668 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2669 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2670 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2672 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2673 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2674 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2676 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2677 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2679 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2680 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2682 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2683 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2685 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2686 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2688 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2689 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2691 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2692 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2694 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2695 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2697 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2698 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2700 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2701 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2703 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2704 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2706 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2707 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2709 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2710 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2712 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2713 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2715 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2716 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2718 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2719 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2721 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2722 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2724 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2725 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2727 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2728 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2730 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2731 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2733 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2734 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2736 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2737 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2739 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2740 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2742 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2743 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2744 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2745 def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC;
2746 def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC;
2748 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2749 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2751 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2752 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2754 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2755 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2757 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2758 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2760 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2761 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2763 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2764 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2766 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2767 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2769 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2770 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2772 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2773 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2775 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2776 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2778 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2779 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2781 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2782 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2784 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2785 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2787 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2788 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2790 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2791 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2793 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2794 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2796 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2797 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2799 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2800 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2802 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2803 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2805 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2806 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2808 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2809 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2811 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2812 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2814 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2815 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2817 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2818 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2820 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2821 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2823 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2824 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2826 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2827 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2829 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2830 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2832 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2833 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2835 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2836 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2837 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2839 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2840 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2841 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2843 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2844 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2845 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2847 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2848 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2849 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2851 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2852 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2853 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2854 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2856 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2857 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2858 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2859 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2861 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2862 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2863 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2864 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2866 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2867 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2868 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2869 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2871 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2872 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2873 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2875 // INSERT_FW_PSEUDO defined after INSVE_W
2876 // INSERT_FD_PSEUDO defined after INSVE_D
2878 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2879 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2880 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2881 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2883 def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC;
2884 def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC;
2886 def LD_B: LD_B_ENC, LD_B_DESC;
2887 def LD_H: LD_H_ENC, LD_H_DESC;
2888 def LD_W: LD_W_ENC, LD_W_DESC;
2889 def LD_D: LD_D_ENC, LD_D_DESC;
2891 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2892 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2893 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2894 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2896 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2897 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2899 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2900 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2902 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2903 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2904 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2905 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2907 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2908 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2909 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2910 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2912 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2913 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2914 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2915 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2917 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2918 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2919 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2920 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2922 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2923 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2924 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2925 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2927 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2928 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2929 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2930 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2932 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2933 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2934 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2935 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2937 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2938 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2939 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2940 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2942 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2943 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2944 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2945 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2947 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2948 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2949 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2950 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2952 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2953 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2954 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2955 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2957 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2958 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2959 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2960 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2962 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2963 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2964 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2965 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2967 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2969 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2970 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2972 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2973 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2975 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2976 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2977 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2978 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2980 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2981 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2983 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2984 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2986 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2987 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2988 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2989 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2991 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2992 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2993 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2994 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2996 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2997 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2998 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2999 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
3001 def NOR_V : NOR_V_ENC, NOR_V_DESC;
3002 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
3003 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3006 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
3007 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3010 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
3011 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3015 def NORI_B : NORI_B_ENC, NORI_B_DESC;
3017 def OR_V : OR_V_ENC, OR_V_DESC;
3018 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
3019 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3022 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
3023 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3026 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
3027 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3031 def ORI_B : ORI_B_ENC, ORI_B_DESC;
3033 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
3034 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
3035 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
3036 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
3038 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
3039 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
3040 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
3041 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
3043 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
3044 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
3045 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
3046 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
3048 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
3049 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
3050 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
3051 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3053 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3054 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3055 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3056 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3058 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3059 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3060 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3062 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3063 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3064 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3065 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3067 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3068 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3069 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3070 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3072 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3073 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3074 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3075 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3077 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3078 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3079 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3080 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3082 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3083 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3084 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3085 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3087 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3088 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3089 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3090 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3092 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3093 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3094 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3095 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3097 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3098 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3099 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3100 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3102 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3103 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3104 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3105 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3107 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3108 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3109 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3110 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3112 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3113 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3114 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3115 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3117 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3118 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3119 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3120 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3122 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3123 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3124 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3125 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3127 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3128 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3129 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3130 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3132 def ST_B: ST_B_ENC, ST_B_DESC;
3133 def ST_H: ST_H_ENC, ST_H_DESC;
3134 def ST_W: ST_W_ENC, ST_W_DESC;
3135 def ST_D: ST_D_ENC, ST_D_DESC;
3137 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3138 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3139 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3140 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3142 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3143 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3144 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3145 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3147 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3148 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3149 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3150 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3152 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3153 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3154 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3155 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3157 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3158 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3159 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3160 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3162 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3163 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3164 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3165 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3167 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3168 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3169 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3170 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3172 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3173 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3174 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3177 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3178 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3181 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3182 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3186 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3189 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3190 Pat<pattern, result>, Requires<pred>;
3192 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3193 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3195 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3196 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3197 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3198 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3199 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3200 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3201 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3203 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3204 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3205 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3207 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3208 (ST_B MSA128B:$ws, addr:$addr)>;
3209 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3210 (ST_H MSA128H:$ws, addr:$addr)>;
3211 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3212 (ST_W MSA128W:$ws, addr:$addr)>;
3213 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3214 (ST_D MSA128D:$ws, addr:$addr)>;
3215 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3216 (ST_H MSA128H:$ws, addr:$addr)>;
3217 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3218 (ST_W MSA128W:$ws, addr:$addr)>;
3219 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3220 (ST_D MSA128D:$ws, addr:$addr)>;
3222 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3223 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3224 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3225 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3226 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3227 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3229 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3230 RegisterOperand ROWS = ROWD,
3231 InstrItinClass itin = NoItinerary> :
3232 MipsPseudo<(outs ROWD:$wd),
3234 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3235 InstrItinClass Itinerary = itin;
3237 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3238 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3240 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3241 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3244 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3245 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3246 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3247 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3249 // These are endian-independant because the element size doesnt change
3250 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3251 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3252 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3253 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3254 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3255 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3257 // Little endian bitcasts are always no-ops
3258 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3259 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3260 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3261 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3262 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3263 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3265 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3266 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3267 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3268 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3269 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3271 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3272 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3273 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3274 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3275 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3277 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3278 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3279 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3280 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3281 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3283 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3284 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3285 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3286 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3287 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3289 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3290 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3291 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3292 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3293 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3295 // Big endian bitcasts expand to shuffle instructions.
3296 // This is because bitcast is defined to be a store/load sequence and the
3297 // vector store/load instructions are mixed-endian with respect to the vector
3298 // as a whole (little endian with respect to element order, but big endian
3301 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3302 RegisterClass DstRC, MSAInst Insn,
3303 RegisterClass ViaRC> :
3304 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3305 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3309 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3310 RegisterClass DstRC, MSAInst Insn,
3311 RegisterClass ViaRC> :
3312 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3313 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3317 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3318 RegisterClass DstRC> :
3319 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3321 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3322 RegisterClass DstRC> :
3323 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3325 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3326 RegisterClass DstRC> :
3327 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3331 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3336 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3337 RegisterClass DstRC> :
3338 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3340 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3341 RegisterClass DstRC> :
3342 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3344 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3345 RegisterClass DstRC> :
3346 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3348 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3349 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3350 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3351 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3352 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3353 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3355 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3356 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3357 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3358 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3359 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3361 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3362 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3363 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3364 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3365 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3367 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3368 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3369 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3370 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3371 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3373 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3374 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3375 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3376 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3377 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3379 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3380 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3381 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3382 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3383 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3385 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3386 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3387 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3388 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3389 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3391 // Pseudos used to implement BNZ.df, and BZ.df
3393 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3395 InstrItinClass itin = NoItinerary> :
3396 MipsPseudo<(outs GPR32:$dst),
3398 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3399 bit usesCustomInserter = 1;
3402 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3403 MSA128B, NoItinerary>;
3404 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3405 MSA128H, NoItinerary>;
3406 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3407 MSA128W, NoItinerary>;
3408 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3409 MSA128D, NoItinerary>;
3410 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3411 MSA128B, NoItinerary>;
3413 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3414 MSA128B, NoItinerary>;
3415 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3416 MSA128H, NoItinerary>;
3417 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3418 MSA128W, NoItinerary>;
3419 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3420 MSA128D, NoItinerary>;
3421 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3422 MSA128B, NoItinerary>;