1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>;
15 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
16 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
19 SDTCisVT<3, OtherVT>]>;
20 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
23 SDTCisVT<3, OtherVT>]>;
25 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
26 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
27 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
28 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
29 def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>;
30 def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>;
31 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
32 [SDNPCommutative, SDNPAssociative]>;
34 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
35 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
37 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
38 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
39 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
40 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
43 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
44 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
45 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
46 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
47 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
48 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
50 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
51 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
52 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
53 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
54 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
55 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
57 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
58 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
59 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
60 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
61 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
62 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
64 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
65 PatFrag<(ops node:$lhs, node:$rhs),
66 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
68 // ISD::SETFALSE cannot occur
69 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
70 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
71 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
72 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
73 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
74 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
75 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
76 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
77 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
78 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
79 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
80 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
81 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
82 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
83 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
84 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
85 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
86 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
87 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
88 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
89 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
90 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
91 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
92 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
93 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
94 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
95 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
96 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
97 // ISD::SETTRUE cannot occur
98 // ISD::SETFALSE2 cannot occur
99 // ISD::SETTRUE2 cannot occur
101 class vsetcc_type<ValueType ResTy, CondCode CC> :
102 PatFrag<(ops node:$lhs, node:$rhs),
103 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
105 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
106 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
107 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
108 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
109 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
110 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
111 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
112 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
113 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
114 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
115 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
116 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
117 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
118 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
119 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
120 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
121 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
122 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
123 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
124 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
126 def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>;
127 def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>;
128 def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>;
129 def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>;
132 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
133 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
135 def uimm3 : Operand<i32> {
136 let PrintMethod = "printUnsignedImm";
139 def uimm4 : Operand<i32> {
140 let PrintMethod = "printUnsignedImm";
143 def uimm8 : Operand<i32> {
144 let PrintMethod = "printUnsignedImm";
147 def simm5 : Operand<i32>;
149 def simm10 : Operand<i32>;
151 // Instruction encoding.
152 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
153 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
154 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
155 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
157 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
158 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
159 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
160 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
162 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
163 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
164 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
165 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
167 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
168 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
169 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
170 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
172 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
173 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
174 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
175 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
177 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
178 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
179 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
180 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
182 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
184 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
186 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
187 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
188 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
189 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
191 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
192 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
193 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
194 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
196 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
197 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
198 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
199 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
201 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
202 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
203 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
204 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
206 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
207 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
208 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
209 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
211 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
212 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
213 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
214 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
216 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
217 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
218 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
219 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
221 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
222 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
223 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
224 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
226 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
227 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
228 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
229 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
231 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
232 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
233 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
234 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
236 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
237 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
238 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
239 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
241 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
242 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
243 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
244 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
246 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
248 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
250 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
252 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
254 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
255 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
256 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
257 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
259 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
260 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
261 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
262 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
264 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
265 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
266 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
267 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
269 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
271 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
273 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
275 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
276 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
277 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
278 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
280 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
281 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
282 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
283 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
285 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
286 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
287 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
288 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
290 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
292 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
293 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
294 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
295 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
297 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
298 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
299 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
300 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
302 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
304 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
305 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
306 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
307 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
309 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
310 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
311 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
312 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
314 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
315 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
316 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
317 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
319 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
320 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
321 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
322 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
324 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
325 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
326 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
327 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
329 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
330 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
331 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
332 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
334 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
335 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
336 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
337 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
339 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
340 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
341 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
342 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
344 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
345 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
346 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
348 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
349 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
350 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
352 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
354 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
355 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
356 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
357 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
359 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
360 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
361 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
362 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
364 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
365 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
366 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
368 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
369 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
370 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
372 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
373 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
374 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
376 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
377 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
378 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
380 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
381 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
382 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
384 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
385 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
386 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
388 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
389 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
391 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
392 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
394 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
395 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
397 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
398 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
400 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
401 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
403 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
404 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
406 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
407 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
409 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
410 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
412 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
413 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
415 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
416 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
418 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
419 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
421 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
422 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
424 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
425 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
427 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
428 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
430 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
431 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
433 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
434 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
436 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
437 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
439 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
440 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
442 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
443 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
445 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
446 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
448 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
449 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
451 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
452 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
454 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
455 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
456 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
458 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
459 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
461 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
462 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
464 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
465 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
467 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
468 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
470 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
471 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
473 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
474 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
476 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
477 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
479 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
480 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
482 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
483 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
485 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
486 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
488 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
489 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
491 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
492 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
494 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
495 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
497 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
498 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
500 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
501 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
503 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
504 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
506 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
507 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
509 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
510 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
512 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
513 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
515 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
516 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
518 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
519 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
521 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
522 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
524 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
525 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
527 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
528 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
530 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
531 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
533 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
534 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
536 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
537 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
539 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
540 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
542 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
543 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
545 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
546 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
547 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
549 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
550 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
551 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
553 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
554 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
555 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
557 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
558 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
559 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
561 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
562 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
563 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
564 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
566 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
567 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
568 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
569 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
571 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
572 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
573 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
574 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
576 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
577 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
578 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
579 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
581 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
582 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
583 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
585 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
586 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
587 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
588 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
590 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
591 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
592 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
593 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
595 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
596 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
597 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
598 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
600 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
601 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
602 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
603 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
605 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
606 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
608 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
609 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
611 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
612 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
613 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
614 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
616 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
617 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
618 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
619 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
621 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
622 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
623 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
624 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
626 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
627 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
628 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
629 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
631 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
632 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
633 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
634 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
636 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
637 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
638 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
639 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
641 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
642 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
643 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
644 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
646 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
647 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
648 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
649 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
651 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
652 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
653 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
654 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
656 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
657 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
658 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
659 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
661 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
662 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
663 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
664 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
666 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
667 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
668 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
669 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
671 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
672 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
673 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
674 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
676 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
678 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
679 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
681 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
682 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
684 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
685 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
686 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
687 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
689 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
690 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
692 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
693 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
695 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
696 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
697 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
698 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
700 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
701 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
702 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
703 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
705 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
706 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
707 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
708 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
710 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
712 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
714 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
716 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
718 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
719 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
720 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
721 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
723 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
724 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
725 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
726 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
728 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
729 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
730 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
731 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
733 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
734 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
735 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
736 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
738 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
739 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
740 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
741 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
743 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
744 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
745 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
747 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
748 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
749 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
750 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
752 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
753 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
754 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
755 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
757 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
758 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
759 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
760 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
762 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
763 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
764 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
765 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
767 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
768 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
769 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
770 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
772 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
773 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
774 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
775 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
777 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
778 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
779 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
780 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
782 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
783 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
784 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
785 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
787 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
788 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
789 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
790 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
792 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
793 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
794 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
795 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
797 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
798 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
799 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
800 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
802 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
803 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
804 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
805 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
807 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
808 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
809 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
810 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
812 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
813 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
814 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
815 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
817 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
818 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
819 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
820 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
822 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
823 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
824 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
825 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
827 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
828 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
829 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
830 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
832 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
833 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
834 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
835 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
837 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
838 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
839 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
840 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
842 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
843 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
844 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
845 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
847 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
848 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
849 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
850 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
852 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
853 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
854 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
855 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
857 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
858 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
859 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
860 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
862 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
864 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
867 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
868 RegisterClass RCWD, RegisterClass RCWS = RCWD,
869 InstrItinClass itin = NoItinerary> {
870 dag OutOperandList = (outs RCWD:$wd);
871 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
872 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
873 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
874 InstrItinClass Itinerary = itin;
877 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
878 RegisterClass RCWD, RegisterClass RCWS = RCWD,
879 InstrItinClass itin = NoItinerary> {
880 dag OutOperandList = (outs RCWD:$wd);
881 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
882 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
883 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
884 InstrItinClass Itinerary = itin;
887 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
888 RegisterClass RCWD, RegisterClass RCWS = RCWD,
889 InstrItinClass itin = NoItinerary> {
890 dag OutOperandList = (outs RCWD:$wd);
891 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
892 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
893 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
894 InstrItinClass Itinerary = itin;
897 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
898 RegisterClass RCWD, RegisterClass RCWS = RCWD,
899 InstrItinClass itin = NoItinerary> {
900 dag OutOperandList = (outs RCWD:$wd);
901 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
902 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
903 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
904 InstrItinClass Itinerary = itin;
907 class MSA_BIT_SPLATB_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
908 RegisterClass RCWD, RegisterClass RCWS = RCWD,
909 InstrItinClass itin = NoItinerary> {
910 dag OutOperandList = (outs RCWD:$wd);
911 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
912 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
913 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
914 (vsplati8 immZExt3:$u3)))];
915 InstrItinClass Itinerary = itin;
918 class MSA_BIT_SPLATH_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
919 RegisterClass RCWD, RegisterClass RCWS = RCWD,
920 InstrItinClass itin = NoItinerary> {
921 dag OutOperandList = (outs RCWD:$wd);
922 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
923 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
924 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
925 (vsplati16 immZExt4:$u4)))];
926 InstrItinClass Itinerary = itin;
929 class MSA_BIT_SPLATW_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
930 RegisterClass RCWD, RegisterClass RCWS = RCWD,
931 InstrItinClass itin = NoItinerary> {
932 dag OutOperandList = (outs RCWD:$wd);
933 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
934 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
935 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
936 (vsplati32 immZExt5:$u5)))];
937 InstrItinClass Itinerary = itin;
940 class MSA_BIT_SPLATD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
941 RegisterClass RCWD, RegisterClass RCWS = RCWD,
942 InstrItinClass itin = NoItinerary> {
943 dag OutOperandList = (outs RCWD:$wd);
944 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
945 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
946 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
947 (vsplati64 immZExt6:$u6)))];
948 InstrItinClass Itinerary = itin;
951 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
952 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
953 InstrItinClass itin = NoItinerary> {
954 dag OutOperandList = (outs RCD:$rd);
955 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
956 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
957 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
958 InstrItinClass Itinerary = itin;
961 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
962 SDPatternOperator SplatNode, RegisterClass RCWD,
963 RegisterClass RCWS = RCWD,
964 InstrItinClass itin = NoItinerary> {
965 dag OutOperandList = (outs RCWD:$wd);
966 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
967 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
968 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
969 (SplatNode immZExt5:$u5)))];
970 InstrItinClass Itinerary = itin;
973 // This class is deprecated and will be removed in the next few changes
974 class MSA_I5_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
975 RegisterClass RCWD, RegisterClass RCWS = RCWD,
976 InstrItinClass itin = NoItinerary> {
977 dag OutOperandList = (outs RCWD:$wd);
978 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
979 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
980 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
981 InstrItinClass Itinerary = itin;
984 class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
985 SDPatternOperator SplatNode, RegisterClass RCWD,
986 RegisterClass RCWS = RCWD,
987 InstrItinClass itin = NoItinerary> {
988 dag OutOperandList = (outs RCWD:$wd);
989 dag InOperandList = (ins RCWS:$ws, simm5:$s5);
990 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5");
991 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws,
992 (SplatNode immSExt5:$s5)))];
993 InstrItinClass Itinerary = itin;
996 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
997 RegisterClass RCWD, RegisterClass RCWS = RCWD,
998 InstrItinClass itin = NoItinerary> {
999 dag OutOperandList = (outs RCWD:$wd);
1000 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1001 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1002 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
1003 InstrItinClass Itinerary = itin;
1006 class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1008 InstrItinClass itin = NoItinerary> {
1009 dag OutOperandList = (outs RCWD:$wd);
1010 dag InOperandList = (ins simm10:$i10);
1011 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1012 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))];
1013 InstrItinClass Itinerary = itin;
1016 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1017 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1018 InstrItinClass itin = NoItinerary> {
1019 dag OutOperandList = (outs RCWD:$wd);
1020 dag InOperandList = (ins RCWS:$ws);
1021 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1022 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
1023 InstrItinClass Itinerary = itin;
1026 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1027 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1028 InstrItinClass itin = NoItinerary> :
1029 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
1032 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1033 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1034 RegisterClass RCWT = RCWD,
1035 InstrItinClass itin = NoItinerary> {
1036 dag OutOperandList = (outs RCWD:$wd);
1037 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1038 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1039 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1040 InstrItinClass Itinerary = itin;
1043 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1044 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1045 RegisterClass RCWT = RCWD,
1046 InstrItinClass itin = NoItinerary> {
1047 dag OutOperandList = (outs RCWD:$wd);
1048 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1049 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1050 list<dag> Pattern = [(set RCWD:$wd,
1051 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
1052 InstrItinClass Itinerary = itin;
1053 string Constraints = "$wd = $wd_in";
1056 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1057 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1058 RegisterClass RCWT = RCWD,
1059 InstrItinClass itin = NoItinerary> :
1060 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1062 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1063 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1064 RegisterClass RCWT = RCWD,
1065 InstrItinClass itin = NoItinerary> :
1066 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1068 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1069 dag OutOperandList = (outs);
1070 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1071 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1072 list<dag> Pattern = [];
1073 InstrItinClass Itinerary = IIBranch;
1075 bit isTerminator = 1;
1076 bit hasDelaySlot = 1;
1077 list<Register> Defs = [AT];
1080 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1081 RegisterClass RCD, RegisterClass RCWS,
1082 InstrItinClass itin = NoItinerary> {
1083 dag OutOperandList = (outs RCD:$wd);
1084 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
1085 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1086 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
1089 InstrItinClass Itinerary = itin;
1090 string Constraints = "$wd = $wd_in";
1093 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1094 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1095 InstrItinClass itin = NoItinerary> {
1096 dag OutOperandList = (outs RCWD:$wd);
1097 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
1098 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1099 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
1102 InstrItinClass Itinerary = itin;
1103 string Constraints = "$wd = $wd_in";
1106 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1107 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1108 RegisterClass RCWT = RCWD,
1109 InstrItinClass itin = NoItinerary> {
1110 dag OutOperandList = (outs RCWD:$wd);
1111 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1112 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1113 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1114 InstrItinClass Itinerary = itin;
1117 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
1118 RegisterClass RCWS = RCWD,
1119 RegisterClass RCWT = RCWD> :
1120 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1121 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1123 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
1125 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
1127 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
1129 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
1132 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
1134 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
1136 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
1138 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
1141 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
1143 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
1145 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
1147 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
1150 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
1152 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
1154 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
1156 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1159 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1160 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1161 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1162 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1164 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8, MSA128B>;
1165 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16, MSA128H>;
1166 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32, MSA128W>;
1167 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64, MSA128D>;
1169 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1170 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1171 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1172 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1174 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>;
1176 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1177 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1178 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1179 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1181 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1182 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1183 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1184 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1186 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1188 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1190 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1192 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1195 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1197 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1199 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1201 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1204 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1206 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1208 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1210 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1213 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1215 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1217 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1219 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1222 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1223 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1224 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1225 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1227 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1228 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1229 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1230 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1232 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1233 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1234 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1235 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1237 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1239 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1241 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1243 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1246 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1247 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1248 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1249 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1251 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1253 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1255 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1257 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1260 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1262 class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1264 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1266 class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1268 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1269 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1270 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1271 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1273 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1274 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1275 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1276 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1278 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1279 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1280 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1281 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1283 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1285 class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>;
1287 class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>;
1289 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1290 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1291 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1292 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1294 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1295 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1296 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1297 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1299 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1300 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1301 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1302 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1304 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1306 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>,
1308 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>,
1310 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>,
1312 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>,
1315 class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8,
1317 class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16,
1319 class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32,
1321 class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64,
1325 dag OutOperandList = (outs GPR32:$rd);
1326 dag InOperandList = (ins MSACtrl:$cs);
1327 string AsmString = "cfcmsa\t$rd, $cs";
1328 InstrItinClass Itinerary = NoItinerary;
1329 bit hasSideEffects = 1;
1332 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>;
1333 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>;
1334 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>;
1335 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>;
1337 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>;
1338 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>;
1339 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>;
1340 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>;
1342 class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", vsetle_v16i8, vsplati8,
1344 class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", vsetle_v8i16, vsplati16,
1346 class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", vsetle_v4i32, vsplati32,
1348 class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", vsetle_v2i64, vsplati64,
1351 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, vsplati8,
1353 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, vsplati16,
1355 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, vsplati32,
1357 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, vsplati64,
1360 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>;
1361 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>;
1362 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>;
1363 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>;
1365 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>;
1366 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>;
1367 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>;
1368 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>;
1370 class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", vsetlt_v16i8, vsplati8,
1372 class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", vsetlt_v8i16, vsplati16,
1374 class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", vsetlt_v4i32, vsplati32,
1376 class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", vsetlt_v2i64, vsplati64,
1379 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, vsplati8,
1381 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, vsplati16,
1383 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, vsplati32,
1385 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, vsplati64,
1388 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1390 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1392 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1395 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1397 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1399 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1403 dag OutOperandList = (outs);
1404 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1405 string AsmString = "ctcmsa\t$cd, $rs";
1406 InstrItinClass Itinerary = NoItinerary;
1407 bit hasSideEffects = 1;
1410 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1411 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1412 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1413 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1415 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1416 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1417 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1418 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1420 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1421 MSA128B, MSA128B>, IsCommutable;
1422 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1423 MSA128H, MSA128H>, IsCommutable;
1424 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1425 MSA128W, MSA128W>, IsCommutable;
1427 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1428 MSA128B, MSA128B>, IsCommutable;
1429 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1430 MSA128H, MSA128H>, IsCommutable;
1431 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1432 MSA128W, MSA128W>, IsCommutable;
1434 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1435 MSA128H, MSA128B, MSA128B>,
1437 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1438 MSA128W, MSA128H, MSA128H>,
1440 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1441 MSA128D, MSA128W, MSA128W>,
1444 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1445 MSA128H, MSA128B, MSA128B>,
1447 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1448 MSA128W, MSA128H, MSA128H>,
1450 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1451 MSA128D, MSA128W, MSA128W>,
1454 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1455 MSA128H, MSA128B, MSA128B>;
1456 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1457 MSA128W, MSA128H, MSA128H>;
1458 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1459 MSA128D, MSA128W, MSA128W>;
1461 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1462 MSA128H, MSA128B, MSA128B>;
1463 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1464 MSA128W, MSA128H, MSA128H>;
1465 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1466 MSA128D, MSA128W, MSA128W>;
1468 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1469 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1471 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1473 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1476 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>,
1478 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>,
1481 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1483 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1486 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>;
1487 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>;
1489 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>;
1490 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>;
1492 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>,
1494 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>,
1497 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>,
1499 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>,
1502 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>,
1504 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>,
1507 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>,
1509 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>,
1512 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>,
1514 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>,
1517 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>,
1519 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>,
1522 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>,
1524 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>,
1527 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1528 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1530 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1531 MSA128H, MSA128W, MSA128W>;
1532 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1533 MSA128W, MSA128D, MSA128D>;
1535 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1536 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1538 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1540 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1543 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1545 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1548 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1550 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1553 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1555 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1558 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1560 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1563 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1565 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1568 class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>;
1569 class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>;
1570 class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>;
1572 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1573 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1575 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1577 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1580 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1581 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1583 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1585 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1588 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1589 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1591 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1593 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1596 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1598 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1601 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1602 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1604 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1605 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1607 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1608 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1610 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1612 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1615 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1616 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1618 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1619 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1621 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1622 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1624 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1625 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1627 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1628 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1630 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1631 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1633 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1634 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1636 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1637 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1639 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1640 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1642 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1643 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1645 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1646 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1648 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1649 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1651 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1652 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1654 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1656 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1659 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1661 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1664 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1666 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1669 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1671 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1674 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1675 MSA128H, MSA128W, MSA128W>;
1676 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1677 MSA128W, MSA128D, MSA128D>;
1679 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1681 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1683 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1686 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1688 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1690 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1693 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1695 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1697 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1700 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1702 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1704 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1707 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1708 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1709 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1710 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1712 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1713 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1714 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1715 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1717 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1718 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1719 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1720 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1722 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1723 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1724 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1725 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1727 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1729 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1731 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1734 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1735 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1736 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1737 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1739 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1740 ValueType TyNode, RegisterClass RCWD,
1741 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1742 InstrItinClass itin = NoItinerary> {
1743 dag OutOperandList = (outs RCWD:$wd);
1744 dag InOperandList = (ins MemOpnd:$addr);
1745 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1746 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1747 InstrItinClass Itinerary = itin;
1750 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1751 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1752 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1753 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1755 class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>;
1756 class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>;
1757 class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>;
1758 class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>;
1760 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1761 ValueType TyNode, RegisterClass RCWD,
1762 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1763 InstrItinClass itin = NoItinerary> {
1764 dag OutOperandList = (outs RCWD:$wd);
1765 dag InOperandList = (ins MemOpnd:$addr);
1766 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1767 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1768 InstrItinClass Itinerary = itin;
1771 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1772 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1773 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1774 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1776 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1778 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1781 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1783 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1786 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1787 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1788 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1789 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1791 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1792 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1793 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1794 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1796 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>;
1797 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>;
1798 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>;
1799 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>;
1801 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>;
1802 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>;
1803 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>;
1804 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>;
1806 class MAXI_S_B_DESC : MSA_I5_X_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b,
1808 class MAXI_S_H_DESC : MSA_I5_X_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h,
1810 class MAXI_S_W_DESC : MSA_I5_X_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w,
1812 class MAXI_S_D_DESC : MSA_I5_X_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d,
1815 class MAXI_U_B_DESC : MSA_I5_X_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b,
1817 class MAXI_U_H_DESC : MSA_I5_X_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h,
1819 class MAXI_U_W_DESC : MSA_I5_X_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w,
1821 class MAXI_U_D_DESC : MSA_I5_X_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d,
1824 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1825 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1826 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1827 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1829 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>;
1830 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>;
1831 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>;
1832 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>;
1834 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>;
1835 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>;
1836 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>;
1837 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>;
1839 class MINI_S_B_DESC : MSA_I5_X_DESC_BASE<"mini_s.b", int_mips_mini_s_b,
1841 class MINI_S_H_DESC : MSA_I5_X_DESC_BASE<"mini_s.h", int_mips_mini_s_h,
1843 class MINI_S_W_DESC : MSA_I5_X_DESC_BASE<"mini_s.w", int_mips_mini_s_w,
1845 class MINI_S_D_DESC : MSA_I5_X_DESC_BASE<"mini_s.d", int_mips_mini_s_d,
1848 class MINI_U_B_DESC : MSA_I5_X_DESC_BASE<"mini_u.b", int_mips_mini_u_b,
1850 class MINI_U_H_DESC : MSA_I5_X_DESC_BASE<"mini_u.h", int_mips_mini_u_h,
1852 class MINI_U_W_DESC : MSA_I5_X_DESC_BASE<"mini_u.w", int_mips_mini_u_w,
1854 class MINI_U_D_DESC : MSA_I5_X_DESC_BASE<"mini_u.d", int_mips_mini_u_d,
1857 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1858 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1859 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1860 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1862 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1863 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1864 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1865 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1868 dag OutOperandList = (outs MSA128B:$wd);
1869 dag InOperandList = (ins MSA128B:$ws);
1870 string AsmString = "move.v\t$wd, $ws";
1871 list<dag> Pattern = [];
1872 InstrItinClass Itinerary = NoItinerary;
1875 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1877 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1880 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1882 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
1885 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
1886 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
1887 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
1888 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
1890 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
1891 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
1893 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
1895 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
1898 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
1899 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
1900 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
1901 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
1903 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
1904 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
1905 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
1906 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
1908 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
1909 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
1910 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
1911 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
1913 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
1914 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
1915 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
1916 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
1918 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>;
1920 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
1921 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
1922 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
1923 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
1925 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>;
1927 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
1928 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
1929 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
1930 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
1932 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
1933 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
1934 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
1935 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
1937 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
1938 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
1939 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
1940 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
1942 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
1943 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
1944 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
1945 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
1947 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
1948 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
1949 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
1950 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
1952 class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
1953 class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
1954 class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
1956 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
1957 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
1958 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
1959 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
1961 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
1962 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
1963 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
1964 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
1966 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
1967 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
1968 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
1969 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
1971 class SLLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"slli.b", shl, MSA128B>;
1972 class SLLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"slli.h", shl, MSA128H>;
1973 class SLLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"slli.w", shl, MSA128W>;
1974 class SLLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"slli.d", shl, MSA128D>;
1976 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
1978 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
1980 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
1982 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
1985 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
1987 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
1989 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
1991 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
1994 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
1995 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
1996 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
1997 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
1999 class SRAI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srai.b", sra, MSA128B>;
2000 class SRAI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srai.h", sra, MSA128H>;
2001 class SRAI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srai.w", sra, MSA128W>;
2002 class SRAI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srai.d", sra, MSA128D>;
2004 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
2005 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
2006 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
2007 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
2009 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
2010 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
2011 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
2012 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
2014 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
2015 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
2016 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
2017 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
2019 class SRLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srli.b", srl, MSA128B>;
2020 class SRLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srli.h", srl, MSA128H>;
2021 class SRLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srli.w", srl, MSA128W>;
2022 class SRLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srli.d", srl, MSA128D>;
2024 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
2025 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
2026 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
2027 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
2029 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
2030 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
2031 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
2032 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
2034 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2035 ValueType TyNode, RegisterClass RCWD,
2036 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
2037 InstrItinClass itin = NoItinerary> {
2038 dag OutOperandList = (outs);
2039 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2040 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2041 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2042 InstrItinClass Itinerary = itin;
2045 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2046 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2047 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2048 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2050 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2051 ValueType TyNode, RegisterClass RCWD,
2052 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2053 InstrItinClass itin = NoItinerary> {
2054 dag OutOperandList = (outs);
2055 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2056 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2057 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2058 InstrItinClass Itinerary = itin;
2061 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2062 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2063 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2064 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2066 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
2067 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
2068 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
2069 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
2071 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
2072 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
2073 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
2074 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
2076 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2078 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2080 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2082 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2085 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2087 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2089 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2091 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2094 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
2095 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
2096 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
2097 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
2099 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8, MSA128B>;
2100 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16, MSA128H>;
2101 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32, MSA128W>;
2102 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64, MSA128D>;
2104 class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>;
2105 class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>;
2106 class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>;
2107 class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>;
2109 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
2110 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
2111 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
2112 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
2114 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>;
2116 // Instruction defs.
2117 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2118 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2119 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2120 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2122 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2123 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2124 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2125 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2127 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2128 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2129 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2130 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2132 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2133 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2134 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2135 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2137 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2138 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2139 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2140 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2142 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2143 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2144 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2145 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2147 def AND_V : AND_V_ENC, AND_V_DESC;
2148 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2149 PseudoInstExpansion<(AND_V MSA128B:$wd,
2150 MSA128B:$ws, MSA128B:$wt)>;
2151 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2152 PseudoInstExpansion<(AND_V MSA128B:$wd,
2153 MSA128B:$ws, MSA128B:$wt)>;
2154 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2155 PseudoInstExpansion<(AND_V MSA128B:$wd,
2156 MSA128B:$ws, MSA128B:$wt)>;
2158 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2160 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2161 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2162 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2163 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2165 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2166 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2167 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2168 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2170 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2171 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2172 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2173 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2175 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2176 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2177 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2178 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2180 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2181 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2182 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2183 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2185 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2186 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2187 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2188 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2190 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2191 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2192 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2193 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2195 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2196 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2197 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2198 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2200 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2201 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2202 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2203 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2205 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2206 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2207 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2208 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2210 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2211 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2212 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2213 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2215 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2216 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2217 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2218 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2220 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2222 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2224 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2226 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2228 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2229 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2230 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2231 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2233 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2234 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2235 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2236 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2238 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2239 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2240 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2241 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2243 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2245 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2247 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2249 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2250 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2251 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2252 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2254 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2255 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2256 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2257 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2259 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2260 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2261 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2262 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2264 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2266 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2267 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2268 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2269 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2271 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2272 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2273 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2274 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2276 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2278 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2279 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2280 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2281 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2283 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2284 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2285 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2286 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2288 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2289 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2290 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2291 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2293 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2294 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2295 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2296 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2298 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2299 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2300 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2301 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2303 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2304 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2305 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2306 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2308 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2309 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2310 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2311 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2313 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2314 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2315 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2316 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2318 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2319 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2320 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2322 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2323 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2324 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2326 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2328 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2329 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2330 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2331 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2333 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2334 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2335 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2336 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2338 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2339 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2340 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2342 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2343 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2344 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2346 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2347 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2348 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2350 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2351 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2352 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2354 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2355 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2356 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2358 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2359 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2360 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2362 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2363 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2365 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2366 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2368 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2369 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2371 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2372 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2374 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2375 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2377 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2378 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2380 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2381 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2383 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2384 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2386 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2387 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2389 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2390 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2392 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2393 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2395 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2396 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2398 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2399 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2401 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2402 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2404 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2405 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2407 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2408 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2410 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2411 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2413 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2414 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2416 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2417 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2419 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2420 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2422 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2423 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2425 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2426 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2428 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2429 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2430 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2432 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2433 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2435 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2436 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2438 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2439 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2441 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2442 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2444 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2445 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2447 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2448 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2450 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2451 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2453 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2454 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2456 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2457 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2459 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2460 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2462 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2463 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2465 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2466 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2468 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2469 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2471 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2472 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2474 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2475 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2477 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2478 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2480 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2481 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2483 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2484 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2486 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2487 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2489 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2490 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2492 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2493 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2495 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2496 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2498 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2499 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2501 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2502 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2504 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2505 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2507 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2508 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2510 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2511 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2513 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2514 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2516 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2517 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2519 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2520 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2521 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2523 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2524 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2525 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2527 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2528 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2529 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2531 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2532 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2533 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2535 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2536 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2537 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2538 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2540 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2541 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2542 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2543 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2545 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2546 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2547 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2548 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2550 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2551 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2552 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2553 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2555 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2556 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2557 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2559 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2560 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2561 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2562 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2564 def LD_B: LD_B_ENC, LD_B_DESC;
2565 def LD_H: LD_H_ENC, LD_H_DESC;
2566 def LD_W: LD_W_ENC, LD_W_DESC;
2567 def LD_D: LD_D_ENC, LD_D_DESC;
2569 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2570 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2571 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2572 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2574 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2575 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2576 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2577 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2579 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2580 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2582 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2583 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2585 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2586 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2587 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2588 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2590 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2591 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2592 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2593 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2595 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2596 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2597 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2598 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2600 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2601 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2602 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2603 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2605 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2606 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2607 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2608 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2610 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2611 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2612 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2613 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2615 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2616 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2617 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2618 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2620 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2621 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2622 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2623 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2625 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2626 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2627 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2628 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2630 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2631 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2632 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2633 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2635 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2636 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2637 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2638 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2640 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2641 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2642 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2643 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2645 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2646 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2647 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2648 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2650 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2652 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2653 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2655 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2656 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2658 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2659 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2660 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2661 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2663 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2664 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2666 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2667 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2669 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2670 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2671 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2672 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2674 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2675 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2676 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2677 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2679 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2680 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2681 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2682 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2684 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2685 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2686 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2687 MSA128B:$ws, MSA128B:$wt)>;
2688 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2689 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2690 MSA128B:$ws, MSA128B:$wt)>;
2691 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2692 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2693 MSA128B:$ws, MSA128B:$wt)>;
2695 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2697 def OR_V : OR_V_ENC, OR_V_DESC;
2698 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2699 PseudoInstExpansion<(OR_V MSA128B:$wd,
2700 MSA128B:$ws, MSA128B:$wt)>;
2701 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2702 PseudoInstExpansion<(OR_V MSA128B:$wd,
2703 MSA128B:$ws, MSA128B:$wt)>;
2704 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2705 PseudoInstExpansion<(OR_V MSA128B:$wd,
2706 MSA128B:$ws, MSA128B:$wt)>;
2708 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2710 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2711 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2712 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2713 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2715 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2716 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2717 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2718 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2720 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2721 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2722 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2723 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2725 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2726 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2727 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2728 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2730 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2731 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2732 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2733 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2735 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2736 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2737 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2739 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2740 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2741 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2742 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2744 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2745 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2746 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2747 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2749 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2750 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2751 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2752 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2754 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2755 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2756 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2757 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2759 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2760 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2761 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2762 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2764 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2765 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2766 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2767 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2769 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2770 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2771 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2772 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2774 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2775 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2776 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2777 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2779 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2780 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2781 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2782 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2784 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2785 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2786 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2787 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2789 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2790 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2791 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2792 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2794 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2795 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2796 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2797 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2799 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2800 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2801 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2802 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2804 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2805 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2806 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2807 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2809 def ST_B: ST_B_ENC, ST_B_DESC;
2810 def ST_H: ST_H_ENC, ST_H_DESC;
2811 def ST_W: ST_W_ENC, ST_W_DESC;
2812 def ST_D: ST_D_ENC, ST_D_DESC;
2814 def STX_B: STX_B_ENC, STX_B_DESC;
2815 def STX_H: STX_H_ENC, STX_H_DESC;
2816 def STX_W: STX_W_ENC, STX_W_DESC;
2817 def STX_D: STX_D_ENC, STX_D_DESC;
2819 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2820 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2821 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2822 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2824 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2825 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2826 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2827 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2829 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2830 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2831 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2832 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2834 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2835 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2836 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2837 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2839 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2840 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2841 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2842 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2844 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2845 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2846 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2847 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2849 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2850 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2851 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2852 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2854 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2855 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
2856 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2857 MSA128B:$ws, MSA128B:$wt)>;
2858 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
2859 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2860 MSA128B:$ws, MSA128B:$wt)>;
2861 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
2862 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2863 MSA128B:$ws, MSA128B:$wt)>;
2865 def XORI_B : XORI_B_ENC, XORI_B_DESC;
2868 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
2869 Pat<pattern, result>, Requires<pred>;
2871 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
2872 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
2874 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
2875 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
2876 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
2877 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
2878 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
2879 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
2880 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
2882 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
2883 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
2884 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
2886 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
2887 (ST_B MSA128B:$ws, addr:$addr)>;
2888 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
2889 (ST_H MSA128H:$ws, addr:$addr)>;
2890 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
2891 (ST_W MSA128W:$ws, addr:$addr)>;
2892 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
2893 (ST_D MSA128D:$ws, addr:$addr)>;
2894 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
2895 (ST_H MSA128H:$ws, addr:$addr)>;
2896 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
2897 (ST_W MSA128W:$ws, addr:$addr)>;
2898 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
2899 (ST_D MSA128D:$ws, addr:$addr)>;
2901 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
2902 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
2903 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
2904 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
2905 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
2906 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
2908 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
2909 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
2910 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2911 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
2913 // These are endian-independant because the element size doesnt change
2914 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
2915 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
2916 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
2917 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
2918 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
2919 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
2921 // Little endian bitcasts are always no-ops
2922 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
2923 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
2924 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
2925 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
2926 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
2927 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
2929 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
2930 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
2931 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
2932 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
2933 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
2935 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
2936 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
2937 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
2938 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
2939 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
2941 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
2942 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
2943 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
2944 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
2945 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
2947 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
2948 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
2949 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
2950 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
2951 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
2953 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
2954 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
2955 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
2956 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
2957 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
2959 // Big endian bitcasts expand to shuffle instructions.
2960 // This is because bitcast is defined to be a store/load sequence and the
2961 // vector store/load instructions are mixed-endian with respect to the vector
2962 // as a whole (little endian with respect to element order, but big endian
2965 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
2966 RegisterClass DstRC, MSAInst Insn,
2967 RegisterClass ViaRC> :
2968 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2969 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
2973 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
2974 RegisterClass DstRC, MSAInst Insn,
2975 RegisterClass ViaRC> :
2976 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2977 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
2981 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
2982 RegisterClass DstRC> :
2983 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2985 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
2986 RegisterClass DstRC> :
2987 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2989 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
2990 RegisterClass DstRC> :
2991 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2995 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3000 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3001 RegisterClass DstRC> :
3002 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3004 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3005 RegisterClass DstRC> :
3006 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3008 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3009 RegisterClass DstRC> :
3010 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3012 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3013 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3014 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3015 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3016 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3017 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3019 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3020 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3021 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3022 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3023 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3025 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3026 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3027 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3028 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3029 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3031 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3032 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3033 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3034 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3035 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3037 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3038 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3039 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3040 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3041 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3043 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3044 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3045 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3046 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3047 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3049 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3050 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3051 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3052 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3053 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3055 // Pseudos used to implement BNZ.df, and BZ.df
3057 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3059 InstrItinClass itin = NoItinerary> :
3060 MipsPseudo<(outs GPR32:$dst),
3062 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3063 bit usesCustomInserter = 1;
3066 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3067 MSA128B, NoItinerary>;
3068 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3069 MSA128H, NoItinerary>;
3070 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3071 MSA128W, NoItinerary>;
3072 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3073 MSA128D, NoItinerary>;
3074 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3075 MSA128B, NoItinerary>;
3077 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3078 MSA128B, NoItinerary>;
3079 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3080 MSA128H, NoItinerary>;
3081 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3082 MSA128W, NoItinerary>;
3083 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3084 MSA128D, NoItinerary>;
3085 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3086 MSA128B, NoItinerary>;