1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>;
15 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
17 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
18 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
19 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
20 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
21 def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>;
22 def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>;
23 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
24 [SDNPCommutative, SDNPAssociative]>;
26 def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>;
27 def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>;
28 def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>;
29 def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>;
32 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
33 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
35 def uimm3 : Operand<i32> {
36 let PrintMethod = "printUnsignedImm";
39 def uimm4 : Operand<i32> {
40 let PrintMethod = "printUnsignedImm";
43 def uimm8 : Operand<i32> {
44 let PrintMethod = "printUnsignedImm";
47 def simm5 : Operand<i32>;
49 def simm10 : Operand<i32>;
51 // Instruction encoding.
52 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
53 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
54 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
55 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
57 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
58 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
59 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
60 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
62 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
63 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
64 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
65 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
67 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
68 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
69 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
70 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
72 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
73 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
74 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
75 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
77 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
78 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
79 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
80 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
82 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
84 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
86 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
87 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
88 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
89 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
91 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
92 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
93 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
94 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
96 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
97 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
98 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
99 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
101 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
102 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
103 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
104 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
106 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
107 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
108 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
109 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
111 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
112 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
113 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
114 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
116 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
117 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
118 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
119 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
121 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
122 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
123 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
124 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
126 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
127 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
128 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
129 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
131 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
132 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
133 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
134 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
136 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
137 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
138 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
139 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
141 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
142 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
143 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
144 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
146 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
148 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
150 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
152 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
154 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
155 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
156 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
157 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
159 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
160 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
161 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
162 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
164 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
165 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
166 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
167 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
169 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
171 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
173 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
175 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
176 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
177 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
178 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
180 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
181 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
182 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
183 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
185 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
186 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
187 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
188 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
190 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
192 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
193 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
194 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
195 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
197 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
198 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
199 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
200 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
202 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
204 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
205 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
206 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
207 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
209 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
210 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
211 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
212 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
214 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
215 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
216 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
217 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
219 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
220 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
221 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
222 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
224 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
225 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
226 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
227 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
229 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
230 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
231 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
232 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
234 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
235 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
236 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
237 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
239 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
240 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
241 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
242 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
244 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
245 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
246 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
248 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
249 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
250 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
252 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
254 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
255 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
256 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
257 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
259 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
260 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
261 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
262 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
264 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
265 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
266 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
268 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
269 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
270 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
272 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
273 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
274 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
276 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
277 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
278 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
280 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
281 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
282 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
284 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
285 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
286 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
288 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
289 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
291 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
292 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
294 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
295 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
297 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
298 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
300 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
301 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
303 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
304 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
306 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
307 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
309 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
310 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
312 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
313 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
315 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
316 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
318 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
319 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
321 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
322 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
324 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
325 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
327 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
328 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
330 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
331 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
333 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
334 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
336 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
337 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
339 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
340 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
342 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
343 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
345 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
346 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
348 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
349 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
351 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
352 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
354 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
355 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
356 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
358 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
359 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
361 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
362 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
364 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
365 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
367 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
368 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
370 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
371 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
373 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
374 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
376 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
377 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
379 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
380 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
382 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
383 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
385 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
386 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
388 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
389 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
391 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
392 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
394 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
395 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
397 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
398 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
400 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
401 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
403 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
404 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
406 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
407 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
409 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
410 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
412 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
413 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
415 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
416 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
418 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
419 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
421 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
422 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
424 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
425 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
427 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
428 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
430 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
431 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
433 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
434 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
436 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
437 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
439 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
440 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
442 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
443 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
445 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
446 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
447 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
449 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
450 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
451 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
453 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
454 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
455 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
457 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
458 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
459 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
461 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
462 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
463 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
464 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
466 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
467 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
468 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
469 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
471 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
472 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
473 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
474 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
476 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
477 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
478 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
479 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
481 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
482 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
483 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
485 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
486 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
487 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
488 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
490 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
491 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
492 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
493 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
495 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
496 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
497 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
498 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
500 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
501 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
502 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
503 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
505 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
506 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
508 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
509 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
511 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
512 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
513 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
514 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
516 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
517 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
518 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
519 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
521 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
522 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
523 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
524 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
526 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
527 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
528 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
529 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
531 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
532 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
533 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
534 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
536 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
537 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
538 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
539 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
541 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
542 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
543 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
544 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
546 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
547 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
548 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
549 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
551 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
552 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
553 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
554 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
556 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
557 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
558 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
559 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
561 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
562 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
563 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
564 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
566 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
567 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
568 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
569 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
571 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
572 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
573 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
574 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
576 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
578 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
579 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
581 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
582 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
584 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
585 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
586 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
587 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
589 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
590 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
592 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
593 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
595 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
596 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
597 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
598 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
600 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
601 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
602 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
603 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
605 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
606 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
607 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
608 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
610 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
612 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
614 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
616 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
618 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
619 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
620 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
621 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
623 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
624 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
625 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
626 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
628 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
629 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
630 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
631 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
633 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
634 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
635 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
636 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
638 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
639 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
640 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
641 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
643 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
644 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
645 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
647 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
648 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
649 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
650 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
652 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
653 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
654 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
655 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
657 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
658 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
659 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
660 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
662 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
663 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
664 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
665 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
667 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
668 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
669 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
670 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
672 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
673 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
674 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
675 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
677 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
678 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
679 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
680 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
682 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
683 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
684 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
685 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
687 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
688 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
689 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
690 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
692 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
693 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
694 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
695 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
697 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
698 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
699 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
700 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
702 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
703 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
704 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
705 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
707 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
708 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
709 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
710 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
712 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
713 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
714 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
715 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
717 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
718 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
719 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
720 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
722 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
723 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
724 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
725 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
727 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
728 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
729 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
730 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
732 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
733 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
734 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
735 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
737 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
738 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
739 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
740 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
742 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
743 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
744 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
745 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
747 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
748 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
749 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
750 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
752 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
753 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
754 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
755 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
757 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
758 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
759 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
760 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
762 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
764 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
767 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
768 RegisterClass RCWD, RegisterClass RCWS = RCWD,
769 InstrItinClass itin = NoItinerary> {
770 dag OutOperandList = (outs RCWD:$wd);
771 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
772 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
773 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
774 InstrItinClass Itinerary = itin;
777 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
778 RegisterClass RCWD, RegisterClass RCWS = RCWD,
779 InstrItinClass itin = NoItinerary> {
780 dag OutOperandList = (outs RCWD:$wd);
781 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
782 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
783 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
784 InstrItinClass Itinerary = itin;
787 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
788 RegisterClass RCWD, RegisterClass RCWS = RCWD,
789 InstrItinClass itin = NoItinerary> {
790 dag OutOperandList = (outs RCWD:$wd);
791 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
792 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
793 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
794 InstrItinClass Itinerary = itin;
797 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
798 RegisterClass RCWD, RegisterClass RCWS = RCWD,
799 InstrItinClass itin = NoItinerary> {
800 dag OutOperandList = (outs RCWD:$wd);
801 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
802 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
803 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
804 InstrItinClass Itinerary = itin;
807 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
808 RegisterClass RCD, RegisterClass RCWS,
809 InstrItinClass itin = NoItinerary> {
810 dag OutOperandList = (outs RCD:$rd);
811 dag InOperandList = (ins RCWS:$ws, uimm6:$n);
812 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
813 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))];
814 InstrItinClass Itinerary = itin;
817 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
818 RegisterClass RCWD, RegisterClass RCWS = RCWD,
819 InstrItinClass itin = NoItinerary> {
820 dag OutOperandList = (outs RCWD:$wd);
821 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
822 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
823 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
824 InstrItinClass Itinerary = itin;
827 class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
828 RegisterClass RCWD, RegisterClass RCWS = RCWD,
829 InstrItinClass itin = NoItinerary> {
830 dag OutOperandList = (outs RCWD:$wd);
831 dag InOperandList = (ins RCWS:$ws, simm5:$s5);
832 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5");
833 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))];
834 InstrItinClass Itinerary = itin;
837 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
838 RegisterClass RCWD, RegisterClass RCWS = RCWD,
839 InstrItinClass itin = NoItinerary> {
840 dag OutOperandList = (outs RCWD:$wd);
841 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
842 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
843 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
844 InstrItinClass Itinerary = itin;
847 class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
849 InstrItinClass itin = NoItinerary> {
850 dag OutOperandList = (outs RCWD:$wd);
851 dag InOperandList = (ins simm10:$i10);
852 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
853 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))];
854 InstrItinClass Itinerary = itin;
857 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
858 RegisterClass RCWD, RegisterClass RCWS = RCWD,
859 InstrItinClass itin = NoItinerary> {
860 dag OutOperandList = (outs RCWD:$wd);
861 dag InOperandList = (ins RCWS:$ws);
862 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
863 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
864 InstrItinClass Itinerary = itin;
867 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
868 RegisterClass RCWD, RegisterClass RCWS = RCWD,
869 InstrItinClass itin = NoItinerary> :
870 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
873 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
874 RegisterClass RCWD, RegisterClass RCWS = RCWD,
875 RegisterClass RCWT = RCWD,
876 InstrItinClass itin = NoItinerary> {
877 dag OutOperandList = (outs RCWD:$wd);
878 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
879 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
880 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
881 InstrItinClass Itinerary = itin;
884 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
885 RegisterClass RCWD, RegisterClass RCWS = RCWD,
886 RegisterClass RCWT = RCWD,
887 InstrItinClass itin = NoItinerary> {
888 dag OutOperandList = (outs RCWD:$wd);
889 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
890 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
891 list<dag> Pattern = [(set RCWD:$wd,
892 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
893 InstrItinClass Itinerary = itin;
894 string Constraints = "$wd = $wd_in";
897 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
898 RegisterClass RCWD, RegisterClass RCWS = RCWD,
899 RegisterClass RCWT = RCWD,
900 InstrItinClass itin = NoItinerary> :
901 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
903 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
904 RegisterClass RCWD, RegisterClass RCWS = RCWD,
905 RegisterClass RCWT = RCWD,
906 InstrItinClass itin = NoItinerary> :
907 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
909 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
910 dag OutOperandList = (outs);
911 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
912 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
913 list<dag> Pattern = [];
914 InstrItinClass Itinerary = IIBranch;
916 bit isTerminator = 1;
917 bit hasDelaySlot = 1;
918 list<Register> Defs = [AT];
921 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
922 RegisterClass RCD, RegisterClass RCWS,
923 InstrItinClass itin = NoItinerary> {
924 dag OutOperandList = (outs RCD:$wd);
925 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs);
926 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
927 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
930 InstrItinClass Itinerary = itin;
931 string Constraints = "$wd = $wd_in";
934 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
935 RegisterClass RCWD, RegisterClass RCWS = RCWD,
936 InstrItinClass itin = NoItinerary> {
937 dag OutOperandList = (outs RCWD:$wd);
938 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
939 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
940 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
943 InstrItinClass Itinerary = itin;
944 string Constraints = "$wd = $wd_in";
947 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
948 RegisterClass RCWD, RegisterClass RCWS = RCWD,
949 RegisterClass RCWT = RCWD,
950 InstrItinClass itin = NoItinerary> {
951 dag OutOperandList = (outs RCWD:$wd);
952 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
953 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
954 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
955 InstrItinClass Itinerary = itin;
958 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
959 RegisterClass RCWS = RCWD,
960 RegisterClass RCWT = RCWD> :
961 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
962 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
964 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
966 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
968 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
970 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
973 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
975 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
977 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
979 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
982 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
984 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
986 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
988 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
991 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
993 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
995 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
997 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1000 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1001 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1002 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1003 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1005 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>;
1006 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>;
1007 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>;
1008 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>;
1010 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1011 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1012 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1013 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1015 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>;
1017 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1018 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1019 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1020 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1022 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1023 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1024 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1025 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1027 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1029 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1031 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1033 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1036 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1038 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1040 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1042 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1045 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1047 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1049 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1051 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1054 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1056 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1058 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1060 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1063 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1064 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1065 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1066 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1068 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1069 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1070 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1071 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1073 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1074 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1075 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1076 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1078 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1080 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1082 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1084 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1087 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1088 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1089 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1090 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1092 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1094 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1096 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1098 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1101 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1103 class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1105 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1107 class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1109 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1110 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1111 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1112 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1114 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1115 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1116 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1117 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1119 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1120 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1121 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1122 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1124 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1126 class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>;
1128 class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>;
1130 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1131 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1132 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1133 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1135 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1136 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1137 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1138 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1140 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1141 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1142 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1143 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1145 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1147 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>,
1149 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>,
1151 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>,
1153 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>,
1156 class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>;
1157 class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>;
1158 class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>;
1159 class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>;
1162 dag OutOperandList = (outs GPR32:$rd);
1163 dag InOperandList = (ins MSACtrl:$cs);
1164 string AsmString = "cfcmsa\t$rd, $cs";
1165 InstrItinClass Itinerary = NoItinerary;
1166 bit hasSideEffects = 1;
1169 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>;
1170 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>;
1171 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>;
1172 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>;
1174 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>;
1175 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>;
1176 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>;
1177 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>;
1179 class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b,
1181 class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h,
1183 class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w,
1185 class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d,
1188 class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b,
1190 class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h,
1192 class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w,
1194 class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d,
1197 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>;
1198 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>;
1199 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>;
1200 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>;
1202 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>;
1203 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>;
1204 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>;
1205 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>;
1207 class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b,
1209 class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h,
1211 class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w,
1213 class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d,
1216 class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b,
1218 class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h,
1220 class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w,
1222 class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d,
1225 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b,
1227 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h,
1229 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w,
1232 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b,
1234 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h,
1236 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w,
1240 dag OutOperandList = (outs);
1241 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1242 string AsmString = "ctcmsa\t$cd, $rs";
1243 InstrItinClass Itinerary = NoItinerary;
1244 bit hasSideEffects = 1;
1247 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1248 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1249 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1250 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1252 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1253 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1254 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1255 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1257 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1258 MSA128B, MSA128B>, IsCommutable;
1259 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1260 MSA128H, MSA128H>, IsCommutable;
1261 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1262 MSA128W, MSA128W>, IsCommutable;
1264 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1265 MSA128B, MSA128B>, IsCommutable;
1266 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1267 MSA128H, MSA128H>, IsCommutable;
1268 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1269 MSA128W, MSA128W>, IsCommutable;
1271 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1272 MSA128H, MSA128B, MSA128B>,
1274 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1275 MSA128W, MSA128H, MSA128H>,
1277 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1278 MSA128D, MSA128W, MSA128W>,
1281 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1282 MSA128H, MSA128B, MSA128B>,
1284 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1285 MSA128W, MSA128H, MSA128H>,
1287 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1288 MSA128D, MSA128W, MSA128W>,
1291 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1292 MSA128H, MSA128B, MSA128B>;
1293 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1294 MSA128W, MSA128H, MSA128H>;
1295 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1296 MSA128D, MSA128W, MSA128W>;
1298 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1299 MSA128H, MSA128B, MSA128B>;
1300 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1301 MSA128W, MSA128H, MSA128H>;
1302 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1303 MSA128D, MSA128W, MSA128W>;
1305 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1306 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1308 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1310 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1313 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>,
1315 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>,
1318 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1320 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1323 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>;
1324 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>;
1326 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>;
1327 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>;
1329 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>,
1331 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>,
1334 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>,
1336 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>,
1339 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>,
1341 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>,
1344 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>,
1346 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>,
1349 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>,
1351 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>,
1354 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>,
1356 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>,
1359 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>,
1361 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>,
1364 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1365 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1367 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1368 MSA128H, MSA128W, MSA128W>;
1369 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1370 MSA128W, MSA128D, MSA128D>;
1372 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1373 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1375 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1377 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1380 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1382 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1385 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1387 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1390 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1392 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1395 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1397 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1400 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1402 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1405 class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>;
1406 class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>;
1407 class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>;
1409 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1410 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1412 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1414 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1417 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1418 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1420 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1422 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1425 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1426 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1428 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1430 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1433 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1435 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1438 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1439 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1441 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1442 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1444 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1445 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1447 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1449 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1452 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1453 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1455 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1456 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1458 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1459 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1461 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1462 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1464 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1465 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1467 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1468 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1470 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1471 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1473 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1474 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1476 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1477 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1479 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1480 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1482 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1483 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1485 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1486 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1488 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1489 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1491 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1493 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1496 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1498 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1501 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1503 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1506 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1508 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1511 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1512 MSA128H, MSA128W, MSA128W>;
1513 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1514 MSA128W, MSA128D, MSA128D>;
1516 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1518 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1520 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1523 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1525 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1527 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1530 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1532 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1534 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1537 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1539 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1541 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1544 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1545 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1546 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1547 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1549 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1550 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1551 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1552 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1554 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1555 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1556 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1557 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1559 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1560 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1561 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1562 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1564 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b,
1566 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h,
1568 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w,
1571 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1572 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1573 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1574 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1576 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1577 ValueType TyNode, RegisterClass RCWD,
1578 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1579 InstrItinClass itin = NoItinerary> {
1580 dag OutOperandList = (outs RCWD:$wd);
1581 dag InOperandList = (ins MemOpnd:$addr);
1582 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1583 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1584 InstrItinClass Itinerary = itin;
1587 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1588 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1589 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1590 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1592 class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>;
1593 class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>;
1594 class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>;
1595 class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>;
1597 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1598 ValueType TyNode, RegisterClass RCWD,
1599 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1600 InstrItinClass itin = NoItinerary> {
1601 dag OutOperandList = (outs RCWD:$wd);
1602 dag InOperandList = (ins MemOpnd:$addr);
1603 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1604 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1605 InstrItinClass Itinerary = itin;
1608 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1609 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1610 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1611 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1613 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1615 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1618 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1620 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1623 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1624 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1625 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1626 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1628 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1629 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1630 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1631 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1633 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>;
1634 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>;
1635 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>;
1636 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>;
1638 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>;
1639 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>;
1640 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>;
1641 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>;
1643 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>;
1644 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>;
1645 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>;
1646 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>;
1648 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>;
1649 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>;
1650 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>;
1651 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>;
1653 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1654 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1655 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1656 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1658 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>;
1659 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>;
1660 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>;
1661 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>;
1663 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>;
1664 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>;
1665 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>;
1666 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>;
1668 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>;
1669 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>;
1670 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>;
1671 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>;
1673 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>;
1674 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>;
1675 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>;
1676 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>;
1678 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1679 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1680 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1681 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1683 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1684 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1685 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1686 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1689 dag OutOperandList = (outs MSA128B:$wd);
1690 dag InOperandList = (ins MSA128B:$ws);
1691 string AsmString = "move.v\t$wd, $ws";
1692 list<dag> Pattern = [];
1693 InstrItinClass Itinerary = NoItinerary;
1696 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1698 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1701 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1703 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
1706 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
1707 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
1708 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
1709 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
1711 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
1712 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
1714 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
1716 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
1719 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
1720 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
1721 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
1722 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
1724 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
1725 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
1726 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
1727 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
1729 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
1730 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
1731 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
1732 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
1734 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
1735 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
1736 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
1737 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
1739 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>;
1741 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
1742 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
1743 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
1744 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
1746 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>;
1748 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
1749 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
1750 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
1751 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
1753 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
1754 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
1755 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
1756 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
1758 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b, MSA128B>;
1759 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h, MSA128H>;
1760 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w, MSA128W>;
1761 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d, MSA128D>;
1763 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
1764 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
1765 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
1766 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
1768 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
1769 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
1770 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
1771 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
1773 class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
1774 class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
1775 class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
1777 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
1778 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
1779 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
1780 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
1782 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
1783 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
1784 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
1785 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
1787 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
1788 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
1789 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
1790 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
1792 class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>;
1793 class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>;
1794 class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>;
1795 class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>;
1797 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
1799 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
1801 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
1803 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
1806 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
1808 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
1810 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
1812 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
1815 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
1816 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
1817 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
1818 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
1820 class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>;
1821 class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>;
1822 class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>;
1823 class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>;
1825 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
1826 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
1827 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
1828 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
1830 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
1831 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
1832 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
1833 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
1835 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
1836 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
1837 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
1838 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
1840 class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>;
1841 class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>;
1842 class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>;
1843 class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>;
1845 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
1846 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
1847 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
1848 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
1850 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
1851 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
1852 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
1853 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
1855 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1856 ValueType TyNode, RegisterClass RCWD,
1857 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1858 InstrItinClass itin = NoItinerary> {
1859 dag OutOperandList = (outs);
1860 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1861 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1862 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1863 InstrItinClass Itinerary = itin;
1866 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
1867 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
1868 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
1869 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
1871 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1872 ValueType TyNode, RegisterClass RCWD,
1873 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1874 InstrItinClass itin = NoItinerary> {
1875 dag OutOperandList = (outs);
1876 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1877 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1878 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1879 InstrItinClass Itinerary = itin;
1882 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
1883 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
1884 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
1885 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
1887 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
1888 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
1889 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
1890 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
1892 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
1893 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
1894 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
1895 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
1897 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
1899 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
1901 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
1903 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
1906 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
1908 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
1910 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
1912 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
1915 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
1916 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
1917 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
1918 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
1920 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>;
1921 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>;
1922 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>;
1923 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>;
1925 class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>;
1926 class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>;
1927 class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>;
1928 class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>;
1930 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
1931 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
1932 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
1933 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
1935 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>;
1937 // Instruction defs.
1938 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
1939 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
1940 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
1941 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
1943 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
1944 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
1945 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
1946 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
1948 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
1949 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
1950 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
1951 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
1953 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
1954 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
1955 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
1956 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
1958 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
1959 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
1960 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
1961 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
1963 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
1964 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
1965 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
1966 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
1968 def AND_V : AND_V_ENC, AND_V_DESC;
1969 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
1970 PseudoInstExpansion<(AND_V MSA128B:$wd,
1971 MSA128B:$ws, MSA128B:$wt)>;
1972 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
1973 PseudoInstExpansion<(AND_V MSA128B:$wd,
1974 MSA128B:$ws, MSA128B:$wt)>;
1975 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
1976 PseudoInstExpansion<(AND_V MSA128B:$wd,
1977 MSA128B:$ws, MSA128B:$wt)>;
1979 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
1981 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
1982 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
1983 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
1984 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
1986 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
1987 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
1988 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
1989 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
1991 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
1992 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
1993 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
1994 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
1996 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
1997 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
1998 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
1999 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2001 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2002 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2003 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2004 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2006 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2007 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2008 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2009 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2011 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2012 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2013 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2014 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2016 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2017 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2018 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2019 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2021 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2022 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2023 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2024 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2026 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2027 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2028 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2029 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2031 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2032 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2033 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2034 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2036 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2037 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2038 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2039 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2041 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2043 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2045 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2047 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2049 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2050 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2051 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2052 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2054 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2055 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2056 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2057 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2059 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2060 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2061 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2062 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2064 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2066 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2068 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2070 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2071 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2072 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2073 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2075 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2076 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2077 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2078 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2080 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2081 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2082 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2083 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2085 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2087 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2088 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2089 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2090 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2092 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2093 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2094 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2095 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2097 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2099 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2100 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2101 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2102 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2104 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2105 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2106 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2107 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2109 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2110 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2111 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2112 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2114 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2115 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2116 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2117 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2119 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2120 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2121 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2122 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2124 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2125 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2126 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2127 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2129 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2130 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2131 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2132 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2134 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2135 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2136 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2137 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2139 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2140 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2141 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2143 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2144 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2145 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2147 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2149 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2150 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2151 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2152 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2154 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2155 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2156 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2157 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2159 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2160 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2161 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2163 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2164 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2165 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2167 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2168 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2169 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2171 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2172 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2173 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2175 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2176 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2177 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2179 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2180 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2181 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2183 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2184 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2186 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2187 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2189 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2190 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2192 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2193 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2195 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2196 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2198 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2199 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2201 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2202 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2204 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2205 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2207 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2208 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2210 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2211 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2213 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2214 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2216 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2217 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2219 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2220 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2222 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2223 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2225 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2226 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2228 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2229 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2231 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2232 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2234 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2235 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2237 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2238 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2240 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2241 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2243 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2244 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2246 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2247 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2249 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2250 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2251 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2253 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2254 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2256 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2257 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2259 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2260 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2262 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2263 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2265 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2266 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2268 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2269 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2271 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2272 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2274 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2275 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2277 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2278 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2280 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2281 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2283 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2284 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2286 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2287 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2289 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2290 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2292 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2293 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2295 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2296 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2298 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2299 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2301 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2302 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2304 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2305 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2307 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2308 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2310 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2311 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2313 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2314 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2316 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2317 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2319 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2320 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2322 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2323 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2325 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2326 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2328 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2329 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2331 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2332 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2334 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2335 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2337 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2338 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2340 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2341 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2342 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2344 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2345 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2346 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2348 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2349 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2350 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2352 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2353 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2354 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2356 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2357 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2358 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2359 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2361 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2362 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2363 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2364 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2366 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2367 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2368 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2369 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2371 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2372 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2373 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2374 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2376 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2377 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2378 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2380 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2381 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2382 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2383 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2385 def LD_B: LD_B_ENC, LD_B_DESC;
2386 def LD_H: LD_H_ENC, LD_H_DESC;
2387 def LD_W: LD_W_ENC, LD_W_DESC;
2388 def LD_D: LD_D_ENC, LD_D_DESC;
2390 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2391 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2392 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2393 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2395 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2396 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2397 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2398 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2400 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2401 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2403 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2404 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2406 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2407 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2408 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2409 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2411 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2412 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2413 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2414 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2416 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2417 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2418 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2419 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2421 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2422 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2423 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2424 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2426 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2427 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2428 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2429 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2431 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2432 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2433 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2434 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2436 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2437 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2438 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2439 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2441 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2442 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2443 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2444 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2446 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2447 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2448 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2449 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2451 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2452 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2453 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2454 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2456 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2457 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2458 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2459 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2461 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2462 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2463 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2464 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2466 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2467 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2468 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2469 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2471 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2473 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2474 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2476 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2477 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2479 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2480 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2481 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2482 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2484 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2485 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2487 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2488 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2490 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2491 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2492 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2493 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2495 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2496 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2497 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2498 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2500 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2501 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2502 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2503 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2505 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2506 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2507 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2508 MSA128B:$ws, MSA128B:$wt)>;
2509 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2510 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2511 MSA128B:$ws, MSA128B:$wt)>;
2512 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2513 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2514 MSA128B:$ws, MSA128B:$wt)>;
2516 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2518 def OR_V : OR_V_ENC, OR_V_DESC;
2519 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2520 PseudoInstExpansion<(OR_V MSA128B:$wd,
2521 MSA128B:$ws, MSA128B:$wt)>;
2522 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2523 PseudoInstExpansion<(OR_V MSA128B:$wd,
2524 MSA128B:$ws, MSA128B:$wt)>;
2525 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2526 PseudoInstExpansion<(OR_V MSA128B:$wd,
2527 MSA128B:$ws, MSA128B:$wt)>;
2529 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2531 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2532 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2533 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2534 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2536 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2537 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2538 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2539 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2541 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2542 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2543 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2544 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2546 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2547 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2548 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2549 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2551 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2552 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2553 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2554 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2556 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2557 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2558 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2560 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2561 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2562 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2563 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2565 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2566 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2567 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2568 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2570 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2571 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2572 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2573 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2575 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2576 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2577 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2578 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2580 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2581 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2582 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2583 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2585 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2586 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2587 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2588 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2590 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2591 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2592 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2593 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2595 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2596 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2597 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2598 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2600 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2601 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2602 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2603 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2605 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2606 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2607 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2608 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2610 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2611 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2612 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2613 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2615 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2616 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2617 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2618 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2620 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2621 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2622 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2623 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2625 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2626 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2627 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2628 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2630 def ST_B: ST_B_ENC, ST_B_DESC;
2631 def ST_H: ST_H_ENC, ST_H_DESC;
2632 def ST_W: ST_W_ENC, ST_W_DESC;
2633 def ST_D: ST_D_ENC, ST_D_DESC;
2635 def STX_B: STX_B_ENC, STX_B_DESC;
2636 def STX_H: STX_H_ENC, STX_H_DESC;
2637 def STX_W: STX_W_ENC, STX_W_DESC;
2638 def STX_D: STX_D_ENC, STX_D_DESC;
2640 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2641 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2642 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2643 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2645 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2646 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2647 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2648 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2650 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2651 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2652 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2653 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2655 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2656 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2657 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2658 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2660 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2661 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2662 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2663 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2665 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2666 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2667 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2668 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2670 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2671 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2672 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2673 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2675 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2676 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
2677 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2678 MSA128B:$ws, MSA128B:$wt)>;
2679 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
2680 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2681 MSA128B:$ws, MSA128B:$wt)>;
2682 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
2683 PseudoInstExpansion<(XOR_V MSA128B:$wd,
2684 MSA128B:$ws, MSA128B:$wt)>;
2686 def XORI_B : XORI_B_ENC, XORI_B_DESC;
2689 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
2690 Pat<pattern, result>, Requires<pred>;
2692 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
2693 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
2694 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
2695 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
2696 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
2697 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
2698 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
2700 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
2701 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
2702 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
2704 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
2705 (ST_B MSA128B:$ws, addr:$addr)>;
2706 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
2707 (ST_H MSA128H:$ws, addr:$addr)>;
2708 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
2709 (ST_W MSA128W:$ws, addr:$addr)>;
2710 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
2711 (ST_D MSA128D:$ws, addr:$addr)>;
2712 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
2713 (ST_H MSA128H:$ws, addr:$addr)>;
2714 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
2715 (ST_W MSA128W:$ws, addr:$addr)>;
2716 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
2717 (ST_D MSA128D:$ws, addr:$addr)>;
2719 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
2720 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
2721 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
2722 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
2723 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
2724 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
2726 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
2727 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
2728 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2729 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
2731 // These are endian-independant because the element size doesnt change
2732 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
2733 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
2734 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
2735 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
2736 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
2737 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
2739 // Little endian bitcasts are always no-ops
2740 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
2741 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
2742 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
2743 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
2744 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
2745 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
2747 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
2748 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
2749 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
2750 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
2751 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
2753 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
2754 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
2755 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
2756 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
2757 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
2759 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
2760 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
2761 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
2762 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
2763 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
2765 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
2766 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
2767 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
2768 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
2769 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
2771 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
2772 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
2773 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
2774 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
2775 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
2777 // Big endian bitcasts expand to shuffle instructions.
2778 // This is because bitcast is defined to be a store/load sequence and the
2779 // vector store/load instructions are mixed-endian with respect to the vector
2780 // as a whole (little endian with respect to element order, but big endian
2783 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
2784 RegisterClass DstRC, MSAInst Insn,
2785 RegisterClass ViaRC> :
2786 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2787 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
2791 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
2792 RegisterClass DstRC, MSAInst Insn,
2793 RegisterClass ViaRC> :
2794 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2795 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
2799 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
2800 RegisterClass DstRC> :
2801 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2803 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
2804 RegisterClass DstRC> :
2805 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2807 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
2808 RegisterClass DstRC> :
2809 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2813 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
2818 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
2819 RegisterClass DstRC> :
2820 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2822 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
2823 RegisterClass DstRC> :
2824 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2826 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
2827 RegisterClass DstRC> :
2828 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
2830 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
2831 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
2832 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
2833 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
2834 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
2835 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
2837 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
2838 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
2839 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
2840 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
2841 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
2843 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
2844 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
2845 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
2846 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
2847 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
2849 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
2850 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
2851 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
2852 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
2853 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
2855 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
2856 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
2857 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
2858 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
2859 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
2861 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
2862 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
2863 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
2864 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
2865 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
2867 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
2868 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
2869 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
2870 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
2871 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
2873 // Pseudos used to implement BNZ.df, and BZ.df
2875 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
2877 InstrItinClass itin = NoItinerary> :
2878 MipsPseudo<(outs GPR32:$dst),
2880 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
2881 bit usesCustomInserter = 1;
2884 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
2885 MSA128B, NoItinerary>;
2886 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
2887 MSA128H, NoItinerary>;
2888 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
2889 MSA128W, NoItinerary>;
2890 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
2891 MSA128D, NoItinerary>;
2892 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
2893 MSA128B, NoItinerary>;
2895 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
2896 MSA128B, NoItinerary>;
2897 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
2898 MSA128H, NoItinerary>;
2899 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
2900 MSA128W, NoItinerary>;
2901 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
2902 MSA128D, NoItinerary>;
2903 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
2904 MSA128B, NoItinerary>;