1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm2 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm3 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm4 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def uimm8 : Operand<i32> {
77 let PrintMethod = "printUnsignedImm";
80 def simm5 : Operand<i32>;
82 def simm10 : Operand<i32>;
84 def vsplat_uimm1 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm8";
88 def vsplat_uimm2 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm8";
92 def vsplat_uimm3 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm4 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_uimm5 : Operand<vAny> {
101 let PrintMethod = "printUnsignedImm";
104 def vsplat_uimm6 : Operand<vAny> {
105 let PrintMethod = "printUnsignedImm";
108 def vsplat_uimm8 : Operand<vAny> {
109 let PrintMethod = "printUnsignedImm";
112 def vsplat_simm5 : Operand<vAny>;
114 def vsplat_simm10 : Operand<vAny>;
116 def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>;
119 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
120 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
121 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
122 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
123 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
124 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
126 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
127 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
128 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
129 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
130 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
131 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
133 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
135 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
137 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
140 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
141 PatFrag<(ops node:$lhs, node:$rhs),
142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
144 // ISD::SETFALSE cannot occur
145 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
146 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
147 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
148 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
149 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
150 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
151 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
152 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
153 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
154 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
155 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
156 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
157 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
158 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
159 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
160 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
161 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
162 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
163 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
164 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
165 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
166 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
167 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
168 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
169 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
170 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
171 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
172 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
173 // ISD::SETTRUE cannot occur
174 // ISD::SETFALSE2 cannot occur
175 // ISD::SETTRUE2 cannot occur
177 class vsetcc_type<ValueType ResTy, CondCode CC> :
178 PatFrag<(ops node:$lhs, node:$rhs),
179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
181 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
182 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
183 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
184 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
185 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
186 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
187 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
188 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
189 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
190 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
191 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
192 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
193 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
194 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
195 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
196 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
197 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
198 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
199 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
200 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
202 def vsplati8 : PatFrag<(ops node:$e0),
203 (v16i8 (build_vector node:$e0, node:$e0,
210 node:$e0, node:$e0))>;
211 def vsplati16 : PatFrag<(ops node:$e0),
212 (v8i16 (build_vector node:$e0, node:$e0,
215 node:$e0, node:$e0))>;
216 def vsplati32 : PatFrag<(ops node:$e0),
217 (v4i32 (build_vector node:$e0, node:$e0,
218 node:$e0, node:$e0))>;
219 def vsplati64 : PatFrag<(ops node:$e0),
220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
221 def vsplatf32 : PatFrag<(ops node:$e0),
222 (v4f32 (build_vector node:$e0, node:$e0,
223 node:$e0, node:$e0))>;
224 def vsplatf64 : PatFrag<(ops node:$e0),
225 (v2f64 (build_vector node:$e0, node:$e0))>;
227 def vsplati8_elt : PatFrag<(ops node:$v, node:$i),
228 (MipsVSHF (vsplati8 node:$i), node:$v, node:$v)>;
229 def vsplati16_elt : PatFrag<(ops node:$v, node:$i),
230 (MipsVSHF (vsplati16 node:$i), node:$v, node:$v)>;
231 def vsplati32_elt : PatFrag<(ops node:$v, node:$i),
232 (MipsVSHF (vsplati32 node:$i), node:$v, node:$v)>;
233 def vsplati64_elt : PatFrag<(ops node:$v, node:$i),
234 (MipsVSHF (vsplati64 node:$i), node:$v, node:$v)>;
236 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
237 SDNodeXForm xform = NOOP_SDNodeXForm>
238 : PatLeaf<frag, pred, xform> {
239 Operand OpClass = opclass;
242 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
243 list<SDNode> roots = [],
244 list<SDNodeProperty> props = []> :
245 ComplexPattern<ty, numops, fn, roots, props> {
246 Operand OpClass = opclass;
249 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
251 [build_vector, bitconvert]>;
253 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
255 [build_vector, bitconvert]>;
257 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
259 [build_vector, bitconvert]>;
261 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
263 [build_vector, bitconvert]>;
265 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
267 [build_vector, bitconvert]>;
269 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
271 [build_vector, bitconvert]>;
273 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
275 [build_vector, bitconvert]>;
277 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
279 [build_vector, bitconvert]>;
281 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
283 [build_vector, bitconvert]>;
285 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
287 [build_vector, bitconvert]>;
289 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
291 [build_vector, bitconvert]>;
293 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
295 [build_vector, bitconvert]>;
297 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
299 [build_vector, bitconvert]>;
301 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
303 [build_vector, bitconvert]>;
305 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
307 [build_vector, bitconvert]>;
309 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
311 [build_vector, bitconvert]>;
313 // Any build_vector that is a constant splat with a value that is an exact
315 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
316 [build_vector, bitconvert]>;
318 def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt),
319 (fsub node:$wd, (fmul node:$ws, node:$wt))>;
321 def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
322 (add node:$wd, (mul node:$ws, node:$wt))>;
324 def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt),
325 (sub node:$wd, (mul node:$ws, node:$wt))>;
327 def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt),
328 (fmul node:$ws, (fexp2 node:$wt))>;
331 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
332 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
334 // Instruction encoding.
335 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
336 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
337 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
338 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
340 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
341 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
342 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
343 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
345 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
346 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
347 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
348 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
350 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
351 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
352 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
353 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
355 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
356 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
357 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
358 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
360 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
361 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
362 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
363 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
365 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
367 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
369 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
370 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
371 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
372 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
374 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
375 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
376 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
377 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
379 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
380 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
381 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
382 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
384 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
385 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
386 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
387 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
389 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
390 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
391 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
392 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
394 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
395 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
396 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
397 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
399 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
400 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
401 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
402 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
404 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
405 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
406 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
407 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
409 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
410 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
411 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
412 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
414 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
415 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
416 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
417 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
419 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
420 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
421 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
422 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
424 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
425 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
426 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
427 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
429 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
431 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
433 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
435 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
437 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
438 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
439 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
440 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
442 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
443 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
444 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
445 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
447 class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>;
448 class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>;
449 class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>;
450 class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>;
452 class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01000>;
454 class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>;
456 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
458 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
459 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
460 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
461 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
463 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
464 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
465 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
466 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
468 class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>;
469 class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>;
470 class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>;
471 class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>;
473 class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>;
475 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
476 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
477 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
478 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
480 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
481 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
482 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
483 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
485 class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>;
487 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
488 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
489 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
490 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
492 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
493 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
494 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
495 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
497 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
498 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
499 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
500 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
502 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
503 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
504 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
505 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
507 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
508 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
509 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
510 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
512 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
513 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
514 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
515 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
517 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
518 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
519 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
520 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
522 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
523 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
524 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
525 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
527 class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
528 class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
529 class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
531 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
532 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
533 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
535 class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>;
537 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
538 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
539 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
540 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
542 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
543 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
544 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
545 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
547 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
548 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
549 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
551 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
552 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
553 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
555 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
556 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
557 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
559 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
560 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
561 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
563 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
564 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
565 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
567 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
568 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
569 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
571 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
572 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
574 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
575 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
577 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
578 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
580 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
581 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
583 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
584 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
586 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
587 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
589 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
590 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
592 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
593 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
595 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
596 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
598 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
599 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
601 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
602 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
604 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
605 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
607 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
608 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
610 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
611 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
613 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
614 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
616 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
617 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
619 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
620 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
622 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
623 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
625 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
626 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
628 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
629 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
631 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
632 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
634 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
635 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
637 class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>;
638 class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>;
639 class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>;
641 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
642 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
644 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
645 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
647 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
648 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
650 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
651 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
653 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
654 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
656 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
657 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
659 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
660 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
662 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
663 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
665 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
666 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
668 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
669 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
671 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
672 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
674 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
675 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
677 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
678 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
680 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
681 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
683 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
684 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
686 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
687 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
689 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
690 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
692 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
693 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
695 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
696 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
698 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
699 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
701 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
702 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
704 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
705 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
707 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
708 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
710 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
711 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
713 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
714 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
716 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
717 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
719 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
720 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
722 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
723 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
725 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
726 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
728 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
729 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
730 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
732 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
733 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
734 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
736 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
737 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
738 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
740 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
741 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
742 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
744 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
745 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
746 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
747 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
749 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
750 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
751 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
752 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
754 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
755 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
756 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
757 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
759 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
760 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
761 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
762 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
764 class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>;
765 class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>;
766 class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>;
768 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
769 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
770 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
771 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
773 class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>;
774 class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>;
775 class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>;
776 class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>;
778 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
779 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
780 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
781 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
783 class LSA_ENC : SPECIAL_LSA_FMT<0b000101>;
785 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
786 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
788 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
789 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
791 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
792 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
793 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
794 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
796 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
797 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
798 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
799 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
801 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
802 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
803 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
804 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
806 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
807 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
808 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
809 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
811 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
812 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
813 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
814 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
816 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
817 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
818 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
819 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
821 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
822 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
823 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
824 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
826 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
827 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
828 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
829 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
831 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
832 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
833 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
834 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
836 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
837 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
838 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
839 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
841 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
842 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
843 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
844 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
846 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
847 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
848 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
849 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
851 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
852 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
853 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
854 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
856 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
858 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
859 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
861 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
862 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
864 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
865 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
866 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
867 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
869 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
870 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
872 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
873 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
875 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
876 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
877 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
878 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
880 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
881 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
882 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
883 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
885 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
886 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
887 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
888 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
890 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
892 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
894 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
896 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
898 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
899 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
900 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
901 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
903 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
904 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
905 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
906 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
908 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
909 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
910 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
911 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
913 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
914 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
915 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
916 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
918 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
919 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
920 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
921 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
923 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
924 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
925 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
927 class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>;
928 class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>;
929 class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>;
930 class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>;
932 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
933 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
934 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
935 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
937 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
938 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
939 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
940 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
942 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
943 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
944 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
945 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
947 class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>;
948 class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>;
949 class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>;
950 class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>;
952 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
953 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
954 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
955 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
957 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
958 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
959 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
960 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
962 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
963 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
964 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
965 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
967 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
968 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
969 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
970 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
972 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
973 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
974 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
975 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
977 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
978 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
979 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
980 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
982 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
983 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
984 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
985 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
987 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
988 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
989 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
990 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
992 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
993 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
994 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
995 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
997 class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>;
998 class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>;
999 class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>;
1000 class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>;
1002 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
1003 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
1004 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
1005 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
1007 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
1008 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
1009 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
1010 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
1012 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
1013 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
1014 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
1015 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
1017 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
1018 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
1019 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
1020 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
1022 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
1023 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1024 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1025 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1027 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1028 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1029 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1030 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1032 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1033 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1034 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1035 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1037 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1039 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1041 // Instruction desc.
1042 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1044 InstrItinClass itin = NoItinerary> {
1045 dag OutOperandList = (outs ROWD:$wd);
1046 dag InOperandList = (ins ROWS:$ws, uimm3:$m);
1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))];
1049 InstrItinClass Itinerary = itin;
1052 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1054 InstrItinClass itin = NoItinerary> {
1055 dag OutOperandList = (outs ROWD:$wd);
1056 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1059 InstrItinClass Itinerary = itin;
1062 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1063 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1064 InstrItinClass itin = NoItinerary> {
1065 dag OutOperandList = (outs ROWD:$wd);
1066 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1067 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1068 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1069 InstrItinClass Itinerary = itin;
1072 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1073 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1074 InstrItinClass itin = NoItinerary> {
1075 dag OutOperandList = (outs ROWD:$wd);
1076 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1077 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1078 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1079 InstrItinClass Itinerary = itin;
1082 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1083 SplatComplexPattern SplatImm,
1084 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1085 InstrItinClass itin = NoItinerary> {
1086 dag OutOperandList = (outs ROWD:$wd);
1087 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m);
1088 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1089 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))];
1090 InstrItinClass Itinerary = itin;
1093 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1094 ValueType VecTy, RegisterOperand ROD,
1095 RegisterOperand ROWS,
1096 InstrItinClass itin = NoItinerary> {
1097 dag OutOperandList = (outs ROD:$rd);
1098 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1099 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1100 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
1101 InstrItinClass Itinerary = itin;
1104 class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1105 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1106 InstrItinClass itin = NoItinerary> {
1107 dag OutOperandList = (outs ROWD:$wd);
1108 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1109 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1110 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))];
1111 InstrItinClass Itinerary = itin;
1114 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1115 RegisterClass RCD, RegisterClass RCWS> :
1116 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1117 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1118 bit usesCustomInserter = 1;
1121 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1122 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1123 RegisterOperand ROWS = ROWD,
1124 InstrItinClass itin = NoItinerary> {
1125 dag OutOperandList = (outs ROWD:$wd);
1126 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm);
1127 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1128 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))];
1129 InstrItinClass Itinerary = itin;
1132 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1133 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1134 RegisterOperand ROWS = ROWD,
1135 InstrItinClass itin = NoItinerary> {
1136 dag OutOperandList = (outs ROWD:$wd);
1137 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8);
1138 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1139 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))];
1140 InstrItinClass Itinerary = itin;
1143 // This class is deprecated and will be removed in the next few patches
1144 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1145 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1146 InstrItinClass itin = NoItinerary> {
1147 dag OutOperandList = (outs ROWD:$wd);
1148 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1149 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1150 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))];
1151 InstrItinClass Itinerary = itin;
1154 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1155 RegisterOperand ROWS = ROWD,
1156 InstrItinClass itin = NoItinerary> {
1157 dag OutOperandList = (outs ROWD:$wd);
1158 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1159 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1160 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))];
1161 InstrItinClass Itinerary = itin;
1164 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1165 InstrItinClass itin = NoItinerary> {
1166 dag OutOperandList = (outs ROWD:$wd);
1167 dag InOperandList = (ins vsplat_simm10:$s10);
1168 string AsmString = !strconcat(instr_asm, "\t$wd, $s10");
1169 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1170 list<dag> Pattern = [];
1171 bit hasSideEffects = 0;
1172 InstrItinClass Itinerary = itin;
1175 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1176 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1177 InstrItinClass itin = NoItinerary> {
1178 dag OutOperandList = (outs ROWD:$wd);
1179 dag InOperandList = (ins ROWS:$ws);
1180 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1181 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1182 InstrItinClass Itinerary = itin;
1185 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1186 SDPatternOperator OpNode, RegisterOperand ROWD,
1187 RegisterOperand ROS = ROWD,
1188 InstrItinClass itin = NoItinerary> {
1189 dag OutOperandList = (outs ROWD:$wd);
1190 dag InOperandList = (ins ROS:$rs);
1191 string AsmString = !strconcat(instr_asm, "\t$wd, $rs");
1192 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))];
1193 InstrItinClass Itinerary = itin;
1196 class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode,
1197 RegisterClass RCWD, RegisterClass RCWS = RCWD> :
1198 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs),
1199 [(set RCWD:$wd, (OpNode RCWS:$fs))]> {
1200 let usesCustomInserter = 1;
1203 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1204 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1205 InstrItinClass itin = NoItinerary> {
1206 dag OutOperandList = (outs ROWD:$wd);
1207 dag InOperandList = (ins ROWS:$ws);
1208 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1209 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1210 InstrItinClass Itinerary = itin;
1213 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1214 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1215 RegisterOperand ROWT = ROWD,
1216 InstrItinClass itin = NoItinerary> {
1217 dag OutOperandList = (outs ROWD:$wd);
1218 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1219 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1220 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1221 InstrItinClass Itinerary = itin;
1224 class MSA_3R_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1225 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1226 InstrItinClass itin = NoItinerary> {
1227 dag OutOperandList = (outs ROWD:$wd);
1228 dag InOperandList = (ins ROWS:$ws, GPR32:$rt);
1229 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]");
1230 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))];
1231 InstrItinClass Itinerary = itin;
1234 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1235 RegisterOperand ROWS = ROWD,
1236 RegisterOperand ROWT = ROWD,
1237 InstrItinClass itin = NoItinerary> {
1238 dag OutOperandList = (outs ROWD:$wd);
1239 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1240 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1241 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1243 string Constraints = "$wd = $wd_in";
1244 InstrItinClass Itinerary = itin;
1247 class MSA_3R_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1248 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1249 InstrItinClass itin = NoItinerary> {
1250 dag OutOperandList = (outs ROWD:$wd);
1251 dag InOperandList = (ins ROWS:$ws, GPR32:$rt);
1252 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]");
1253 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))];
1254 InstrItinClass Itinerary = itin;
1257 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1258 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1259 RegisterOperand ROWT = ROWD,
1260 InstrItinClass itin = NoItinerary> {
1261 dag OutOperandList = (outs ROWD:$wd);
1262 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1263 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1264 list<dag> Pattern = [(set ROWD:$wd,
1265 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))];
1266 InstrItinClass Itinerary = itin;
1267 string Constraints = "$wd = $wd_in";
1270 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1271 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1272 RegisterOperand ROWT = ROWD,
1273 InstrItinClass itin = NoItinerary> :
1274 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1276 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1277 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1278 RegisterOperand ROWT = ROWD,
1279 InstrItinClass itin = NoItinerary> :
1280 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1282 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> {
1283 dag OutOperandList = (outs);
1284 dag InOperandList = (ins ROWD:$wt, brtarget:$offset);
1285 string AsmString = !strconcat(instr_asm, "\t$wt, $offset");
1286 list<dag> Pattern = [];
1287 InstrItinClass Itinerary = IIBranch;
1289 bit isTerminator = 1;
1290 bit hasDelaySlot = 1;
1291 list<Register> Defs = [AT];
1294 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1295 RegisterOperand ROWD, RegisterOperand ROS,
1296 InstrItinClass itin = NoItinerary> {
1297 dag OutOperandList = (outs ROWD:$wd);
1298 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n);
1299 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1300 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1303 InstrItinClass Itinerary = itin;
1304 string Constraints = "$wd = $wd_in";
1307 class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
1308 RegisterOperand ROWD, RegisterOperand ROFS> :
1309 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
1310 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
1312 bit usesCustomInserter = 1;
1313 string Constraints = "$wd = $wd_in";
1316 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1317 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1318 InstrItinClass itin = NoItinerary> {
1319 dag OutOperandList = (outs ROWD:$wd);
1320 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
1321 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1322 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1325 InstrItinClass Itinerary = itin;
1326 string Constraints = "$wd = $wd_in";
1329 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1330 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1331 RegisterOperand ROWT = ROWD,
1332 InstrItinClass itin = NoItinerary> {
1333 dag OutOperandList = (outs ROWD:$wd);
1334 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1335 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1336 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1337 InstrItinClass Itinerary = itin;
1340 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1341 RegisterOperand ROWD,
1342 RegisterOperand ROWS = ROWD,
1343 InstrItinClass itin = NoItinerary> {
1344 dag OutOperandList = (outs ROWD:$wd);
1345 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
1346 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1347 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
1349 InstrItinClass Itinerary = itin;
1352 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD,
1353 RegisterOperand ROWS = ROWD,
1354 RegisterOperand ROWT = ROWD> :
1355 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt),
1356 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>;
1358 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1360 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1362 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1364 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1367 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1368 MSA128BOpnd>, IsCommutable;
1369 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1370 MSA128HOpnd>, IsCommutable;
1371 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1372 MSA128WOpnd>, IsCommutable;
1373 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1374 MSA128DOpnd>, IsCommutable;
1376 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1377 MSA128BOpnd>, IsCommutable;
1378 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1379 MSA128HOpnd>, IsCommutable;
1380 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1381 MSA128WOpnd>, IsCommutable;
1382 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1383 MSA128DOpnd>, IsCommutable;
1385 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1386 MSA128BOpnd>, IsCommutable;
1387 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1388 MSA128HOpnd>, IsCommutable;
1389 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1390 MSA128WOpnd>, IsCommutable;
1391 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1392 MSA128DOpnd>, IsCommutable;
1394 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1395 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1396 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1397 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1399 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5,
1401 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5,
1403 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5,
1405 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5,
1408 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>;
1409 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>;
1410 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>;
1411 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>;
1413 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8,
1416 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1418 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1420 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1422 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1425 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1427 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1429 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1431 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1434 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1436 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1438 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1440 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1443 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1445 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1447 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1449 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1452 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1453 MSA128BOpnd>, IsCommutable;
1454 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1455 MSA128HOpnd>, IsCommutable;
1456 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1457 MSA128WOpnd>, IsCommutable;
1458 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1459 MSA128DOpnd>, IsCommutable;
1461 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1462 MSA128BOpnd>, IsCommutable;
1463 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1464 MSA128HOpnd>, IsCommutable;
1465 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1466 MSA128WOpnd>, IsCommutable;
1467 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1468 MSA128DOpnd>, IsCommutable;
1470 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>;
1471 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>;
1472 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>;
1473 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>;
1475 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b,
1477 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h,
1479 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w,
1481 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d,
1484 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>;
1485 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>;
1486 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>;
1487 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>;
1489 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1491 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1493 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1495 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1498 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>;
1499 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>;
1500 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>;
1501 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>;
1503 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1505 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1507 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1509 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1512 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>;
1514 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b,
1517 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>;
1519 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>;
1521 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>;
1522 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>;
1523 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>;
1524 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>;
1526 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b,
1528 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h,
1530 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w,
1532 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d,
1535 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>;
1536 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>;
1537 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>;
1538 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>;
1540 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>;
1543 dag OutOperandList = (outs MSA128BOpnd:$wd);
1544 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1546 string AsmString = "bsel.v\t$wd, $ws, $wt";
1547 list<dag> Pattern = [(set MSA128BOpnd:$wd,
1548 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1550 InstrItinClass Itinerary = NoItinerary;
1551 string Constraints = "$wd = $wd_in";
1554 class BSELI_B_DESC {
1555 dag OutOperandList = (outs MSA128BOpnd:$wd);
1556 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1558 string AsmString = "bseli.b\t$wd, $ws, $u8";
1559 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in,
1561 vsplati8_uimm8:$u8))];
1562 InstrItinClass Itinerary = NoItinerary;
1563 string Constraints = "$wd = $wd_in";
1566 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>;
1567 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>;
1568 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>;
1569 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>;
1571 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b,
1573 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h,
1575 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w,
1577 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d,
1580 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>;
1581 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>;
1582 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>;
1583 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>;
1585 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>;
1587 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1589 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1591 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1593 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1596 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1598 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1600 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1602 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1606 dag OutOperandList = (outs GPR32Opnd:$rd);
1607 dag InOperandList = (ins MSA128CROpnd:$cs);
1608 string AsmString = "cfcmsa\t$rd, $cs";
1609 InstrItinClass Itinerary = NoItinerary;
1610 bit hasSideEffects = 1;
1613 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1614 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1615 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1616 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1618 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1619 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1620 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1621 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1623 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1624 vsplati8_simm5, MSA128BOpnd>;
1625 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1626 vsplati16_simm5, MSA128HOpnd>;
1627 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1628 vsplati32_simm5, MSA128WOpnd>;
1629 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1630 vsplati64_simm5, MSA128DOpnd>;
1632 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1633 vsplati8_uimm5, MSA128BOpnd>;
1634 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1635 vsplati16_uimm5, MSA128HOpnd>;
1636 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1637 vsplati32_uimm5, MSA128WOpnd>;
1638 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1639 vsplati64_uimm5, MSA128DOpnd>;
1641 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1642 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1643 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1644 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1646 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1647 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1648 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1649 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1651 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1652 vsplati8_simm5, MSA128BOpnd>;
1653 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1654 vsplati16_simm5, MSA128HOpnd>;
1655 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1656 vsplati32_simm5, MSA128WOpnd>;
1657 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1658 vsplati64_simm5, MSA128DOpnd>;
1660 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1661 vsplati8_uimm5, MSA128BOpnd>;
1662 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1663 vsplati16_uimm5, MSA128HOpnd>;
1664 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1665 vsplati32_uimm5, MSA128WOpnd>;
1666 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1667 vsplati64_uimm5, MSA128DOpnd>;
1669 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1670 GPR32Opnd, MSA128BOpnd>;
1671 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1672 GPR32Opnd, MSA128HOpnd>;
1673 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1674 GPR32Opnd, MSA128WOpnd>;
1676 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1677 GPR32Opnd, MSA128BOpnd>;
1678 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1679 GPR32Opnd, MSA128HOpnd>;
1680 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1681 GPR32Opnd, MSA128WOpnd>;
1683 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1685 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1689 dag OutOperandList = (outs);
1690 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs);
1691 string AsmString = "ctcmsa\t$cd, $rs";
1692 InstrItinClass Itinerary = NoItinerary;
1693 bit hasSideEffects = 1;
1696 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1697 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1698 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1699 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1701 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1702 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1703 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1704 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1706 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1707 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1709 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1710 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1712 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1713 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1716 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1717 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1719 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1720 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1722 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1723 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1726 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1727 MSA128HOpnd, MSA128BOpnd,
1728 MSA128BOpnd>, IsCommutable;
1729 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1730 MSA128WOpnd, MSA128HOpnd,
1731 MSA128HOpnd>, IsCommutable;
1732 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1733 MSA128DOpnd, MSA128WOpnd,
1734 MSA128WOpnd>, IsCommutable;
1736 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1737 MSA128HOpnd, MSA128BOpnd,
1738 MSA128BOpnd>, IsCommutable;
1739 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1740 MSA128WOpnd, MSA128HOpnd,
1741 MSA128HOpnd>, IsCommutable;
1742 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1743 MSA128DOpnd, MSA128WOpnd,
1744 MSA128WOpnd>, IsCommutable;
1746 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1747 MSA128HOpnd, MSA128BOpnd,
1749 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1750 MSA128WOpnd, MSA128HOpnd,
1752 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1753 MSA128DOpnd, MSA128WOpnd,
1756 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1757 MSA128HOpnd, MSA128BOpnd,
1759 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1760 MSA128WOpnd, MSA128HOpnd,
1762 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1763 MSA128DOpnd, MSA128WOpnd,
1766 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1768 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1771 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1773 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1776 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1778 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
1781 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1783 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1786 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
1787 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
1789 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
1790 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
1792 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
1794 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
1797 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
1799 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
1802 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
1804 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
1807 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
1809 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
1812 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
1814 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
1817 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
1819 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
1822 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
1824 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
1827 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
1828 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
1830 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1831 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1832 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1833 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1835 // The fexp2.df instruction multiplies the first operand by 2 to the power of
1836 // the second operand. We therefore need a pseudo-insn in order to invent the
1837 // 1.0 when we only need to match ISD::FEXP2.
1838 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>;
1839 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>;
1840 let usesCustomInserter = 1 in {
1841 class FEXP2_W_1_PSEUDO_DESC :
1842 MipsPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws),
1843 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>;
1844 class FEXP2_D_1_PSEUDO_DESC :
1845 MipsPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws),
1846 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>;
1849 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1850 MSA128WOpnd, MSA128HOpnd>;
1851 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1852 MSA128DOpnd, MSA128WOpnd>;
1854 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1855 MSA128WOpnd, MSA128HOpnd>;
1856 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1857 MSA128DOpnd, MSA128WOpnd>;
1859 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>;
1860 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>;
1862 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>;
1863 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>;
1865 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1866 MSA128WOpnd, MSA128HOpnd>;
1867 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1868 MSA128DOpnd, MSA128WOpnd>;
1870 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1871 MSA128WOpnd, MSA128HOpnd>;
1872 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1873 MSA128DOpnd, MSA128WOpnd>;
1875 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8,
1876 MSA128BOpnd, GPR32Opnd>;
1877 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16,
1878 MSA128HOpnd, GPR32Opnd>;
1879 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32,
1880 MSA128WOpnd, GPR32Opnd>;
1882 class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W,
1884 class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D,
1887 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
1888 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
1890 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>;
1891 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>;
1893 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
1894 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
1896 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1898 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1901 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
1902 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
1904 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1906 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1909 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>;
1910 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>;
1912 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
1913 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
1915 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
1916 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
1918 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
1919 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
1921 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1923 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1926 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
1927 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
1929 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
1930 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
1932 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
1933 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
1935 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
1936 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
1938 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
1939 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
1941 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
1942 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
1944 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
1945 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
1947 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
1948 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
1950 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
1952 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
1955 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
1957 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
1960 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
1962 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
1965 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
1967 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
1970 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
1972 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
1975 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1977 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1980 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1982 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1985 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1986 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1987 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1988 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1990 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint,
1992 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint,
1995 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint,
1997 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint,
2000 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
2001 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2002 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
2003 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2004 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
2005 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2007 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
2008 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2009 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
2010 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2011 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
2012 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2014 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
2015 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2016 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
2017 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2018 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
2019 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2021 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
2022 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2023 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
2024 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2025 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
2026 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2028 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
2029 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
2030 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
2031 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
2033 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
2034 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
2035 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
2036 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
2038 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
2039 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
2040 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
2041 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
2043 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
2044 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
2045 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
2046 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
2048 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8,
2049 MSA128BOpnd, GPR32Opnd>;
2050 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16,
2051 MSA128HOpnd, GPR32Opnd>;
2052 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
2053 MSA128WOpnd, GPR32Opnd>;
2055 class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
2056 MSA128WOpnd, FGR32Opnd>;
2057 class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
2058 MSA128DOpnd, FGR64Opnd>;
2060 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
2062 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
2064 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
2066 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
2069 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2070 ValueType TyNode, RegisterOperand ROWD,
2071 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
2072 InstrItinClass itin = NoItinerary> {
2073 dag OutOperandList = (outs ROWD:$wd);
2074 dag InOperandList = (ins MemOpnd:$addr);
2075 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2076 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))];
2077 InstrItinClass Itinerary = itin;
2078 string DecoderMethod = "DecodeMSA128Mem";
2081 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>;
2082 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>;
2083 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>;
2084 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>;
2086 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>;
2087 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>;
2088 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>;
2089 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>;
2092 dag OutOperandList = (outs GPR32Opnd:$rd);
2093 dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa);
2094 string AsmString = "lsa\t$rd, $rs, $rt, $sa";
2095 list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs,
2097 immZExt2Lsa:$sa)))];
2098 InstrItinClass Itinerary = NoItinerary;
2101 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2103 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2106 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2108 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2111 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>;
2112 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>;
2113 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>;
2114 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>;
2116 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2117 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2118 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2119 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2121 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2122 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2123 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2124 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2126 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2127 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2128 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2129 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2131 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2133 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2135 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2137 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2140 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2142 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2144 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2146 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2149 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2150 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2151 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2152 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2154 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2155 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2156 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2157 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2159 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2160 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2161 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2162 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2164 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2166 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2168 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2170 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2173 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2175 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2177 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2179 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2182 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>;
2183 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>;
2184 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>;
2185 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>;
2187 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>;
2188 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>;
2189 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>;
2190 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>;
2193 dag OutOperandList = (outs MSA128BOpnd:$wd);
2194 dag InOperandList = (ins MSA128BOpnd:$ws);
2195 string AsmString = "move.v\t$wd, $ws";
2196 list<dag> Pattern = [];
2197 InstrItinClass Itinerary = NoItinerary;
2200 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2202 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2205 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2207 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2210 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>;
2211 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>;
2212 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>;
2213 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>;
2215 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2217 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2220 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2222 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2225 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2226 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2227 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2228 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2230 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>;
2231 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>;
2232 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>;
2233 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>;
2235 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>;
2236 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>;
2237 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>;
2238 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>;
2240 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>;
2241 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>;
2242 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>;
2243 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>;
2245 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2248 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>;
2249 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>;
2250 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>;
2251 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>;
2253 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>;
2255 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2256 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2257 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2258 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2260 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2261 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2262 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2263 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2265 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2266 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2267 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2268 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2270 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
2272 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
2274 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
2276 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
2279 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
2281 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
2283 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
2285 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
2288 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2289 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2290 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2292 class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;
2293 class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2294 class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2295 class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2297 class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>;
2298 class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>;
2299 class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>;
2300 class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>;
2302 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2303 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2304 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2305 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2307 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2309 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2311 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2313 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2316 class SPLAT_B_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.b", vsplati8_elt,
2318 class SPLAT_H_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.h", vsplati16_elt,
2320 class SPLAT_W_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.w", vsplati32_elt,
2322 class SPLAT_D_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.d", vsplati64_elt,
2325 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2327 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2329 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2331 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2334 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2335 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2336 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2337 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2339 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2341 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2343 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2345 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2348 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2349 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2350 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2351 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2353 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b,
2355 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h,
2357 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w,
2359 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d,
2362 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2363 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2364 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2365 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2367 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2369 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2371 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2373 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2376 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2377 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2378 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2379 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2381 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b,
2383 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h,
2385 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w,
2387 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d,
2390 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2391 ValueType TyNode, RegisterOperand ROWD,
2392 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
2393 InstrItinClass itin = NoItinerary> {
2394 dag OutOperandList = (outs);
2395 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr);
2396 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2397 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)];
2398 InstrItinClass Itinerary = itin;
2399 string DecoderMethod = "DecodeMSA128Mem";
2402 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>;
2403 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>;
2404 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>;
2405 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>;
2407 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2409 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2411 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2413 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2416 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2418 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2420 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2422 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2425 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2427 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2429 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2431 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2434 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2436 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2438 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2440 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2443 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2444 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2445 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2446 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2448 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5,
2450 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5,
2452 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5,
2454 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5,
2457 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2458 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2459 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2460 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2462 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>;
2463 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>;
2464 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>;
2465 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>;
2467 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8,
2470 // Instruction defs.
2471 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2472 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2473 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2474 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2476 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2477 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2478 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2479 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2481 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2482 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2483 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2484 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2486 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2487 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2488 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2489 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2491 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2492 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2493 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2494 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2496 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2497 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2498 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2499 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2501 def AND_V : AND_V_ENC, AND_V_DESC;
2502 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2503 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2506 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2507 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2510 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2511 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2515 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2517 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2518 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2519 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2520 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2522 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2523 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2524 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2525 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2527 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2528 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2529 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2530 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2532 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2533 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2534 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2535 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2537 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2538 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2539 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2540 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2542 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2543 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2544 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2545 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2547 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2548 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2549 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2550 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2552 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2553 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2554 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2555 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2557 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2558 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2559 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2560 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2562 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2563 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2564 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2565 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2567 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2568 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2569 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2570 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2572 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2573 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2574 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2575 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2577 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2579 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2581 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2583 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2585 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2586 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2587 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2588 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2590 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2591 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2592 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2593 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2595 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2596 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2597 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2598 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2600 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2602 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2604 class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> :
2605 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt),
2606 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>,
2607 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in,
2608 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> {
2609 let Constraints = "$wd_in = $wd";
2612 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>;
2613 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>;
2614 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>;
2615 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>;
2616 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>;
2618 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2620 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2621 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2622 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2623 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2625 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2626 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2627 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2628 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2630 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2631 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2632 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2633 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2635 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2637 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2638 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2639 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2640 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2642 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2643 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2644 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2645 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2647 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2649 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2650 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2651 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2652 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2654 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2655 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2656 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2657 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2659 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2660 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2661 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2662 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2664 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2665 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2666 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2667 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2669 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2670 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2671 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2672 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2674 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2675 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2676 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2677 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2679 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2680 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2681 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2682 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2684 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2685 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2686 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2687 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2689 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2690 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2691 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2693 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2694 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2695 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2697 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2698 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2700 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2702 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2703 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2704 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2705 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2707 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2708 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2709 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2710 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2712 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2713 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2714 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2716 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2717 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2718 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2720 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2721 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2722 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2724 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2725 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2726 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2728 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2729 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2730 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2732 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2733 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2734 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2736 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2737 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2739 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2740 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2742 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2743 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2745 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2746 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2748 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2749 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2751 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2752 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2754 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2755 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2757 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2758 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2760 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2761 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2763 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2764 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2766 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2767 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2769 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2770 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2772 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2773 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2775 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2776 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2778 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2779 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2781 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2782 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2783 def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC;
2784 def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC;
2786 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2787 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2789 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2790 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2792 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2793 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2795 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2796 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2798 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2799 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2801 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2802 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2804 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2805 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2806 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2807 def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC;
2808 def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC;
2810 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2811 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2813 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2814 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2816 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2817 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2819 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2820 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2822 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2823 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2825 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2826 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2828 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2829 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2831 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2832 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2834 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2835 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2837 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2838 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2840 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2841 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2843 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2844 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2846 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2847 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2849 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2850 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2852 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2853 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2855 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2856 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2858 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2859 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2861 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2862 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2864 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2865 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2867 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2868 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2870 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2871 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2873 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2874 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2876 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2877 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2879 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2880 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2882 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2883 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2885 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2886 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2888 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2889 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2891 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2892 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2894 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2895 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2897 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2898 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2899 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2901 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2902 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2903 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2905 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2906 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2907 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2909 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2910 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2911 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2913 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2914 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2915 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2916 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2918 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2919 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2920 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2921 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2923 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2924 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2925 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2926 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2928 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2929 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2930 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2931 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2933 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2934 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2935 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2937 // INSERT_FW_PSEUDO defined after INSVE_W
2938 // INSERT_FD_PSEUDO defined after INSVE_D
2940 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2941 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2942 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2943 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2945 def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC;
2946 def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC;
2948 def LD_B: LD_B_ENC, LD_B_DESC;
2949 def LD_H: LD_H_ENC, LD_H_DESC;
2950 def LD_W: LD_W_ENC, LD_W_DESC;
2951 def LD_D: LD_D_ENC, LD_D_DESC;
2953 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2954 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2955 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2956 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2958 def LSA : LSA_ENC, LSA_DESC;
2960 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2961 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2963 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2964 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2966 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2967 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2968 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2969 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2971 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2972 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2973 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2974 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2976 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2977 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2978 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2979 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2981 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2982 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2983 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2984 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2986 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2987 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2988 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2989 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2991 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2992 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2993 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2994 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2996 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2997 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2998 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2999 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
3001 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
3002 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
3003 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
3004 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
3006 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
3007 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
3008 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
3009 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
3011 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
3012 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
3013 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
3014 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
3016 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
3017 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
3018 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
3019 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
3021 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
3022 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
3023 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
3024 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
3026 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
3027 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
3028 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
3029 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
3031 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
3033 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
3034 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
3036 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
3037 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
3039 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
3040 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
3041 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
3042 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
3044 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
3045 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
3047 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
3048 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
3050 def MULV_B : MULV_B_ENC, MULV_B_DESC;
3051 def MULV_H : MULV_H_ENC, MULV_H_DESC;
3052 def MULV_W : MULV_W_ENC, MULV_W_DESC;
3053 def MULV_D : MULV_D_ENC, MULV_D_DESC;
3055 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
3056 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
3057 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
3058 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
3060 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
3061 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
3062 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
3063 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
3065 def NOR_V : NOR_V_ENC, NOR_V_DESC;
3066 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
3067 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3070 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
3071 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3074 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
3075 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3079 def NORI_B : NORI_B_ENC, NORI_B_DESC;
3081 def OR_V : OR_V_ENC, OR_V_DESC;
3082 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
3083 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3086 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
3087 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3090 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
3091 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3095 def ORI_B : ORI_B_ENC, ORI_B_DESC;
3097 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
3098 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
3099 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
3100 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
3102 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
3103 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
3104 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
3105 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
3107 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
3108 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
3109 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
3110 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
3112 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
3113 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
3114 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
3115 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3117 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3118 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3119 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3120 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3122 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3123 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3124 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3126 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3127 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3128 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3129 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3131 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3132 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3133 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3134 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3136 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3137 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3138 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3139 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3141 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3142 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3143 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3144 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3146 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3147 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3148 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3149 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3151 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3152 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3153 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3154 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3156 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3157 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3158 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3159 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3161 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3162 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3163 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3164 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3166 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3167 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3168 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3169 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3171 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3172 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3173 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3174 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3176 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3177 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3178 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3179 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3181 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3182 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3183 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3184 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3186 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3187 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3188 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3189 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3191 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3192 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3193 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3194 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3196 def ST_B: ST_B_ENC, ST_B_DESC;
3197 def ST_H: ST_H_ENC, ST_H_DESC;
3198 def ST_W: ST_W_ENC, ST_W_DESC;
3199 def ST_D: ST_D_ENC, ST_D_DESC;
3201 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3202 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3203 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3204 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3206 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3207 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3208 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3209 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3211 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3212 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3213 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3214 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3216 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3217 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3218 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3219 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3221 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3222 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3223 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3224 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3226 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3227 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3228 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3229 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3231 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3232 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3233 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3234 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3236 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3237 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3238 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3241 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3242 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3245 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3246 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3250 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3253 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3254 Pat<pattern, result>, Requires<pred>;
3256 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3257 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3259 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3260 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3261 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3262 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3263 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3264 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3265 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3267 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3268 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3269 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3271 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3272 (ST_B MSA128B:$ws, addr:$addr)>;
3273 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3274 (ST_H MSA128H:$ws, addr:$addr)>;
3275 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3276 (ST_W MSA128W:$ws, addr:$addr)>;
3277 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3278 (ST_D MSA128D:$ws, addr:$addr)>;
3279 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3280 (ST_H MSA128H:$ws, addr:$addr)>;
3281 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3282 (ST_W MSA128W:$ws, addr:$addr)>;
3283 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3284 (ST_D MSA128D:$ws, addr:$addr)>;
3286 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3287 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3288 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3289 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3290 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3291 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3293 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3294 RegisterOperand ROWS = ROWD,
3295 InstrItinClass itin = NoItinerary> :
3296 MipsPseudo<(outs ROWD:$wd),
3298 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3299 InstrItinClass Itinerary = itin;
3301 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3302 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3304 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3305 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3308 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3309 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3310 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3311 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3313 // These are endian-independant because the element size doesnt change
3314 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3315 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3316 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3317 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3318 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3319 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3321 // Little endian bitcasts are always no-ops
3322 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3323 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3324 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3325 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3326 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3327 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3329 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3330 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3331 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3332 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3333 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3335 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3336 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3337 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3338 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3339 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3341 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3342 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3343 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3344 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3345 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3347 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3348 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3349 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3350 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3351 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3353 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3354 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3355 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3356 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3357 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3359 // Big endian bitcasts expand to shuffle instructions.
3360 // This is because bitcast is defined to be a store/load sequence and the
3361 // vector store/load instructions are mixed-endian with respect to the vector
3362 // as a whole (little endian with respect to element order, but big endian
3365 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3366 RegisterClass DstRC, MSAInst Insn,
3367 RegisterClass ViaRC> :
3368 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3369 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3373 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3374 RegisterClass DstRC, MSAInst Insn,
3375 RegisterClass ViaRC> :
3376 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3377 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3381 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3382 RegisterClass DstRC> :
3383 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3385 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3386 RegisterClass DstRC> :
3387 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3389 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3390 RegisterClass DstRC> :
3391 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3395 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3400 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3401 RegisterClass DstRC> :
3402 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3404 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3405 RegisterClass DstRC> :
3406 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3408 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3409 RegisterClass DstRC> :
3410 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3412 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3413 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3414 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3415 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3416 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3417 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3419 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3420 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3421 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3422 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3423 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3425 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3426 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3427 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3428 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3429 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3431 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3432 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3433 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3434 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3435 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3437 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3438 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3439 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3440 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3441 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3443 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3444 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3445 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3446 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3447 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3449 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3450 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3451 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3452 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3453 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3455 // Pseudos used to implement BNZ.df, and BZ.df
3457 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3459 InstrItinClass itin = NoItinerary> :
3460 MipsPseudo<(outs GPR32:$dst),
3462 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3463 bit usesCustomInserter = 1;
3466 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3467 MSA128B, NoItinerary>;
3468 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3469 MSA128H, NoItinerary>;
3470 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3471 MSA128W, NoItinerary>;
3472 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3473 MSA128D, NoItinerary>;
3474 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3475 MSA128B, NoItinerary>;
3477 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3478 MSA128B, NoItinerary>;
3479 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3480 MSA128H, NoItinerary>;
3481 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3482 MSA128W, NoItinerary>;
3483 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3484 MSA128D, NoItinerary>;
3485 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3486 MSA128B, NoItinerary>;