1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm2 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 // The immediate of an LSA instruction needs special handling
69 // as the encoded value should be subtracted by one.
70 def uimm2LSAAsmOperand : AsmOperandClass {
72 let ParserMethod = "parseLSAImm";
73 let RenderMethod = "addImmOperands";
76 def LSAImm : Operand<i32> {
77 let PrintMethod = "printUnsignedImm";
78 let EncoderMethod = "getLSAImmEncoding";
79 let DecoderMethod = "DecodeLSAImm";
80 let ParserMatchClass = uimm2LSAAsmOperand;
83 def uimm3 : Operand<i32> {
84 let PrintMethod = "printUnsignedImm8";
87 def uimm4 : Operand<i32> {
88 let PrintMethod = "printUnsignedImm8";
91 def uimm8 : Operand<i32> {
92 let PrintMethod = "printUnsignedImm8";
95 def simm5 : Operand<i32>;
97 def simm10 : Operand<i32>;
99 def vsplat_uimm1 : Operand<vAny> {
100 let PrintMethod = "printUnsignedImm8";
103 def vsplat_uimm2 : Operand<vAny> {
104 let PrintMethod = "printUnsignedImm8";
107 def vsplat_uimm3 : Operand<vAny> {
108 let PrintMethod = "printUnsignedImm8";
111 def vsplat_uimm4 : Operand<vAny> {
112 let PrintMethod = "printUnsignedImm8";
115 def vsplat_uimm5 : Operand<vAny> {
116 let PrintMethod = "printUnsignedImm8";
119 def vsplat_uimm6 : Operand<vAny> {
120 let PrintMethod = "printUnsignedImm8";
123 def vsplat_uimm8 : Operand<vAny> {
124 let PrintMethod = "printUnsignedImm8";
127 def vsplat_simm5 : Operand<vAny>;
129 def vsplat_simm10 : Operand<vAny>;
131 def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>;
134 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
135 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
136 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
137 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
138 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
139 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
140 def vextract_sext_i64 : PatFrag<(ops node:$vec, node:$idx),
141 (MipsVExtractSExt node:$vec, node:$idx, i64)>;
143 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
144 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
145 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
146 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
147 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
148 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
149 def vextract_zext_i64 : PatFrag<(ops node:$vec, node:$idx),
150 (MipsVExtractZExt node:$vec, node:$idx, i64)>;
152 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
153 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
154 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
155 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
156 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
157 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
158 def vinsert_v2i64 : PatFrag<(ops node:$vec, node:$val, node:$idx),
159 (v2i64 (vector_insert node:$vec, node:$val, node:$idx))>;
161 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
162 PatFrag<(ops node:$lhs, node:$rhs),
163 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
165 // ISD::SETFALSE cannot occur
166 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
167 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
168 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
169 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
170 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
171 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
172 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
173 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
174 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
175 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
176 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
177 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
178 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
179 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
180 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
181 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
182 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
183 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
184 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
185 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
186 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
187 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
188 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
189 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
190 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
191 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
192 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
193 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
194 // ISD::SETTRUE cannot occur
195 // ISD::SETFALSE2 cannot occur
196 // ISD::SETTRUE2 cannot occur
198 class vsetcc_type<ValueType ResTy, CondCode CC> :
199 PatFrag<(ops node:$lhs, node:$rhs),
200 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
202 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
203 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
204 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
205 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
206 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
207 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
208 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
209 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
210 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
211 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
212 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
213 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
214 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
215 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
216 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
217 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
218 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
219 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
220 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
221 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
223 def vsplati8 : PatFrag<(ops node:$e0),
224 (v16i8 (build_vector node:$e0, node:$e0,
231 node:$e0, node:$e0))>;
232 def vsplati16 : PatFrag<(ops node:$e0),
233 (v8i16 (build_vector node:$e0, node:$e0,
236 node:$e0, node:$e0))>;
237 def vsplati32 : PatFrag<(ops node:$e0),
238 (v4i32 (build_vector node:$e0, node:$e0,
239 node:$e0, node:$e0))>;
240 def vsplati64 : PatFrag<(ops node:$e0),
241 (v2i64 (build_vector node:$e0, node:$e0))>;
242 def vsplatf32 : PatFrag<(ops node:$e0),
243 (v4f32 (build_vector node:$e0, node:$e0,
244 node:$e0, node:$e0))>;
245 def vsplatf64 : PatFrag<(ops node:$e0),
246 (v2f64 (build_vector node:$e0, node:$e0))>;
248 def vsplati8_elt : PatFrag<(ops node:$v, node:$i),
249 (MipsVSHF (vsplati8 node:$i), node:$v, node:$v)>;
250 def vsplati16_elt : PatFrag<(ops node:$v, node:$i),
251 (MipsVSHF (vsplati16 node:$i), node:$v, node:$v)>;
252 def vsplati32_elt : PatFrag<(ops node:$v, node:$i),
253 (MipsVSHF (vsplati32 node:$i), node:$v, node:$v)>;
254 def vsplati64_elt : PatFrag<(ops node:$v, node:$i),
255 (MipsVSHF (vsplati64 node:$i), node:$v, node:$v)>;
257 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
258 SDNodeXForm xform = NOOP_SDNodeXForm>
259 : PatLeaf<frag, pred, xform> {
260 Operand OpClass = opclass;
263 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
264 list<SDNode> roots = [],
265 list<SDNodeProperty> props = []> :
266 ComplexPattern<ty, numops, fn, roots, props> {
267 Operand OpClass = opclass;
270 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
272 [build_vector, bitconvert]>;
274 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
276 [build_vector, bitconvert]>;
278 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
280 [build_vector, bitconvert]>;
282 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
284 [build_vector, bitconvert]>;
286 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
288 [build_vector, bitconvert]>;
290 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
292 [build_vector, bitconvert]>;
294 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
296 [build_vector, bitconvert]>;
298 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
300 [build_vector, bitconvert]>;
302 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
304 [build_vector, bitconvert]>;
306 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
308 [build_vector, bitconvert]>;
310 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
312 [build_vector, bitconvert]>;
314 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
316 [build_vector, bitconvert]>;
318 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
320 [build_vector, bitconvert]>;
322 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
324 [build_vector, bitconvert]>;
326 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
328 [build_vector, bitconvert]>;
330 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
332 [build_vector, bitconvert]>;
334 // Any build_vector that is a constant splat with a value that is an exact
336 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
337 [build_vector, bitconvert]>;
339 // Any build_vector that is a constant splat with a value that is the bitwise
340 // inverse of an exact power of 2
341 def vsplat_uimm_inv_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmInvPow2",
342 [build_vector, bitconvert]>;
344 // Any build_vector that is a constant splat with only a consecutive sequence
345 // of left-most bits set.
346 def vsplat_maskl_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1,
348 [build_vector, bitconvert]>;
350 // Any build_vector that is a constant splat with only a consecutive sequence
351 // of right-most bits set.
352 def vsplat_maskr_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1,
354 [build_vector, bitconvert]>;
356 // Any build_vector that is a constant splat with a value that equals 1
357 // FIXME: These should be a ComplexPattern but we can't use them because the
358 // ISel generator requires the uses to have a name, but providing a name
359 // causes other errors ("used in pattern but not operand list")
360 def vsplat_imm_eq_1 : PatLeaf<(build_vector), [{
362 EVT EltTy = N->getValueType(0).getVectorElementType();
364 return selectVSplat (N, Imm) &&
365 Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
368 def vsplati64_imm_eq_1 : PatLeaf<(bitconvert (v4i32 (build_vector))), [{
370 SDNode *BV = N->getOperand(0).getNode();
371 EVT EltTy = N->getValueType(0).getVectorElementType();
373 return selectVSplat (BV, Imm) &&
374 Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
377 def vbclr_b : PatFrag<(ops node:$ws, node:$wt),
378 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt),
380 def vbclr_h : PatFrag<(ops node:$ws, node:$wt),
381 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt),
383 def vbclr_w : PatFrag<(ops node:$ws, node:$wt),
384 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt),
386 def vbclr_d : PatFrag<(ops node:$ws, node:$wt),
387 (and node:$ws, (xor (shl (v2i64 vsplati64_imm_eq_1),
389 (bitconvert (v4i32 immAllOnesV))))>;
391 def vbneg_b : PatFrag<(ops node:$ws, node:$wt),
392 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
393 def vbneg_h : PatFrag<(ops node:$ws, node:$wt),
394 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
395 def vbneg_w : PatFrag<(ops node:$ws, node:$wt),
396 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
397 def vbneg_d : PatFrag<(ops node:$ws, node:$wt),
398 (xor node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
401 def vbset_b : PatFrag<(ops node:$ws, node:$wt),
402 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
403 def vbset_h : PatFrag<(ops node:$ws, node:$wt),
404 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
405 def vbset_w : PatFrag<(ops node:$ws, node:$wt),
406 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
407 def vbset_d : PatFrag<(ops node:$ws, node:$wt),
408 (or node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
411 def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt),
412 (fsub node:$wd, (fmul node:$ws, node:$wt))>;
414 def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
415 (add node:$wd, (mul node:$ws, node:$wt))>;
417 def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt),
418 (sub node:$wd, (mul node:$ws, node:$wt))>;
420 def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt),
421 (fmul node:$ws, (fexp2 node:$wt))>;
424 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
425 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
427 // Instruction encoding.
428 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
429 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
430 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
431 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
433 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
434 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
435 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
436 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
438 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
439 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
440 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
441 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
443 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
444 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
445 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
446 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
448 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
449 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
450 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
451 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
453 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
454 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
455 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
456 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
458 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
460 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
462 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
463 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
464 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
465 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
467 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
468 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
469 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
470 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
472 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
473 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
474 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
475 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
477 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
478 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
479 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
480 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
482 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
483 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
484 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
485 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
487 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
488 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
489 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
490 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
492 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
493 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
494 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
495 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
497 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
498 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
499 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
500 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
502 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
503 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
504 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
505 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
507 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
508 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
509 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
510 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
512 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
513 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
514 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
515 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
517 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
518 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
519 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
520 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
522 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
524 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
526 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
528 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
530 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
531 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
532 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
533 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
535 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
536 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
537 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
538 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
540 class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>;
541 class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>;
542 class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>;
543 class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>;
545 class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01111>;
547 class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>;
549 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
551 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
552 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
553 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
554 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
556 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
557 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
558 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
559 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
561 class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>;
562 class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>;
563 class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>;
564 class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>;
566 class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>;
568 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
569 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
570 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
571 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
573 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
574 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
575 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
576 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
578 class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>;
580 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
581 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
582 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
583 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
585 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
586 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
587 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
588 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
590 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
591 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
592 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
593 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
595 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
596 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
597 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
598 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
600 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
601 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
602 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
603 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
605 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
606 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
607 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
608 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
610 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
611 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
612 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
613 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
615 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
616 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
617 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
618 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
620 class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
621 class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
622 class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
623 class COPY_S_D_ENC : MSA_ELM_COPY_D_FMT<0b0010, 0b011001>;
625 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
626 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
627 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
628 class COPY_U_D_ENC : MSA_ELM_COPY_D_FMT<0b0011, 0b011001>;
630 class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>;
632 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
633 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
634 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
635 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
637 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
638 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
639 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
640 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
642 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
643 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
644 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
646 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
647 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
648 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
650 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
651 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
652 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
654 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
655 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
656 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
658 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
659 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
660 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
662 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
663 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
664 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
666 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
667 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
669 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
670 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
672 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
673 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
675 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
676 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
678 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
679 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
681 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
682 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
684 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
685 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
687 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
688 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
690 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
691 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
693 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
694 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
696 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
697 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
699 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
700 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
702 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
703 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
705 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
706 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
708 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
709 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
711 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
712 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
714 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
715 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
717 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
718 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
720 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
721 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
723 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
724 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
726 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
727 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
729 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
730 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
732 class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>;
733 class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>;
734 class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>;
735 class FILL_D_ENC : MSA_2R_FILL_D_FMT<0b11000000, 0b11, 0b011110>;
737 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
738 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
740 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
741 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
743 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
744 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
746 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
747 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
749 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
750 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
752 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
753 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
755 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
756 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
758 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
759 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
761 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
762 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
764 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
765 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
767 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
768 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
770 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
771 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
773 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
774 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
776 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
777 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
779 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
780 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
782 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
783 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
785 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
786 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
788 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
789 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
791 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
792 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
794 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
795 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
797 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
798 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
800 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
801 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
803 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
804 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
806 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
807 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
809 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
810 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
812 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
813 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
815 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
816 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
818 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
819 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
821 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
822 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
824 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
825 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
826 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
828 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
829 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
830 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
832 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
833 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
834 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
836 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
837 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
838 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
840 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
841 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
842 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
843 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
845 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
846 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
847 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
848 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
850 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
851 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
852 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
853 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
855 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
856 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
857 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
858 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
860 class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>;
861 class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>;
862 class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>;
863 class INSERT_D_ENC : MSA_ELM_INSERT_D_FMT<0b0100, 0b011001>;
865 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
866 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
867 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
868 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
870 class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>;
871 class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>;
872 class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>;
873 class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>;
875 class LDI_B_ENC : MSA_I10_FMT<0b110, 0b00, 0b000111>;
876 class LDI_H_ENC : MSA_I10_FMT<0b110, 0b01, 0b000111>;
877 class LDI_W_ENC : MSA_I10_FMT<0b110, 0b10, 0b000111>;
878 class LDI_D_ENC : MSA_I10_FMT<0b110, 0b11, 0b000111>;
880 class LSA_ENC : SPECIAL_LSA_FMT<0b000101>;
881 class DLSA_ENC : SPECIAL_DLSA_FMT<0b010101>;
883 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
884 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
886 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
887 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
889 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
890 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
891 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
892 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
894 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
895 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
896 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
897 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
899 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
900 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
901 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
902 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
904 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
905 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
906 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
907 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
909 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
910 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
911 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
912 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
914 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
915 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
916 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
917 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
919 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
920 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
921 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
922 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
924 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
925 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
926 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
927 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
929 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
930 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
931 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
932 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
934 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
935 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
936 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
937 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
939 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
940 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
941 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
942 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
944 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
945 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
946 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
947 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
949 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
950 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
951 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
952 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
954 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
956 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
957 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
959 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
960 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
962 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
963 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
964 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
965 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
967 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
968 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
970 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
971 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
973 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
974 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
975 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
976 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
978 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
979 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
980 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
981 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
983 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
984 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
985 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
986 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
988 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
990 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
992 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
994 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
996 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
997 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
998 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
999 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
1001 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
1002 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
1003 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
1004 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
1006 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
1007 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
1008 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
1009 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
1011 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
1012 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
1013 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
1014 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
1016 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
1017 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
1018 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
1019 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
1021 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
1022 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
1023 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
1025 class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>;
1026 class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>;
1027 class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>;
1028 class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>;
1030 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
1031 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
1032 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
1033 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
1035 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
1036 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
1037 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
1038 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
1040 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
1041 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
1042 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
1043 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
1045 class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>;
1046 class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>;
1047 class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>;
1048 class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>;
1050 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
1051 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
1052 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
1053 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
1055 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
1056 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
1057 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
1058 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
1060 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
1061 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
1062 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
1063 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
1065 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
1066 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
1067 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
1068 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
1070 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
1071 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
1072 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
1073 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
1075 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
1076 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
1077 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
1078 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
1080 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
1081 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
1082 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
1083 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
1085 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
1086 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
1087 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
1088 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
1090 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
1091 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
1092 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
1093 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
1095 class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>;
1096 class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>;
1097 class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>;
1098 class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>;
1100 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
1101 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
1102 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
1103 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
1105 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
1106 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
1107 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
1108 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
1110 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
1111 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
1112 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
1113 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
1115 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
1116 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
1117 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
1118 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
1120 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
1121 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1122 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1123 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1125 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1126 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1127 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1128 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1130 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1131 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1132 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1133 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1135 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1137 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1139 // Instruction desc.
1140 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1141 ComplexPattern Imm, RegisterOperand ROWD,
1142 RegisterOperand ROWS = ROWD,
1143 InstrItinClass itin = NoItinerary> {
1144 dag OutOperandList = (outs ROWD:$wd);
1145 dag InOperandList = (ins ROWS:$ws, vsplat_uimm3:$m);
1146 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1147 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1148 InstrItinClass Itinerary = itin;
1151 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1152 ComplexPattern Imm, RegisterOperand ROWD,
1153 RegisterOperand ROWS = ROWD,
1154 InstrItinClass itin = NoItinerary> {
1155 dag OutOperandList = (outs ROWD:$wd);
1156 dag InOperandList = (ins ROWS:$ws, vsplat_uimm4:$m);
1157 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1158 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1159 InstrItinClass Itinerary = itin;
1162 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1163 ComplexPattern Imm, RegisterOperand ROWD,
1164 RegisterOperand ROWS = ROWD,
1165 InstrItinClass itin = NoItinerary> {
1166 dag OutOperandList = (outs ROWD:$wd);
1167 dag InOperandList = (ins ROWS:$ws, vsplat_uimm5:$m);
1168 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1169 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1170 InstrItinClass Itinerary = itin;
1173 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1174 ComplexPattern Imm, RegisterOperand ROWD,
1175 RegisterOperand ROWS = ROWD,
1176 InstrItinClass itin = NoItinerary> {
1177 dag OutOperandList = (outs ROWD:$wd);
1178 dag InOperandList = (ins ROWS:$ws, vsplat_uimm6:$m);
1179 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1180 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))];
1181 InstrItinClass Itinerary = itin;
1184 // This class is deprecated and will be removed soon.
1185 class MSA_BIT_B_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1186 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1187 InstrItinClass itin = NoItinerary> {
1188 dag OutOperandList = (outs ROWD:$wd);
1189 dag InOperandList = (ins ROWS:$ws, uimm3:$m);
1190 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1191 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))];
1192 InstrItinClass Itinerary = itin;
1195 // This class is deprecated and will be removed soon.
1196 class MSA_BIT_H_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1197 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1198 InstrItinClass itin = NoItinerary> {
1199 dag OutOperandList = (outs ROWD:$wd);
1200 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1201 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1202 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1203 InstrItinClass Itinerary = itin;
1206 // This class is deprecated and will be removed soon.
1207 class MSA_BIT_W_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1208 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1209 InstrItinClass itin = NoItinerary> {
1210 dag OutOperandList = (outs ROWD:$wd);
1211 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1212 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1213 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1214 InstrItinClass Itinerary = itin;
1217 // This class is deprecated and will be removed soon.
1218 class MSA_BIT_D_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1219 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1220 InstrItinClass itin = NoItinerary> {
1221 dag OutOperandList = (outs ROWD:$wd);
1222 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1223 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1224 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1225 InstrItinClass Itinerary = itin;
1228 class MSA_BIT_BINSXI_DESC_BASE<string instr_asm, ValueType Ty,
1229 ComplexPattern Mask, RegisterOperand ROWD,
1230 RegisterOperand ROWS = ROWD,
1231 InstrItinClass itin = NoItinerary> {
1232 dag OutOperandList = (outs ROWD:$wd);
1233 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, vsplat_uimm8:$m);
1234 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1235 list<dag> Pattern = [(set ROWD:$wd, (vselect (Ty Mask:$m), (Ty ROWD:$wd_in),
1237 InstrItinClass Itinerary = itin;
1238 string Constraints = "$wd = $wd_in";
1241 class MSA_BIT_BINSLI_DESC_BASE<string instr_asm, ValueType Ty,
1242 RegisterOperand ROWD,
1243 RegisterOperand ROWS = ROWD,
1244 InstrItinClass itin = NoItinerary> :
1245 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskl_bits, ROWD, ROWS, itin>;
1247 class MSA_BIT_BINSRI_DESC_BASE<string instr_asm, ValueType Ty,
1248 RegisterOperand ROWD,
1249 RegisterOperand ROWS = ROWD,
1250 InstrItinClass itin = NoItinerary> :
1251 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskr_bits, ROWD, ROWS, itin>;
1253 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1254 SplatComplexPattern SplatImm,
1255 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1256 InstrItinClass itin = NoItinerary> {
1257 dag OutOperandList = (outs ROWD:$wd);
1258 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m);
1259 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1260 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))];
1261 InstrItinClass Itinerary = itin;
1264 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1265 ValueType VecTy, RegisterOperand ROD,
1266 RegisterOperand ROWS,
1267 InstrItinClass itin = NoItinerary> {
1268 dag OutOperandList = (outs ROD:$rd);
1269 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1270 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1271 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
1272 InstrItinClass Itinerary = itin;
1275 class MSA_ELM_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1276 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1277 InstrItinClass itin = NoItinerary> {
1278 dag OutOperandList = (outs ROWD:$wd);
1279 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, uimm4:$n);
1280 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1281 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
1283 string Constraints = "$wd = $wd_in";
1284 InstrItinClass Itinerary = itin;
1287 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1288 RegisterClass RCD, RegisterClass RCWS> :
1289 MSAPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1290 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1291 bit usesCustomInserter = 1;
1294 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1295 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1296 RegisterOperand ROWS = ROWD,
1297 InstrItinClass itin = NoItinerary> {
1298 dag OutOperandList = (outs ROWD:$wd);
1299 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm);
1300 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1301 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))];
1302 InstrItinClass Itinerary = itin;
1305 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1306 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1307 RegisterOperand ROWS = ROWD,
1308 InstrItinClass itin = NoItinerary> {
1309 dag OutOperandList = (outs ROWD:$wd);
1310 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8);
1311 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1312 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))];
1313 InstrItinClass Itinerary = itin;
1316 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1317 RegisterOperand ROWS = ROWD,
1318 InstrItinClass itin = NoItinerary> {
1319 dag OutOperandList = (outs ROWD:$wd);
1320 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1321 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1322 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))];
1323 InstrItinClass Itinerary = itin;
1326 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1327 InstrItinClass itin = NoItinerary> {
1328 dag OutOperandList = (outs ROWD:$wd);
1329 dag InOperandList = (ins vsplat_simm10:$s10);
1330 string AsmString = !strconcat(instr_asm, "\t$wd, $s10");
1331 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1332 list<dag> Pattern = [];
1333 bit hasSideEffects = 0;
1334 InstrItinClass Itinerary = itin;
1337 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1338 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1339 InstrItinClass itin = NoItinerary> {
1340 dag OutOperandList = (outs ROWD:$wd);
1341 dag InOperandList = (ins ROWS:$ws);
1342 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1343 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1344 InstrItinClass Itinerary = itin;
1347 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1348 SDPatternOperator OpNode, RegisterOperand ROWD,
1349 RegisterOperand ROS = ROWD,
1350 InstrItinClass itin = NoItinerary> {
1351 dag OutOperandList = (outs ROWD:$wd);
1352 dag InOperandList = (ins ROS:$rs);
1353 string AsmString = !strconcat(instr_asm, "\t$wd, $rs");
1354 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))];
1355 InstrItinClass Itinerary = itin;
1358 class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode,
1359 RegisterClass RCWD, RegisterClass RCWS = RCWD> :
1360 MSAPseudo<(outs RCWD:$wd), (ins RCWS:$fs),
1361 [(set RCWD:$wd, (OpNode RCWS:$fs))]> {
1362 let usesCustomInserter = 1;
1365 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1366 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1367 InstrItinClass itin = NoItinerary> {
1368 dag OutOperandList = (outs ROWD:$wd);
1369 dag InOperandList = (ins ROWS:$ws);
1370 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1371 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1372 InstrItinClass Itinerary = itin;
1375 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1376 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1377 RegisterOperand ROWT = ROWD,
1378 InstrItinClass itin = NoItinerary> {
1379 dag OutOperandList = (outs ROWD:$wd);
1380 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1381 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1382 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1383 InstrItinClass Itinerary = itin;
1386 class MSA_3R_BINSX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1387 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1388 RegisterOperand ROWT = ROWD,
1389 InstrItinClass itin = NoItinerary> {
1390 dag OutOperandList = (outs ROWD:$wd);
1391 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1392 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1393 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
1395 string Constraints = "$wd = $wd_in";
1396 InstrItinClass Itinerary = itin;
1399 class MSA_3R_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1400 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1401 InstrItinClass itin = NoItinerary> {
1402 dag OutOperandList = (outs ROWD:$wd);
1403 dag InOperandList = (ins ROWS:$ws, GPR32:$rt);
1404 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]");
1405 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))];
1406 InstrItinClass Itinerary = itin;
1409 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1410 RegisterOperand ROWS = ROWD,
1411 RegisterOperand ROWT = ROWD,
1412 InstrItinClass itin = NoItinerary> {
1413 dag OutOperandList = (outs ROWD:$wd);
1414 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1415 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1416 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1418 string Constraints = "$wd = $wd_in";
1419 InstrItinClass Itinerary = itin;
1422 class MSA_3R_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1423 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1424 InstrItinClass itin = NoItinerary> {
1425 dag OutOperandList = (outs ROWD:$wd);
1426 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, GPR32:$rt);
1427 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]");
1428 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
1430 InstrItinClass Itinerary = itin;
1431 string Constraints = "$wd = $wd_in";
1434 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1435 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1436 RegisterOperand ROWT = ROWD,
1437 InstrItinClass itin = NoItinerary> {
1438 dag OutOperandList = (outs ROWD:$wd);
1439 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1440 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1441 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws,
1443 InstrItinClass Itinerary = itin;
1444 string Constraints = "$wd = $wd_in";
1447 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1448 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1449 RegisterOperand ROWT = ROWD,
1450 InstrItinClass itin = NoItinerary> :
1451 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1453 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1454 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1455 RegisterOperand ROWT = ROWD,
1456 InstrItinClass itin = NoItinerary> :
1457 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1459 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> {
1460 dag OutOperandList = (outs);
1461 dag InOperandList = (ins ROWD:$wt, brtarget:$offset);
1462 string AsmString = !strconcat(instr_asm, "\t$wt, $offset");
1463 list<dag> Pattern = [];
1464 InstrItinClass Itinerary = IIBranch;
1466 bit isTerminator = 1;
1467 bit hasDelaySlot = 1;
1468 list<Register> Defs = [AT];
1471 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1472 RegisterOperand ROWD, RegisterOperand ROS,
1473 InstrItinClass itin = NoItinerary> {
1474 dag OutOperandList = (outs ROWD:$wd);
1475 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n);
1476 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1477 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1480 InstrItinClass Itinerary = itin;
1481 string Constraints = "$wd = $wd_in";
1484 class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
1485 RegisterOperand ROWD, RegisterOperand ROFS> :
1486 MSAPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
1487 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
1489 bit usesCustomInserter = 1;
1490 string Constraints = "$wd = $wd_in";
1493 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1494 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1495 InstrItinClass itin = NoItinerary> {
1496 dag OutOperandList = (outs ROWD:$wd);
1497 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
1498 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1499 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1502 InstrItinClass Itinerary = itin;
1503 string Constraints = "$wd = $wd_in";
1506 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1507 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1508 RegisterOperand ROWT = ROWD,
1509 InstrItinClass itin = NoItinerary> {
1510 dag OutOperandList = (outs ROWD:$wd);
1511 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1512 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1513 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1514 InstrItinClass Itinerary = itin;
1517 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1518 RegisterOperand ROWD,
1519 RegisterOperand ROWS = ROWD,
1520 InstrItinClass itin = NoItinerary> {
1521 dag OutOperandList = (outs ROWD:$wd);
1522 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
1523 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1524 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
1526 InstrItinClass Itinerary = itin;
1529 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD,
1530 RegisterOperand ROWS = ROWD,
1531 RegisterOperand ROWT = ROWD> :
1532 MSAPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt),
1533 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>;
1535 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1537 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1539 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1541 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1544 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1545 MSA128BOpnd>, IsCommutable;
1546 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1547 MSA128HOpnd>, IsCommutable;
1548 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1549 MSA128WOpnd>, IsCommutable;
1550 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1551 MSA128DOpnd>, IsCommutable;
1553 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1554 MSA128BOpnd>, IsCommutable;
1555 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1556 MSA128HOpnd>, IsCommutable;
1557 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1558 MSA128WOpnd>, IsCommutable;
1559 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1560 MSA128DOpnd>, IsCommutable;
1562 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1563 MSA128BOpnd>, IsCommutable;
1564 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1565 MSA128HOpnd>, IsCommutable;
1566 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1567 MSA128WOpnd>, IsCommutable;
1568 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1569 MSA128DOpnd>, IsCommutable;
1571 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1572 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1573 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1574 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1576 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5,
1578 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5,
1580 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5,
1582 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5,
1585 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>;
1586 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>;
1587 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>;
1588 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>;
1590 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8,
1593 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1595 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1597 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1599 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1602 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1604 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1606 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1608 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1611 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1613 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1615 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1617 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1620 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1622 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1624 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1626 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1629 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1630 MSA128BOpnd>, IsCommutable;
1631 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1632 MSA128HOpnd>, IsCommutable;
1633 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1634 MSA128WOpnd>, IsCommutable;
1635 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1636 MSA128DOpnd>, IsCommutable;
1638 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1639 MSA128BOpnd>, IsCommutable;
1640 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1641 MSA128HOpnd>, IsCommutable;
1642 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1643 MSA128WOpnd>, IsCommutable;
1644 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1645 MSA128DOpnd>, IsCommutable;
1647 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", vbclr_b, MSA128BOpnd>;
1648 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", vbclr_h, MSA128HOpnd>;
1649 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", vbclr_w, MSA128WOpnd>;
1650 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", vbclr_d, MSA128DOpnd>;
1652 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", and, vsplat_uimm_inv_pow2,
1654 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", and, vsplat_uimm_inv_pow2,
1656 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", and, vsplat_uimm_inv_pow2,
1658 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", and, vsplat_uimm_inv_pow2,
1661 class BINSL_B_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.b", int_mips_binsl_b,
1663 class BINSL_H_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.h", int_mips_binsl_h,
1665 class BINSL_W_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.w", int_mips_binsl_w,
1667 class BINSL_D_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.d", int_mips_binsl_d,
1670 class BINSLI_B_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.b", v16i8, MSA128BOpnd>;
1671 class BINSLI_H_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.h", v8i16, MSA128HOpnd>;
1672 class BINSLI_W_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.w", v4i32, MSA128WOpnd>;
1673 class BINSLI_D_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.d", v2i64, MSA128DOpnd>;
1675 class BINSR_B_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.b", int_mips_binsr_b,
1677 class BINSR_H_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.h", int_mips_binsr_h,
1679 class BINSR_W_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.w", int_mips_binsr_w,
1681 class BINSR_D_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.d", int_mips_binsr_d,
1684 class BINSRI_B_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.b", v16i8, MSA128BOpnd>;
1685 class BINSRI_H_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.h", v8i16, MSA128HOpnd>;
1686 class BINSRI_W_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.w", v4i32, MSA128WOpnd>;
1687 class BINSRI_D_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.d", v2i64, MSA128DOpnd>;
1690 dag OutOperandList = (outs MSA128BOpnd:$wd);
1691 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1693 string AsmString = "bmnz.v\t$wd, $ws, $wt";
1694 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wt,
1696 MSA128BOpnd:$wd_in))];
1697 InstrItinClass Itinerary = NoItinerary;
1698 string Constraints = "$wd = $wd_in";
1701 class BMNZI_B_DESC {
1702 dag OutOperandList = (outs MSA128BOpnd:$wd);
1703 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1705 string AsmString = "bmnzi.b\t$wd, $ws, $u8";
1706 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect vsplati8_uimm8:$u8,
1708 MSA128BOpnd:$wd_in))];
1709 InstrItinClass Itinerary = NoItinerary;
1710 string Constraints = "$wd = $wd_in";
1714 dag OutOperandList = (outs MSA128BOpnd:$wd);
1715 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1717 string AsmString = "bmz.v\t$wd, $ws, $wt";
1718 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wt,
1721 InstrItinClass Itinerary = NoItinerary;
1722 string Constraints = "$wd = $wd_in";
1726 dag OutOperandList = (outs MSA128BOpnd:$wd);
1727 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1729 string AsmString = "bmzi.b\t$wd, $ws, $u8";
1730 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect vsplati8_uimm8:$u8,
1733 InstrItinClass Itinerary = NoItinerary;
1734 string Constraints = "$wd = $wd_in";
1737 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", vbneg_b, MSA128BOpnd>;
1738 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", vbneg_h, MSA128HOpnd>;
1739 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", vbneg_w, MSA128WOpnd>;
1740 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", vbneg_d, MSA128DOpnd>;
1742 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", xor, vsplat_uimm_pow2,
1744 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", xor, vsplat_uimm_pow2,
1746 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", xor, vsplat_uimm_pow2,
1748 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", xor, vsplat_uimm_pow2,
1751 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>;
1752 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>;
1753 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>;
1754 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>;
1756 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>;
1759 dag OutOperandList = (outs MSA128BOpnd:$wd);
1760 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1762 string AsmString = "bsel.v\t$wd, $ws, $wt";
1763 list<dag> Pattern = [(set MSA128BOpnd:$wd,
1764 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1766 InstrItinClass Itinerary = NoItinerary;
1767 string Constraints = "$wd = $wd_in";
1770 class BSELI_B_DESC {
1771 dag OutOperandList = (outs MSA128BOpnd:$wd);
1772 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1774 string AsmString = "bseli.b\t$wd, $ws, $u8";
1775 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in,
1777 vsplati8_uimm8:$u8))];
1778 InstrItinClass Itinerary = NoItinerary;
1779 string Constraints = "$wd = $wd_in";
1782 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", vbset_b, MSA128BOpnd>;
1783 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", vbset_h, MSA128HOpnd>;
1784 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", vbset_w, MSA128WOpnd>;
1785 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", vbset_d, MSA128DOpnd>;
1787 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", or, vsplat_uimm_pow2,
1789 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", or, vsplat_uimm_pow2,
1791 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", or, vsplat_uimm_pow2,
1793 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", or, vsplat_uimm_pow2,
1796 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>;
1797 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>;
1798 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>;
1799 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>;
1801 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>;
1803 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1805 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1807 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1809 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1812 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1814 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1816 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1818 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1822 dag OutOperandList = (outs GPR32Opnd:$rd);
1823 dag InOperandList = (ins MSA128CROpnd:$cs);
1824 string AsmString = "cfcmsa\t$rd, $cs";
1825 InstrItinClass Itinerary = NoItinerary;
1826 bit hasSideEffects = 1;
1829 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1830 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1831 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1832 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1834 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1835 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1836 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1837 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1839 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1840 vsplati8_simm5, MSA128BOpnd>;
1841 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1842 vsplati16_simm5, MSA128HOpnd>;
1843 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1844 vsplati32_simm5, MSA128WOpnd>;
1845 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1846 vsplati64_simm5, MSA128DOpnd>;
1848 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1849 vsplati8_uimm5, MSA128BOpnd>;
1850 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1851 vsplati16_uimm5, MSA128HOpnd>;
1852 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1853 vsplati32_uimm5, MSA128WOpnd>;
1854 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1855 vsplati64_uimm5, MSA128DOpnd>;
1857 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1858 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1859 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1860 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1862 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1863 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1864 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1865 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1867 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1868 vsplati8_simm5, MSA128BOpnd>;
1869 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1870 vsplati16_simm5, MSA128HOpnd>;
1871 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1872 vsplati32_simm5, MSA128WOpnd>;
1873 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1874 vsplati64_simm5, MSA128DOpnd>;
1876 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1877 vsplati8_uimm5, MSA128BOpnd>;
1878 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1879 vsplati16_uimm5, MSA128HOpnd>;
1880 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1881 vsplati32_uimm5, MSA128WOpnd>;
1882 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1883 vsplati64_uimm5, MSA128DOpnd>;
1885 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1886 GPR32Opnd, MSA128BOpnd>;
1887 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1888 GPR32Opnd, MSA128HOpnd>;
1889 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1890 GPR32Opnd, MSA128WOpnd>;
1891 class COPY_S_D_DESC : MSA_COPY_DESC_BASE<"copy_s.d", vextract_sext_i64, v2i64,
1892 GPR64Opnd, MSA128DOpnd>;
1894 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1895 GPR32Opnd, MSA128BOpnd>;
1896 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1897 GPR32Opnd, MSA128HOpnd>;
1898 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1899 GPR32Opnd, MSA128WOpnd>;
1900 class COPY_U_D_DESC : MSA_COPY_DESC_BASE<"copy_u.d", vextract_zext_i64, v2i64,
1901 GPR64Opnd, MSA128DOpnd>;
1903 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1905 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1909 dag OutOperandList = (outs);
1910 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs);
1911 string AsmString = "ctcmsa\t$cd, $rs";
1912 InstrItinClass Itinerary = NoItinerary;
1913 bit hasSideEffects = 1;
1916 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1917 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1918 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1919 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1921 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1922 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1923 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1924 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1926 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1927 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1929 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1930 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1932 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1933 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1936 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1937 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1939 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1940 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1942 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1943 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1946 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1947 MSA128HOpnd, MSA128BOpnd,
1948 MSA128BOpnd>, IsCommutable;
1949 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1950 MSA128WOpnd, MSA128HOpnd,
1951 MSA128HOpnd>, IsCommutable;
1952 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1953 MSA128DOpnd, MSA128WOpnd,
1954 MSA128WOpnd>, IsCommutable;
1956 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1957 MSA128HOpnd, MSA128BOpnd,
1958 MSA128BOpnd>, IsCommutable;
1959 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1960 MSA128WOpnd, MSA128HOpnd,
1961 MSA128HOpnd>, IsCommutable;
1962 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1963 MSA128DOpnd, MSA128WOpnd,
1964 MSA128WOpnd>, IsCommutable;
1966 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1967 MSA128HOpnd, MSA128BOpnd,
1969 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1970 MSA128WOpnd, MSA128HOpnd,
1972 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1973 MSA128DOpnd, MSA128WOpnd,
1976 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1977 MSA128HOpnd, MSA128BOpnd,
1979 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1980 MSA128WOpnd, MSA128HOpnd,
1982 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1983 MSA128DOpnd, MSA128WOpnd,
1986 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1988 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1991 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1993 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1996 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1998 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
2001 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
2003 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
2006 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
2007 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
2009 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
2010 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
2012 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
2014 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
2017 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
2019 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
2022 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
2024 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
2027 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
2029 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
2032 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
2034 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
2037 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
2039 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
2042 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
2044 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
2047 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
2048 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
2050 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
2051 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
2052 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
2053 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
2055 // The fexp2.df instruction multiplies the first operand by 2 to the power of
2056 // the second operand. We therefore need a pseudo-insn in order to invent the
2057 // 1.0 when we only need to match ISD::FEXP2.
2058 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>;
2059 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>;
2060 let usesCustomInserter = 1 in {
2061 class FEXP2_W_1_PSEUDO_DESC :
2062 MSAPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws),
2063 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>;
2064 class FEXP2_D_1_PSEUDO_DESC :
2065 MSAPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws),
2066 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>;
2069 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
2070 MSA128WOpnd, MSA128HOpnd>;
2071 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
2072 MSA128DOpnd, MSA128WOpnd>;
2074 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
2075 MSA128WOpnd, MSA128HOpnd>;
2076 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
2077 MSA128DOpnd, MSA128WOpnd>;
2079 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>;
2080 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>;
2082 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>;
2083 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>;
2085 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
2086 MSA128WOpnd, MSA128HOpnd>;
2087 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
2088 MSA128DOpnd, MSA128WOpnd>;
2090 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
2091 MSA128WOpnd, MSA128HOpnd>;
2092 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
2093 MSA128DOpnd, MSA128WOpnd>;
2095 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8,
2096 MSA128BOpnd, GPR32Opnd>;
2097 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16,
2098 MSA128HOpnd, GPR32Opnd>;
2099 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32,
2100 MSA128WOpnd, GPR32Opnd>;
2101 class FILL_D_DESC : MSA_2R_FILL_DESC_BASE<"fill.d", v2i64, vsplati64,
2102 MSA128DOpnd, GPR64Opnd>;
2104 class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W,
2106 class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D,
2109 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
2110 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
2112 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>;
2113 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>;
2115 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
2116 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
2118 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
2120 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
2123 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
2124 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
2126 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
2128 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
2131 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>;
2132 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>;
2134 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
2135 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
2137 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
2138 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
2140 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
2141 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
2143 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
2145 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
2148 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
2149 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
2151 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
2152 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
2154 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
2155 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
2157 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
2158 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
2160 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
2161 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
2163 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
2164 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
2166 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
2167 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
2169 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
2170 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
2172 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
2174 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
2177 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
2179 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
2182 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
2184 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
2187 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
2189 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
2192 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
2194 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
2197 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
2199 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
2202 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
2204 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
2207 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
2208 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
2209 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
2210 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
2212 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint,
2214 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint,
2217 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint,
2219 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint,
2222 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
2223 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2224 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
2225 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2226 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
2227 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2229 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
2230 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2231 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
2232 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2233 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
2234 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2236 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
2237 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2238 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
2239 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2240 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
2241 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2243 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
2244 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
2245 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
2246 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
2247 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
2248 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
2250 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
2251 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
2252 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
2253 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
2255 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
2256 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
2257 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
2258 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
2260 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
2261 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
2262 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
2263 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
2265 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
2266 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
2267 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
2268 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
2270 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8,
2271 MSA128BOpnd, GPR32Opnd>;
2272 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16,
2273 MSA128HOpnd, GPR32Opnd>;
2274 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
2275 MSA128WOpnd, GPR32Opnd>;
2276 class INSERT_D_DESC : MSA_INSERT_DESC_BASE<"insert.d", vinsert_v2i64,
2277 MSA128DOpnd, GPR64Opnd>;
2279 class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
2280 MSA128WOpnd, FGR32Opnd>;
2281 class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
2282 MSA128DOpnd, FGR64Opnd>;
2284 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
2286 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
2288 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
2290 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
2293 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2294 ValueType TyNode, RegisterOperand ROWD,
2295 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrRegImm,
2296 InstrItinClass itin = NoItinerary> {
2297 dag OutOperandList = (outs ROWD:$wd);
2298 dag InOperandList = (ins MemOpnd:$addr);
2299 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2300 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))];
2301 InstrItinClass Itinerary = itin;
2302 string DecoderMethod = "DecodeMSA128Mem";
2305 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>;
2306 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>;
2307 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>;
2308 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>;
2310 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>;
2311 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>;
2312 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>;
2313 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>;
2315 class LSA_DESC_BASE<string instr_asm, RegisterOperand RORD,
2316 RegisterOperand RORS = RORD, RegisterOperand RORT = RORD,
2317 InstrItinClass itin = NoItinerary > {
2318 dag OutOperandList = (outs RORD:$rd);
2319 dag InOperandList = (ins RORS:$rs, RORT:$rt, LSAImm:$sa);
2320 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $sa");
2321 list<dag> Pattern = [(set RORD:$rd, (add RORT:$rt,
2323 immZExt2Lsa:$sa)))];
2324 InstrItinClass Itinerary = itin;
2327 class LSA_DESC : LSA_DESC_BASE<"lsa", GPR32Opnd>;
2328 class DLSA_DESC : LSA_DESC_BASE<"dlsa", GPR64Opnd>;
2330 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2332 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2335 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2337 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2340 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>;
2341 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>;
2342 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>;
2343 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>;
2345 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2346 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2347 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2348 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2350 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2351 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2352 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2353 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2355 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2356 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2357 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2358 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2360 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2362 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2364 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2366 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2369 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2371 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2373 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2375 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2378 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2379 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2380 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2381 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2383 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2384 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2385 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2386 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2388 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2389 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2390 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2391 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2393 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2395 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2397 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2399 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2402 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2404 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2406 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2408 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2411 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>;
2412 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>;
2413 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>;
2414 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>;
2416 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>;
2417 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>;
2418 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>;
2419 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>;
2422 dag OutOperandList = (outs MSA128BOpnd:$wd);
2423 dag InOperandList = (ins MSA128BOpnd:$ws);
2424 string AsmString = "move.v\t$wd, $ws";
2425 list<dag> Pattern = [];
2426 InstrItinClass Itinerary = NoItinerary;
2429 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2431 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2434 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2436 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2439 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>;
2440 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>;
2441 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>;
2442 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>;
2444 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2446 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2449 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2451 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2454 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2455 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2456 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2457 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2459 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>;
2460 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>;
2461 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>;
2462 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>;
2464 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>;
2465 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>;
2466 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>;
2467 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>;
2469 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>;
2470 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>;
2471 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>;
2472 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>;
2474 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2477 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>;
2478 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>;
2479 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>;
2480 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>;
2482 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>;
2484 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2485 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2486 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2487 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2489 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2490 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2491 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2492 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2494 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2495 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2496 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2497 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2499 class SAT_S_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
2501 class SAT_S_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
2503 class SAT_S_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
2505 class SAT_S_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
2508 class SAT_U_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
2510 class SAT_U_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
2512 class SAT_U_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
2514 class SAT_U_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
2517 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2518 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2519 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2521 class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;
2522 class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2523 class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2524 class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2526 class SLDI_B_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.b", int_mips_sldi_b,
2528 class SLDI_H_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.h", int_mips_sldi_h,
2530 class SLDI_W_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.w", int_mips_sldi_w,
2532 class SLDI_D_DESC : MSA_ELM_SLD_DESC_BASE<"sldi.d", int_mips_sldi_d,
2535 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2536 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2537 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2538 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2540 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2542 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2544 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2546 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2549 class SPLAT_B_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.b", vsplati8_elt,
2551 class SPLAT_H_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.h", vsplati16_elt,
2553 class SPLAT_W_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.w", vsplati32_elt,
2555 class SPLAT_D_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.d", vsplati64_elt,
2558 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2560 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2562 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2564 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2567 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2568 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2569 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2570 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2572 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2574 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2576 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2578 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2581 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2582 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2583 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2584 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2586 class SRARI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srari.b", int_mips_srari_b,
2588 class SRARI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srari.h", int_mips_srari_h,
2590 class SRARI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srari.w", int_mips_srari_w,
2592 class SRARI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srari.d", int_mips_srari_d,
2595 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2596 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2597 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2598 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2600 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2602 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2604 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2606 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2609 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2610 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2611 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2612 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2614 class SRLRI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srlri.b", int_mips_srlri_b,
2616 class SRLRI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srlri.h", int_mips_srlri_h,
2618 class SRLRI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srlri.w", int_mips_srlri_w,
2620 class SRLRI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srlri.d", int_mips_srlri_d,
2623 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2624 ValueType TyNode, RegisterOperand ROWD,
2625 Operand MemOpnd = mem_msa, ComplexPattern Addr = addrRegImm,
2626 InstrItinClass itin = NoItinerary> {
2627 dag OutOperandList = (outs);
2628 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr);
2629 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2630 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)];
2631 InstrItinClass Itinerary = itin;
2632 string DecoderMethod = "DecodeMSA128Mem";
2635 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>;
2636 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>;
2637 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>;
2638 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>;
2640 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2642 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2644 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2646 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2649 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2651 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2653 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2655 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2658 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2660 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2662 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2664 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2667 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2669 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2671 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2673 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2676 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2677 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2678 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2679 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2681 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5,
2683 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5,
2685 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5,
2687 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5,
2690 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2691 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2692 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2693 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2695 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>;
2696 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>;
2697 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>;
2698 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>;
2700 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8,
2703 // Instruction defs.
2704 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2705 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2706 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2707 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2709 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2710 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2711 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2712 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2714 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2715 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2716 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2717 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2719 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2720 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2721 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2722 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2724 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2725 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2726 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2727 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2729 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2730 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2731 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2732 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2734 def AND_V : AND_V_ENC, AND_V_DESC;
2735 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2736 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2739 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2740 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2743 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2744 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2748 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2750 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2751 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2752 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2753 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2755 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2756 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2757 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2758 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2760 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2761 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2762 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2763 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2765 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2766 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2767 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2768 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2770 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2771 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2772 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2773 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2775 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2776 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2777 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2778 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2780 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2781 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2782 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2783 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2785 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2786 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2787 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2788 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2790 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2791 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2792 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2793 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2795 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2796 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2797 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2798 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2800 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2801 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2802 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2803 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2805 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2806 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2807 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2808 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2810 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2812 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2814 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2816 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2818 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2819 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2820 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2821 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2823 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2824 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2825 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2826 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2828 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2829 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2830 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2831 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2833 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2835 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2837 class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> :
2838 MSAPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt),
2839 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>,
2840 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in,
2841 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> {
2842 let Constraints = "$wd_in = $wd";
2845 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>;
2846 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>;
2847 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>;
2848 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>;
2849 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>;
2851 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2853 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2854 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2855 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2856 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2858 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2859 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2860 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2861 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2863 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2864 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2865 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2866 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2868 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2870 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2871 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2872 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2873 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2875 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2876 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2877 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2878 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2880 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2882 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2883 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2884 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2885 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2887 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2888 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2889 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2890 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2892 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2893 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2894 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2895 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2897 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2898 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2899 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2900 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2902 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2903 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2904 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2905 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2907 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2908 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2909 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2910 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2912 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2913 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2914 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2915 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2917 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2918 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2919 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2920 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2922 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2923 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2924 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2925 def COPY_S_D : COPY_S_D_ENC, COPY_S_D_DESC;
2927 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2928 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2929 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2930 def COPY_U_D : COPY_U_D_ENC, COPY_U_D_DESC;
2932 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2933 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2935 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2937 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2938 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2939 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2940 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2942 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2943 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2944 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2945 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2947 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2948 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2949 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2951 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2952 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2953 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2955 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2956 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2957 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2959 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2960 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2961 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2963 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2964 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2965 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2967 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2968 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2969 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2971 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2972 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2974 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2975 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2977 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2978 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2980 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2981 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2983 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2984 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2986 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2987 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2989 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2990 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2992 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2993 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2995 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2996 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2998 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2999 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
3001 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
3002 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
3004 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
3005 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
3007 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
3008 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
3010 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
3011 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
3013 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
3014 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
3016 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
3017 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
3018 def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC;
3019 def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC;
3021 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
3022 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
3024 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
3025 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
3027 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
3028 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
3030 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
3031 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
3033 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
3034 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
3036 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
3037 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
3039 def FILL_B : FILL_B_ENC, FILL_B_DESC;
3040 def FILL_H : FILL_H_ENC, FILL_H_DESC;
3041 def FILL_W : FILL_W_ENC, FILL_W_DESC;
3042 def FILL_D : FILL_D_ENC, FILL_D_DESC;
3043 def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC;
3044 def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC;
3046 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
3047 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
3049 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
3050 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
3052 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
3053 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
3055 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
3056 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
3058 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
3059 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
3061 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
3062 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
3064 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
3065 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
3067 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
3068 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
3070 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
3071 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
3073 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
3074 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
3076 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
3077 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
3079 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
3080 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
3082 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
3083 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
3085 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
3086 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
3088 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
3089 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
3091 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
3092 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
3094 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
3095 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
3097 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
3098 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
3100 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
3101 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
3103 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
3104 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
3106 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
3107 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
3109 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
3110 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
3112 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
3113 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
3115 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
3116 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
3118 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
3119 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
3121 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
3122 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
3124 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
3125 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
3127 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
3128 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
3130 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
3131 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
3133 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
3134 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
3135 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
3137 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
3138 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
3139 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
3141 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
3142 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
3143 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
3145 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
3146 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
3147 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
3149 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
3150 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
3151 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
3152 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
3154 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
3155 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
3156 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
3157 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
3159 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
3160 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
3161 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
3162 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
3164 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
3165 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
3166 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
3167 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
3169 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
3170 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
3171 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
3172 def INSERT_D : INSERT_D_ENC, INSERT_D_DESC;
3174 // INSERT_FW_PSEUDO defined after INSVE_W
3175 // INSERT_FD_PSEUDO defined after INSVE_D
3177 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
3178 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
3179 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
3180 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
3182 def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC;
3183 def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC;
3185 def LD_B: LD_B_ENC, LD_B_DESC;
3186 def LD_H: LD_H_ENC, LD_H_DESC;
3187 def LD_W: LD_W_ENC, LD_W_DESC;
3188 def LD_D: LD_D_ENC, LD_D_DESC;
3190 def LDI_B : LDI_B_ENC, LDI_B_DESC;
3191 def LDI_H : LDI_H_ENC, LDI_H_DESC;
3192 def LDI_W : LDI_W_ENC, LDI_W_DESC;
3193 def LDI_D : LDI_D_ENC, LDI_D_DESC;
3195 def LSA : LSA_ENC, LSA_DESC;
3196 def DLSA : DLSA_ENC, DLSA_DESC;
3198 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
3199 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
3201 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
3202 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
3204 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
3205 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
3206 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
3207 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
3209 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
3210 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
3211 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
3212 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
3214 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
3215 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
3216 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
3217 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
3219 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
3220 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
3221 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
3222 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
3224 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
3225 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
3226 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
3227 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
3229 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
3230 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
3231 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
3232 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
3234 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
3235 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
3236 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
3237 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
3239 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
3240 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
3241 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
3242 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
3244 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
3245 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
3246 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
3247 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
3249 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
3250 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
3251 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
3252 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
3254 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
3255 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
3256 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
3257 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
3259 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
3260 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
3261 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
3262 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
3264 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
3265 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
3266 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
3267 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
3269 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
3271 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
3272 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
3274 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
3275 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
3277 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
3278 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
3279 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
3280 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
3282 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
3283 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
3285 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
3286 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
3288 def MULV_B : MULV_B_ENC, MULV_B_DESC;
3289 def MULV_H : MULV_H_ENC, MULV_H_DESC;
3290 def MULV_W : MULV_W_ENC, MULV_W_DESC;
3291 def MULV_D : MULV_D_ENC, MULV_D_DESC;
3293 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
3294 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
3295 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
3296 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
3298 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
3299 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
3300 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
3301 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
3303 def NOR_V : NOR_V_ENC, NOR_V_DESC;
3304 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
3305 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3308 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
3309 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3312 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
3313 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3317 def NORI_B : NORI_B_ENC, NORI_B_DESC;
3319 def OR_V : OR_V_ENC, OR_V_DESC;
3320 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
3321 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3324 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
3325 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3328 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
3329 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3333 def ORI_B : ORI_B_ENC, ORI_B_DESC;
3335 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
3336 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
3337 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
3338 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
3340 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
3341 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
3342 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
3343 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
3345 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
3346 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
3347 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
3348 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
3350 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
3351 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
3352 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
3353 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3355 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3356 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3357 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3358 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3360 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3361 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3362 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3364 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3365 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3366 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3367 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3369 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3370 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3371 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3372 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3374 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3375 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3376 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3377 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3379 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3380 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3381 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3382 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3384 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3385 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3386 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3387 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3389 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3390 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3391 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3392 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3394 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3395 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3396 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3397 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3399 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3400 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3401 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3402 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3404 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3405 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3406 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3407 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3409 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3410 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3411 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3412 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3414 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3415 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3416 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3417 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3419 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3420 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3421 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3422 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3424 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3425 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3426 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3427 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3429 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3430 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3431 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3432 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3434 def ST_B: ST_B_ENC, ST_B_DESC;
3435 def ST_H: ST_H_ENC, ST_H_DESC;
3436 def ST_W: ST_W_ENC, ST_W_DESC;
3437 def ST_D: ST_D_ENC, ST_D_DESC;
3439 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3440 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3441 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3442 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3444 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3445 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3446 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3447 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3449 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3450 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3451 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3452 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3454 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3455 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3456 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3457 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3459 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3460 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3461 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3462 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3464 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3465 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3466 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3467 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3469 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3470 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3471 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3472 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3474 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3475 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3476 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3479 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3480 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3483 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3484 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3488 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3491 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3492 Pat<pattern, result>, Requires<pred>;
3494 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3495 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3497 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3498 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3499 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3500 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3501 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3502 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3503 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3505 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3506 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3507 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3509 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3510 (ST_B MSA128B:$ws, addr:$addr)>;
3511 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3512 (ST_H MSA128H:$ws, addr:$addr)>;
3513 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3514 (ST_W MSA128W:$ws, addr:$addr)>;
3515 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3516 (ST_D MSA128D:$ws, addr:$addr)>;
3517 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3518 (ST_H MSA128H:$ws, addr:$addr)>;
3519 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3520 (ST_W MSA128W:$ws, addr:$addr)>;
3521 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3522 (ST_D MSA128D:$ws, addr:$addr)>;
3524 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3525 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3526 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3527 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3528 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3529 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3531 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3532 RegisterOperand ROWS = ROWD,
3533 InstrItinClass itin = NoItinerary> :
3534 MSAPseudo<(outs ROWD:$wd),
3536 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3537 InstrItinClass Itinerary = itin;
3539 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3540 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3542 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3543 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3546 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3547 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3548 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3549 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3551 // These are endian-independent because the element size doesnt change
3552 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3553 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3554 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3555 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3556 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3557 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3559 // Little endian bitcasts are always no-ops
3560 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3561 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3562 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3563 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3564 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3565 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3567 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3568 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3569 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3570 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3571 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3573 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3574 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3575 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3576 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3577 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3579 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3580 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3581 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3582 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3583 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3585 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3586 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3587 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3588 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3589 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3591 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3592 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3593 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3594 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3595 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3597 // Big endian bitcasts expand to shuffle instructions.
3598 // This is because bitcast is defined to be a store/load sequence and the
3599 // vector store/load instructions are mixed-endian with respect to the vector
3600 // as a whole (little endian with respect to element order, but big endian
3603 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3604 RegisterClass DstRC, MSAInst Insn,
3605 RegisterClass ViaRC> :
3606 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3607 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3611 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3612 RegisterClass DstRC, MSAInst Insn,
3613 RegisterClass ViaRC> :
3614 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3615 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3619 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3620 RegisterClass DstRC> :
3621 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3623 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3624 RegisterClass DstRC> :
3625 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3627 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3628 RegisterClass DstRC> :
3629 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3633 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3638 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3639 RegisterClass DstRC> :
3640 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3642 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3643 RegisterClass DstRC> :
3644 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3646 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3647 RegisterClass DstRC> :
3648 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3650 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3651 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3652 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3653 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3654 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3655 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3657 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3658 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3659 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3660 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3661 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3663 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3664 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3665 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3666 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3667 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3669 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3670 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3671 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3672 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3673 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3675 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3676 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3677 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3678 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3679 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3681 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3682 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3683 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3684 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3685 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3687 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3688 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3689 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3690 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3691 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3693 // Pseudos used to implement BNZ.df, and BZ.df
3695 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3697 InstrItinClass itin = NoItinerary> :
3698 MipsPseudo<(outs GPR32:$dst),
3700 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3701 bit usesCustomInserter = 1;
3704 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3705 MSA128B, NoItinerary>;
3706 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3707 MSA128H, NoItinerary>;
3708 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3709 MSA128W, NoItinerary>;
3710 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3711 MSA128D, NoItinerary>;
3712 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3713 MSA128B, NoItinerary>;
3715 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3716 MSA128B, NoItinerary>;
3717 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3718 MSA128H, NoItinerary>;
3719 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3720 MSA128W, NoItinerary>;
3721 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3722 MSA128D, NoItinerary>;
3723 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3724 MSA128B, NoItinerary>;